NTB110N65S3HF MOSFET – N‐Channel, SUPERFET III, FRFET

MOSFET – N‐Channel, SUPERFET III, FRFET

650 V, 30 A, 110 mW

Description

SUPERFET III MOSFET is ON Semiconductor’s brand−new high voltage super−junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on−resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate.

Consequently, SUPERFET III MOSFET is very suitable for the various power systems for miniaturization and higher efficiency.

SUPERFET III FRFET MOSFET’s optimized reverse recovery performance of body diode can remove additional component and improve system reliability.

Features

• ^{700 V @ T}

= 150 ° C

• ^{Typ. R}

= 98 m W

• Ultra Low Gate Charge (Typ. Q

= 62 nC)

• Low Effective Output Capacitance (Typ. C

= 522 pF)

• 100% Avalanche Tested

• These Devices are Pb−Free and are RoHS Compliant

• Telecom / Server Power Supplies

• Industrial Power Supplies

• EV Charger

• UPS / Solar

D²PAK (TO−263 3−Lead)

CASE 418AJ www.onsemi.com

$Y&Z&3&K NTB110 N65S3HF

$Y = ON Semiconductor Logo

&Z = Assembly Plant Code

&3 = Data Code (Year & Week)

&K = Lot

NTB110N65S3HF = Specific Device Code MARKING DIAGRAM V_DSS R_DS(ON) MAX I_D MAX

650 V 110 mW @ 10 V 30 A

G

S N−CHANNEL MOSFET

D

ABSOLUTE MAXIMUM RATINGS (T_C = 25°C, Unless otherwise noted)

Symbol Parameter Value Unit

VDSS Drain to Source Voltage 650 V

V_GSS Gate to Source Voltage − DC ±30 V

− AC (f > 1 Hz) ±30

I_D Drain Current − Continuous (TC = 25°C) 30 A

− Continuous (TC = 100°C) 19.5

I_DM Drain Current − Pulsed (Note 1) 69 A

EAS Single Pulsed Avalanche Energy (Note 2) 380 mJ

I_AS Avalanche Current (Note 2) 4.4 A

EAR Repetitive Avalanche Energy (Note 1) 2.4 mJ

dv/dt MOSFET dv/dt 100 V/ns

Peak Diode Recovery dv/dt (Note 3) 50

PD Power Dissipation (T_C = 25°C) 240 W

− Derate Above 25°C 1.92 W/°C

T_J, T_STG Operating and Storage Temperature Range −55 to +150 °C

T_L Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds 300 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Repetitive rating: pulse−width limited by maximum junction temperature.

2. I_AS = 4.4 A, R_G = 25 W, starting T_J = 25°C.

3. ISD ≤ 15 A, di/dt ≤ 100 A/ms, VDD ≤ 400 V, starting TJ = 25°C.

THERMAL CHARACTERISTICS

Symbol Parameter Value Unit

R_qJC Thermal Resistance, Junction to Case, Max. 0.52 °C/W

R_qJA Thermal Resistance, Junction to Ambient, Max. 45

PACKAGE MARKING AND ORDERING INFORMATION

Part Number Top Marking Package Reel Size Tape Width Shipping^†

NTB110N65S3HF NTB110N65S3HF D²PAK 330 mm 24 mm 800 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

ELECTRICAL CHARACTERISTICS (T_C = 25°C unless otherwise noted)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

OFF CHARACTERISTICS

BVDSS Drain to Source Breakdown Voltage VGS= 0 V, ID= 1 mA, TJ= 25°C 650 − − V

V_GS= 0 V, I_D= 1 mA, T_J= 150°C 700 − − V

DBVDSS/DTJ Breakdown Voltage Temperature

Coefficient I_D= 15 mA, Referenced to 25°C − 0.64 − V/°C

I_DSS Zero Gate Voltage Drain Current V_DS= 650 V, V_GS= 0 V − − 10 mA

V_DS= 520 V, T_C= 125°C − 97 −

I_GSS Gate to Body Leakage Current V_GS=±30 V, V_DS= 0 V − − ±100 nA

ON CHARACTERISTICS

V_GS(th) Gate Threshold Voltage V_GS= V_DS, I_D= 0.74 mA 3.0 − 5.0 V

R_DS(on) Static Drain to Source On Resistance V_GS= 10 V, I_D= 15 A − 98 110 mW

g_FS Forward Transconductance V_DS= 20 V, I_D= 15 A − 18 − S

DYNAMIC CHARACTERISTICS

C_iss Input Capacitance V_DS= 400 V, V_GS= 0 V, f = 1 MHz − 2635 − pF

C_oss Output Capacitance − 52 − pF

Coss(eff.) Effective Output Capacitance VDS= 0 V to 400 V, VGS= 0 V − 522 − pF

Coss(er.) Energy Related Output Capacitance VDS= 0 V to 400 V, VGS= 0 V − 91 − pF

Qg(tot) Total Gate Charge at 10V V_DS= 400 V, I_D= 15 A, V_GS= 10 V

(Note 4) − 62 − nC

Qgs Gate to Source Gate Charge − 18 − nC

Qgd Gate to Drain “Miller” Charge − 25 − nC

ESR Equivalent Series Resistance f = 1 MHz − 4.6 − W

SWITCHING CHARACTERISTICS

td(on) Turn-On Delay Time VDD= 400 V, ID= 15 A,

V_GS= 10 V, R_g= 4.7W (Note 4)

− 24 − ns

tr Turn-On Rise Time − 25 − ns

td(off) Turn-Off Delay Time − 85 − ns

tf Turn-Off Fall Time − 25 − ns

SOURCE-DRAIN DIODE CHARACTERISTICS

I_S Maximum Continuous Source to Drain Diode Forward Current − − 30 A

I_SM Maximum Pulsed Source to Drain Diode Forward Current − − 69 A

V_SD Source to Drain Diode Forward

Voltage V_GS= 0 V, I_SD= 15 A − − 1.3 V

t_rr Reverse Recovery Time V_GS= 0 V, I_SD= 15 A,

dIF/dt = 100 A/ms − 95 − ns

Q_rr Reverse Recovery Charge − 371 − nC

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Essentially independent of operating temperature typical characteristics.

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature

VDS, Drain-Source Voltage [V]

ID, Drain Current [A]

VGS, Gate-Source Voltage [V]

ID, Drain Current [A]

ID, Drain Current [A]

RDS(ON), Drain-Source On-Resistance [W]

VSD, Body Diode Forward Voltage [V]

IS, Reverse Drain Current [A]

0.0010.0 0.01 1000

0.5 1.0 1.5 2.0

150°C

* Notes:

1. VGS = 0 V 2. 250 ms Pulse Test

0.1 1 10 100

25°C

−55°C

oltage [V]

10

4 6 8 100000

100 1000 10000 0.1 1 10 100

* Notes:

1. 250 ms Pulse Test 2. TC = 25°C VGS = 10.0 V

8.0 V 7.0 V 6.5 V 6.0 V 5.5 V

0.2 1 10 20 13 4 5 6 7 8 9 10

10 100

150°C

25°C

−55°C

* Notes:

1. V_DS = 20 V 2. 250 ms Pulse Test

0.0 0.1 0.2

0.3 * Note: TC = 25°C

VGS = 10 V VGS = 20 V

0 20 40 60 80

* Notes: Coss

Ciss

* Note: I_D = 15 A

VDS = 130 V

VDS = 400 V

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 7. Breakdown Voltage Variation

vs. Temperature Figure 8. On-Resistance Variant vs. Temperature

Figure 9. Maximum Safe Operation Area Figure 10. Maximum Drain Current vs. Case Temperature

TJ, Junction Temperature [5C]

BVDSS, [Normalized] Drain-Source Breakdown Voltage 0.8 0.9 1.2

−50 0 50 150

* Notes:

1. VGS = 0 V 2. ID = 10 mA

1.0 1.1

100

TJ, Junction Temperature [5C]

RDS(on), [Normalized] Drain-Source On-Resistance

0.0 0.5 3.0

−50 0 50 150

* Notes:

1. VGS = 10 V 2. ID = 15 A

1.0 1.5

100 2.0

2.5

TC, Case Temperature [5C]

ID, Drain Current [A]

0 10

25 50 75 125 150

20 30

100

EOSS, [mJ]

4 8 12 20

VDS, Drain-Source Voltage [V]

ID, Drain Current [A]

0.011 10 100 1000

0.1 1 10 100 200

* Notes:

1. T_C = 25°C 2. T_J = 150°C 3. Single Pulse Operation in This Area is Limited by RDS(on)

30 ms 100 ms 1 ms 10 ms

DC

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 12. Transient Thermal Response Curve t, Rectangular Pulse Duration (s)

r(t), Normalized Effective Transient Thermal Resistance 0.001

0.01 0.1 1 2

10⁻⁴ 10⁻³ 10⁻² 10⁻¹ 10⁰ 10¹ 10²

10⁻⁵

SINGLE PULSE D = 0.5

0.2 0.1 0.05 0.02 0.01

DUTY CYCLE−DESCENDING ORDER

Notes:

Z_qJC(t) = r(t) × R_qJC R_qJC = 0.52°C/W

Peak TJ = PDM × ZqJC(t) + TC Duty Cycle, D = t1 / t2

PDM

t₁ t₂

Figure 13. Gate Charge Test Circuit & Waveform

Figure 14. Resistive Switching Test Circuit & Waveforms

Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms V_GS

V_DS

10%

90%

t_d(on) t_r

t_on t_off

t_d(off) t_f

V_DD

10V

V_DS R_L

DUT R_G V_GS

V_GS V_DS

10%

90%

t_d(on) t_r

t_on t_off

t_d(off) t_f

V_DD

10V

V_DS R_L

DUT R_G V_GS

V_GS

V_GS

IG = const.

Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT

L

VDD

RG

I_SD

V_DS +

−

VGS

Same Type as DUT

−dv/dt controlled by R_G

−I_SD controlled by pulse period Driver

V_GS (Driver)

ISD

(DUT)

V_DS

(DUT) V_SD

I_RM

10 V

di/dt

V_DD I_FM, Body Diode Forward Current

Body Diode Reverse Current Body Diode Recovery dv/dt

Body Diode Forward Voltage Drop D+ Gate Pulse Width

Gate Pulse Period

D²PAK−3 (TO−263, 3−LEAD) CASE 418AJ

ISSUE F

DATE 11 MAR 2021 SCALE 1:1

XX XXXXXXXXX AWLYWWG

GENERIC MARKING DIAGRAMS*

XXXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot

Y = Year

WW = Work Week W = Week Code (SSG) M = Month Code (SSG) G = Pb−Free Package AKA = Polarity Indicator

IC Standard

XXXXXXXXG AYWW

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking.

Rectifier XXXXXXXXGAYWW AKA

SSG XXXXXX XXYMW

information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products