FCH023N65S3L4 MOSFET – Power, N-Channel, SUPERFET

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MOSFET – Power,

N-Channel, SUPERFET ⁾ III, Easy Drive

650 V, 75 A, 23 mW

Description

SUPERFET III MOSFET is ON Semiconductor’s brand−new high voltage super−junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on−resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provides superior switching performance, and withstand extreme dv/dt rate.

Consequently, SUPERFET III MOSFET Easy drive series helps manage EMI issues and allows for easier design implementation.

Features

• ^{700 V @ T}

J

= 150 ° C

• ^{Typ. R}

DS(on)

= 19.5 m W

• Ultra Low Gate Charge (Typ. Q

_g

= 222 nC)

• Low Effective Output Capacitance (Typ. C

oss(eff.)

= 1980 pF)

• 100% Avalanche Tested

• These Devices are Pb−Free and are RoHS Compliant

Applications

• Telecom / Server Power Supplies

• Industrial Power Supplies

• UPS / Solar

_{TO−247−4LD}

CASE 340CJ

See detailed ordering and shipping information on page 2 of this data sheet.

ORDERING INFORMATION www.onsemi.com

$Y = ON Semiconductor Logo

&Z = Assembly Plant Code

&3 = Data Code (Year & Week)

&K = Lot

FCH023N65S3L4 = Specific Device Code MARKING DIAGRAM V_DSS R_DS(ON) MAX I_D MAX

650 V 23 mW @ 10 V 75 A

D G S2S1

$Y&Z&3&K FCH023N65 S3L4

D

S2 G

POWER MOSFET S1

S1: Driver Source S2: Power Source

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ABSOLUTE MAXIMUM RATINGS (T_C = 25°C, Unless otherwise noted)

Symbol Parameter Value Unit

VDSS Drain to Source Voltage 650 V

V_GSS Gate to Source Voltage − DC ±30 V

− AC (f > 1 Hz) ±30

I_D Drain Current − Continuous (TC = 25°C) 75 A

− Continuous (TC = 100°C) 65.8

I_DM Drain Current − Pulsed (Note 1) 300 A

EAS Single Pulsed Avalanche Energy (Note 2) 2025 mJ

I_AS Avalanche Current (Note 2) 15 A

EAR Repetitive Avalanche Energy (Note 1) 5.95 mJ

dv/dt MOSFET dv/dt 100 V/ns

Peak Diode Recovery dv/dt (Note 3) 20

PD Power Dissipation (T_C = 25°C) 595 W

− Derate Above 25°C 4.76 W/°C

T_J, T_STG Operating and Storage Temperature Range −55 to +150 °C

T_L Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds 300 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Repetitive rating: pulse width limited by maximum junction temperature.

2. I_AS = 15 A, R_G = 25 W, starting T_J = 25°C.

3. ISD ≤ 37.5 A, di/dt ≤ 200 A/ms, VDD ≤ 400 V, starting TJ = 25°C.

THERMAL CHARACTERISTICS

Symbol Parameter Value Unit

R_qJC Thermal Resistance, Junction to Case, Max. 0.21 _C/W

R_qJA Thermal Resistance, Junction to Ambient, Max. 40

PACKAGE MARKING AND ORDERING INFORMATION

Part Number Top Marking Package Packing Method Reel Size Tape Width Quantity

FCH023N65S3L4 FCH023N65S3L4 TO−247 A04 Tube N/A N/A 30 Units

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

OFF CHARACTERISTICS

BV_DSS Drain to Source Breakdown Voltage V_GS= 0 V, I_D= 1 mA, T_J= 25_C 650 − − V V_GS= 0 V, I_D= 1 mA, T_J= 150_C 700 − − V DBV_DSS/ DT_J Breakdown Voltage Temperature

Coefficient I_D= 1 mA, Referenced to 25_C − 0.72 − V/_C

I_DSS Zero Gate Voltage Drain Current VDS= 650 V, VGS= 0 V − − 1 mA

V_DS= 520 V, T_C= 125_C − 6.8 −

I_GSS Gate to Body Leakage Current V_GS=±30 V, VDS= 0 V − − ±100 nA

ON CHARACTERISTICS

V_GS(th) Gate Threshold Voltage V_GS= V_DS, I_D= 3.0 mA 2.5 − 4.5 V

R Static Drain to Source On Resistance V = 10 V, I = 37.5 A − 19.5 23 mW

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ELECTRICAL CHARACTERISTICS (T_C = 25°C unless otherwise noted)(continued)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

DYNAMIC CHARACTERISTICS

C_iss Input Capacitance V_DS= 400 V, V_GS= 0 V, f = 1 MHz − 7160 − pF

C_oss Output Capacitance − 195 − pF

C_oss(eff.) Effective Output Capacitance V_DS= 0 V to 400 V, V_GS= 0 V − 1980 − pF C_oss(er.) Energy Related Output Capacitance V_DS= 0 V to 400 V, V_GS= 0 V − 298 − pF

Q_g(tot) Total Gate Charge at 10 V V_DS= 400 V, I_D= 37.5 A, V_GS= 10 V

(Note 4) − 222 − nC

Q_gs Gate to Source Gate Charge − 54 − nC

Q_gd Gate to Drain “Miller” Charge − 90 − nC

ESR Equivalent Series Resistance f = 1 MHz − 0.9 − W

SWITCHING CHARACTERISTICS

t_d(on) Turn-On Delay Time V_DD= 400 V, I_D= 37.5 A, VGS= 10 V, Rg= 2W (Note 4)

− 43 − ns

t_r Turn-On Rise Time − 30 − ns

t_d(off) Turn-Off Delay Time − 130 − ns

tf Turn-Off Fall Time − 7 − ns

SOURCE-DRAIN DIODE CHARACTERISTICS

IS Maximum Continuous Drain to Source Diode Forward Current − − 75 A

ISM Maximum Pulsed Drain to Source Diode Forward Current − − 300 A

VSD Drain to Source Diode Forward Voltage VGS= 0 V, ISD= 37.5 A − − 1.2 V trr Reverse Recovery Time V_GS= 0 V, I_SD= 37.5 A,

dI_F/dt = 100 A/ms − 600 − ns

Qrr Reverse Recovery Charge − 17.9 − mC

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Essentially independent of operating temperature typical characteristics.

TYPICAL PERFORMANCE CHARACTERISTICS

0.1 1 10

1 10 100 300

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 20

250 ms Pulse Test T_C = 25°C VGS = 10.0 V

8.0 V 7.0 V 6.5 V 6.0 V 5.5 V

V_DS, Drain−Source Voltage (V) ID, Drain Current (A)

2 4 6

1 10 100 300

V_GS, Gate−Source Voltage (V) 7 ID, Drain Current (A)

V_DS = 20 V 250 ms Pulse Test

25°C

−55°C 150°C

3 5

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TYPICAL PERFORMANCE CHARACTERISTICS

(continued)

0.010 0.02 0.03 0.04

0.0 0.5 1.0 1.5

0.001 0.01 0.1 1 10 100 1000

00 2 4 6 8 10

10⁻¹0.1 10⁰ 10¹ 10² 10³ 10⁴ 10⁵ 10⁶

Figure 3. On−Resistance Variation vs.Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage Variation vs. Source Current and

Temperature I_D, Drain Current (A)

RDS(ON), Drain−Source On−Resistance (W)

T_C = 25°C VGS = 10 V

VGS = 20 V

60 120 180 240 300

V_SD, Body Diode Forward Voltage (V) IS, Reverse Drain Current (A)

V_GS = 0 V 250 ms Pulse Test 25°C

150°C

V_DS, Drain−Source Voltage (V)

Capacitances (pF)

Ciss = Cgs + Cgd (Cds = shorted) C_oss = C_ds + C_gd

C_rss = C_gd C_oss

VGS = 0 V f = 1 MHz C_iss

C_rss

1 10 100 1000

Q_g, Total Gate Charge (nC) VGS, Gate−Source Voltage (V)

I_D = 37.5 A V_DS = 130 V

V_DS = 400 V

50 100 150 200 250

0.8 −50 0.9 1.0 1.1 1.2

0.0 0.5 1.0 1.5 2.0 2.5

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

T_J, Junction Temperature (5C) BVDSS, Drain−Source Breakdown Voltage (Normalized)

VGS = 0 V ID = 1 mA

0 50 100 150

T_J, Junction Temperature (5C) RDS(on), Drain−Source On−Resistance (Normalized)

V_GS = 10 V I_D = 37.5 A

−50 0 50 100 150 200

−100

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TYPICAL PERFORMANCE CHARACTERISTICS

(continued)

1 10 100 1000

0.01 0.1 10 100 500

025 20 40 60 80

00 11 22 33 44 55

10⁻⁵ 10⁻⁴ 10⁻³ 10⁻² 10⁻¹ 10¹

0.001 0.01 0.1 1 2

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature

Figure 11. E_OSS vs. Drain to Source Voltage

Figure 12. Transient Thermal Response Curve V_DS, Drain−Source Voltage (V)

ID, Drain Current (A)

T_C = 25°C TJ = 150°C Single Pulse Operation in this Area is Limited by RDS(on)

DC

T_C, Case Temperature (5C) ID, Drain Current (A)

50 75 100 125 150

V_DS, Drain to Source Voltage (V) EOSS, (mJ)

130 260 390 520 650

Z_qJC(t) = r(t) x R_qJC R_qJC = 0.21°C/W

Peak TJ = PDM x Z_qJC(t) + TC

Duty Cycle, D = t₁ / t₂ D = 0.5

0.2 0.1 0.05 0.02 0.01

t, Rectangular Pulse Duration (sec) r(t), Normalized Effective Transient Thermal Resistance

DUTY CYCLE − DESCENDING ORDER

SINGLE PULSE

P_DM

t₁ t₂

10⁰ 100 ms

30 ms

10 ms 1 ms

1

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Figure 13. Gate Charge Test Circuit & Waveform

Figure 14. Resistive Switching Test Circuit & Waveforms

Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms RL

V_DS VGS

VGS

RG

DUT

VDD

V_DS

V_GS10%

90%

10%

90% 90%

t_on t_off

t_r t_f

td(on) td(off)

Q_g

Q_gd Q_gs

VGS

Charge V_DS

V_GS

R_L

DUT IG = Const.

V_DD VDS

R_G

VGS DUT

L

ID

tp

V_DD

t_p Time

IAS

BV_DSS

I_D(t)

V_DS(t) E_AS+1

2@LI_AS²

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Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT

L

VDD

RG

I_SD

V_DS +

−

VGS

Same Type as DUT

− dv/dt controlled by R_G

− I_SD controlled by pulse period Driver

V_GS (Driver)

ISD

(DUT)

V_DS

(DUT) V_SD

I_RM

10 V

di/dt

V_DD I_FM, Body Diode Forward Current

Body Diode Reverse Current

Body Diode Recovery dv/dt

Body Diode Forward Voltage Drop D+ Gate Pulse Width

Gate Pulse Period

SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.

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TO−247−4LD CASE 340CJ

ISSUE A

DATE 16 SEP 2019

98AON13852G DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 TO−247−4LD

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information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

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Phone: 00421 33 790 2910

FCH023N65S3L4 MOSFET – Power, N-Channel, SUPERFET

MOSFET – Power,

N-Channel, SUPERFET ) III, Easy Drive

650 V, 75 A, 23 mW

Consequently, SUPERFET III MOSFET Easy drive series helps manage EMI issues and allows for easier design implementation.

• 700 V @ T

= 150 ° C

• Typ. R

= 19.5 m W

• Ultra Low Gate Charge (Typ. Q

= 222 nC)

• Low Effective Output Capacitance (Typ. C

= 1980 pF)

• 100% Avalanche Tested

• These Devices are Pb−Free and are RoHS Compliant

• Telecom / Server Power Supplies

• Industrial Power Supplies

• UPS / Solar

TYPICAL PERFORMANCE CHARACTERISTICS

TYPICAL PERFORMANCE CHARACTERISTICS

TYPICAL PERFORMANCE CHARACTERISTICS

N-Channel, SUPERFET ⁾ III, Easy Drive

• ^{700 V @ T}

• ^{Typ. R}