MOSFET - Power, N‐Channel, SUPERFET) III, Easy-Drive

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February, 2020 − Rev. 1 1 Publication Order Number:

FCMT080N65S3/D

N‐Channel, SUPERFET ⁾ III, Easy-Drive

650 V, 80 mW , 38 A

FCMT080N65S3

General Description

SUPERFET III MOSFET is ON Semiconductor’s brand−new high voltage super−junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on−resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate.

Consequently, SUPERFET III MOSFET Easy−drive series helps manage EMI issues and allows for easier design implementation.

The Power88 package is an ultra−slim surface−mount package (1 mm high) with a low profile and small footprint (8x8 mm

²

).

SUPERFET III MOSFET in a Power88 package offers excellent switching performance due to lower parasitic source inductance and separated power and drive sources. Power88 offers Moisture Sensitivity Level 1 (MSL 1).

Features

• ^{700 V @ T}

J

= 150°C

• ^{Typ R}

DS(on)

= 70 m

• Ultra Low Gate Charge (Typ. Q

g

= 71 nC)

• Low Effective Output Capacitance (Typ. C

_oss(eff.)

= 570 pF)

• 100% Avalanche Tested

• These Devices are Pb−Free and are RoHS Compliant

Applications

• Telecom / Server Power Supplies

• Industrial Power Supplies

• UPS / Solar

S2S2 G S1 www.onsemi.com

TDFN4 8X8 CASE 520AB

See detailed ordering and shipping information on page 2 of this data sheet.

ORDERING INFORMATION MARKING DIAGRAM

FCMT 080N65S3 AWLYWW

FCMT080N65S3 = Specific Device Code

A = Assembly Location

WL = Wafer Lot

Y = Year

WW = Work Week

V_DSS R_DS(ON) MAX I_D MAX

650 V 80 m @ 10 V 38 A

D

S2 G

POWER MOSFET S1

S1: Driver Source S2: Power Source

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ABSOLUTE MAXIMUM RATINGS (T_C = 25°C, Unless otherwise specified)

Symbol Parameter Value Unit

VDSS Drain to Source Voltage 650 V

V_GSS Gate to Source Voltage DC ±30 V

AC (f > 1 Hz) ±30 V

I_D Drain Current Continuous (TC = 25°C) 38 A

Continuous (TC = 100°C) 24

I_DM Drain Current Pulsed (Note 1) 95 A

EAS Single Pulsed Avalanche Energy (Note 2) 180 mJ

I_AS Avalanche Current (Note 2) 4.6 A

EAR Repetitive Avalanche Energy (Note 1) 2.6 mJ

dv/dt MOSFET dv/dt 100 V/ns

Peak Diode Recovery dv/dt (Note 3) 20

PD Power Dissipation (T_C = 25°C) 260 W

Derate Above 25°C 2.08 W/°C

T_J, T_STG Operating and Storage Temperature Range −55 to +150 °C

T_L Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 s 300 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Repetitive rating: pulse−width limited by maximum junction temperature.

2. I_AS = 4.6 A, R_G = 25 starting T_J = 25°C

3. ISD ≤19 A, di/dt ≤200 A/s, VDD ≤400 V, starting TJ = 25°C THERMAL CHARACTERISTICS

Symbol Parameter Value Unit

R_JC Thermal Resistance, Junction to Case, Max. 0.48 °C/W

R_JA Thermal Resistance, Junction to Ambient, Max. (Note 4) 45 4. Device on 1 in² pad 2 oz copper pad on 1.5 x 1.5 in. board of FR−4 material.

ORDERING INFORMATION

Device Marking Package Reel Size Tape Width Quantity^†

FCMT080N65S3 FCMT080N65S3 TDFN4 13″ 13.3 mm 3000 Units

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

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www.onsemi.com 3

ELECTRICAL CHARACTERISTICS (T_C = 25°C unless otherwise noted)

Symbol Parameter Test Conditions Min Typ Max Unit

OFF CHARACTERISTICS

BVDSS Drain to Source Breakdown Voltage V_GS= 0 V, I_D= 1 mA, T_J= 25_C 650 − − V V_GS= 0 V, I_D= 1 mA, T_J= 150_C 700 − − V BVDSS/TJ Breakdown Voltage Temperature

Coefficient I_D= 1 mA, Referenced to 25_C − 0.63 − V/_C

I_DSS Zero Gate Voltage Drain Current V_DS= 650 V, V_GS= 0 V − − 10 A

V_DS= 520 V, T_C= 125_C − 3.0 −

I_GSS Gate to Body Leakage Current V_GS=±30 V, V_DS= 0 V − − ±100 nA

ON CHARACTERISTICS

V_GS(th) Gate Threshold Voltage V_GS= V_DS, I_D= 0.88 mA 2.5 − 4.5 V

R_DS(on) Static Drain to Source On Resistance V_GS= 10 V, I_D= 19 A − 70 80 m

g_FS Forward Transconductance V_DS= 20 V, I_D= 19 A − 21 − S

DYNAMIC CHARACTERISTICS C_iss Input Capacitance

V_DS= 400 V, V_GS= 0 V, f = 1 MHz − 2765 − pF

C_oss Output Capacitance − 65 − pF

Coss(eff.) Effective Output Capacitance VDS= 0 V to 400 V, VGS= 0 V − 570 − pF Coss(er.) Energy Related Output Capacitance VDS= 0 V to 400 V, VGS= 0 V − 94 − pF

Qg(tot) Total Gate Charge at 10V

VDS= 400 V, ID= 19 A, VGS= 10 V (Note 5)

− 71 − nC

Qgs Gate to Source Gate Charge − 16 − nC

Qgd Gate to Drain “Miller” Charge − 29 − nC

ESR Equivalent Series Resistance f = 1 MHz − 0.55 −

SWITCHING CHARACTERISTICS td(on) Turn-On Delay Time

V_DD= 400 V, I_D= 19 A, VGS= 10 V, Rg= 4.7

(Note 5)

− 24 − ns

tr Turn-On Rise Time − 28 − ns

td(off) Turn-Off Delay Time − 71 − ns

tf Turn-Off Fall Time − 5.4 − ns

SOURCE-DRAIN DIODE CHARACTERISTICS

I_S Maximum Continuous Source to Drain Diode Forward Current − − 38 A

I_SM Maximum Pulsed Source to Drain Diode Forward Current − − 95 A

V_SD Source to Drain Diode Forward

Voltage V_GS= 0 V, I_SD= 19 A − − 1.2 V

t_rr Reverse Recovery Time V_DD= 400 V, I_SD= 19 A, dI_F/dt = 100 A/s

− 405 − ns

Q_rr Reverse Recovery Charge − 7.7 − C

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

5. Essentially independent of operating temperature typical characteristics.

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TYPICAL CHARACTERISTICS

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics V_DS, DRAIN−TO−SOURCE VOLTAGE (V) V_GS, GATE−TO−SOURCE VOLTAGE (V)

1 0.10.1

1

5.5 12.5

Figure 3. On−Resistance Variation vs. Drain

Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and

Temperature

I_D, DRAIN CURRENT (A) V_SD, BODY DIODE FORWARD VOLTAGE (V)

80 60

0.05 20

1.5 0.0010

100 10K

10

ID, DRAIN CURRENT (A) IS, REVERSE DRAIN CURRENT (A)

CAPACITANCE (pF) TE−TO−SOURCE VOLTAGE (V)

ID = 19 A VDS = 130 V 0.1

10 100

100K

1K

7.5 4.5

3.5 10

100

0.15

0.01 20

V_GS = 10 V

0 40

5.0 V

0.10 10

0.5 1.0

10

ID, DRAIN CURRENT (A)

V_DS = 20 V 250 s Pulse Test

RDS(on), DRAIN−TO−SOURCE ON−RESISTANCE ()

5.5 V

6.0 V 6.5 V

7.0 V

250 s Pulse Test TC = 25°C

6.5

V_GS = 0 V 250 s Pulse Test

TJ = 25°C T_J = 150°C

T_J = −55°C

T_C = 25°C

V_GS = 10 V

V_GS = 20 V

T_J = 25°C TJ = 150°C

T_J = −55°C 1

100

f = 1 MHz V_GS = 0 V

C_iss

C_oss C_rss

4 6

8 V_DS = 400 V

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TYPICAL CHARACTERISTICS

Figure 7. Breakdown Voltage Variation

vs. Temperature Figure 8. On−Resistance Variation

vs. Temperature

T_J, JUNCTION TEMPERATURE (°C) T_J, JUNCTION TEMPERATURE (°C)

0 0.8 −50

0 −50 0.5 1.5 3.0

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature T_C, CASE TEMPERATURE (°C)

125 150

0 50

Figure 11. E_OSS vs. Drain−to−Source Voltage V_DS, DRAIN−TO−SOURCE VOLTAGE (V)

V_DS, DRAIN−TO−SOURCE VOLTAGE (V)

1000 10

0.11 10 100

5

BVDSS, [NORMALIZED] DRAIN−TO− SOURCE BREAKDOWN VOLTAGE RDS(on), [NORMALIZED] DRAIN−TO− SOURCE ON−RESISTANCEID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)EOSS (J)

390

30 s

1 ms

TC = 25°C DC Single Pulse T_J = 150°C 0.9

1.1

260 20

1.2

40

10

50 100

2.5

1.0

0 650

0 1

100

0 150

150

25

50 100

100 75

1.0

520 200

100 s

10 ms Operation in this

Area is Limited by R_DS(on)

30

20

10 VGS = 0 V

ID = 10 mA VGS = 10 V

ID = 19 A

2.0

130 15

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TYPICAL CHARACTERISTICS

Figure 12. Transient Thermal Response Curve t, RECTANGULAR PULSE DURATIONTIME (s) 0.001

0.1 1 2

r(t) NORMALIZED EFFECTIVE TRAN- SIENT THERMAL RESISTANCE

Single Pulse 50% Duty Cycle

20%

10%

5%

2%

0.01 1% ^P^DM

t₁

Notes:

Z_JC (t) = r(t) x R_JC R_JC = 0.48°C/W

Peak T_J = P_DM x Z_JC (t) + T_C Duty Cycle, D = t₁/t₂

t₂

10⁻⁵ 10⁻⁴ 10⁻³ 10⁻² 10⁻¹ 10⁰

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Figure 13. Gate Charge Test Circuit & Waveform

Figure 14. Resistive Switching Test Circuit & Waveforms

Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms RL

V_DS VGS

VGS

RG

DUT

VDD

V_DS

V_GS10%

90%

10%

90% 90%

t_on t_off

t_r t_f

td(on) td(off)

Q_g

Q_gd Q_gs

VGS

Charge V_DS

V_GS

R_L

DUT IG = Const.

V_DD VDS

R_G

VGS DUT

L

ID

tp

V_DD

t_p Time

IAS

BV_DSS

I_D(t)

V_DS(t) E_AS+1

2@LI_AS²

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Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT

L

VDD

RG

I_SD

V_DS +

−

VGS

Same Type as DUT

− dv/dt controlled by R_G

− I_SD controlled by pulse period Driver

V_GS (Driver)

ISD

(DUT)

V_DS

(DUT) V_SD

I_RM

10 V

di/dt

V_DD I_FM, Body Diode Forward Current

Body Diode Reverse Current

Body Diode Recovery dv/dt

Body Diode Forward Voltage Drop D+ Gate Pulse Width

Gate Pulse Period

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TDFN4 8x8, 2P CASE 520AB

ISSUE O

DATE 24 APR 2019

XXXX = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking.

GENERIC MARKING DIAGRAM*

XXXXXXXX XXXXXXXX AWLYWW

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.

98AON73688G DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 TDFN4 8x8, 2P

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information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products

MOSFET - Power, N‐Channel, SUPERFET) III, Easy-Drive

N‐Channel, SUPERFET ) III, Easy-Drive

650 V, 80 mW , 38 A

FCMT080N65S3

Consequently, SUPERFET III MOSFET Easy−drive series helps manage EMI issues and allows for easier design implementation.

The Power88 package is an ultra−slim surface−mount package (1 mm high) with a low profile and small footprint (8x8 mm

).

SUPERFET III MOSFET in a Power88 package offers excellent switching performance due to lower parasitic source inductance and separated power and drive sources. Power88 offers Moisture Sensitivity Level 1 (MSL 1).

• 700 V @ T

= 150°C

• Typ R

= 70 m

• Ultra Low Gate Charge (Typ. Q

= 71 nC)

• Low Effective Output Capacitance (Typ. C

= 570 pF)

• 100% Avalanche Tested

• These Devices are Pb−Free and are RoHS Compliant

• Telecom / Server Power Supplies

• Industrial Power Supplies

• UPS / Solar

TYPICAL CHARACTERISTICS

TYPICAL CHARACTERISTICS

TYPICAL CHARACTERISTICS

N‐Channel, SUPERFET ⁾ III, Easy-Drive

• ^{700 V @ T}

• ^{Typ R}