SUPERFET ) II
600 V, 52 A, 72 mW
FCH072N60
Description
SUPERFET II MOSFET is ON Semiconductor’s brand−new high voltage super−junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on−resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate and higher avalanche energy.
Consequently, SUPERFET II MOSFET is suitable for various AC/DC power conversion for system miniaturization and higher efficiency.
Features
• Typ. R
DS(on)= 66 m W
• 650 V @ T
J= 150 ° C
• Ultra Low Gate Charge (Typ. Q
g= 95 nC)
• Low Effective Output Capacitance (Typ. C
oss(eff.)= 421 pF)
• 100% Avalanche Tested
• These Devices are Pb−Free and are RoHS Compliant
Applications• Telecom / Sever Power Supplies
• Industrial Power Supplies
www.onsemi.com
N-CHANNEL MOSFET
MARKING DIAGRAM
VDS RDS(ON) MAX ID MAX
600 V 72 mW @ 10 V 52 A
G
S D
DG S
G
TO−247−3LD CASE 340CK
$Y&Z&3&K FCH 072N60
ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Symbol Parameter FCH072N60 Unit
VDSS Drain to Source Voltage 600 V
VGSS Gate to Source Voltage − DC ±20 V
− AC (f > 1 Hz) ±30
ID Drain Current: − Continuous (TC = 25°C) 52 A
− Continuous (TC = 100°C) 33
IDM Drain Current: − Pulsed (Note 1) 156 A
EAS Single Pulsed Avalanche Energy (Note 2) 1128 mJ
IAR Avalanche Current (Note 1) 9.5 A
EAR Repetitive Avalanche Energy (Note 1) 4.8 mJ
dv/dt MOSFET dv/dt 100 V/ns
Peak Diode Recovery dv/dt (Note 3) 20
PD Power Dissipation (TC = 25°C) 481 W
− Derate Above 25°C 3.85 W/°C
TJ, TSTG Operating and Storage Temperature Range −55 to + 150 °C
TL Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds 300 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. IAS = 9.5 A, RG = 25 W, Starting TJ = 25 °C.
3. ISD ≤ 26 A, di/dt ≤ 200 A/ms, VDD ≤380 V, Starting TJ = 25 °C.
PACKAGE MARKING AND ORDERING INFORMATION
Part Number Top Marking Package Packing Method Reel Size Tape Width Quantity
FCH072N60 FCH072N60 TO−247 Tube N/A N/A 30 Units
THERMAL CHARACTERISTICS
Symbol Parameter FCH072N60 Unit
RqJC Thermal Resistance, Junction to Case, Max. 0.26 °C/W
RqJA Thermal Resistance, Junction to Ambient, Max. 40
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Symbol Parameter Test Condition Min. Typ. Max. Unit
OFF CHARACTERISTICS
BVDSS Drain to Source Breakdown Voltage ID = 10 mA, VGS = 0 V, TJ = 25°C 600 − − V ID = 10 mA, VGS = 0 V, TJ = 150°C 650 − −
DBVDSS
/DTJ
Breakdown Voltage Temperature
Coefficient ID = 10 mA, Referenced to 25°C − 0.67 − V/°C
IDSS Zero Gate Voltage Drain Current VDS = 600 V, VGS = 0 V − − 1 mA
VDS = 480 V, VGS = 0 V, TC = 125 °C − 4.1 −
IGSS Gate to Body Leakage Current VGS = ±20 V, VDS = 0 V − − ±100 nA
ON CHARACTERISTICS
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 mA 2.5 − 3.5 V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 26 A − 66 72 mW
gFS Forward Transconductance VDS = 20 V, ID = 26 A − 48 − S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 380 V, VGS = 0 V, f = 1 MHz − 4430 5890 pF
Coss Output Capacitance − 115 155 pF
Crss Reverse Transfer Capacitance − 4.43 − pF
Coss(eff.) Effective Output Capacitance VDS = 0 V to 480 V, VGS = 0 V − 421 − pF Qg(tot) Total Gate Charge at 10 V VDS = 380 V, ID = 26 A, VGS = 10 V
(Note 4) − 95 125 nC
Qgs Gate to Source Gate Charge − 21 − nC
Qgd Gate to Drain “Miller” Charge − 24 − nC
ESR Equivalent Series Resistance f = 1 MHz − 0.93 − W
SWITCHING CHARACTERISTICS
td(on) Turn-On Delay Time VDD = 380 V, ID = 26 A, VGS = 10 V, Rg = 4.7 W (Note 4)
− 33 76 ns
tr Turn−On Rise Time − 23 56 ns
td(off) Turn-Off Delay Time − 97 204 ns
tf Turn−Off Fall Time − 3.5 17 ns
DRAIN-SOURCE DIODE CHARACTERISTICS
IS Maximum Continuous Source to Drain Diode Forward Current − − 52 A
ISM Maximum Pulsed Drain to Source Diode Forward Current − − 156 A
VSD Drain to Source Diode Forward Voltage VGS = 0 V, ISD = 26 A − − 1.2 V
trr Reverse Recovery Time VGS = 0 V, ISD = 26 A,
dIF/dt = 100 A/ms − 495 − ns
Qrr Reverse Recovery Charge − 13 − mC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature.
TYPICAL CHARACTERISTICS
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On−Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature ID, Drain Current [A]
RDS(on) [W], ID, Drain Current [A] ID, Drain Current [A]
0.0 0.3 0.6 0.9 1.2 1.5
0.001 0.01 0.1 1 10 100200
0.1 1 10 20
1 10 100 200
VDS, Drain−Source Voltage[V]
VGS = 10.0 V 8.0 V 7.0 V 6.0 V 5.0 V 4.5 V 4.0 V
*Notes:
1. 250 ms Pulse Test 2. TC = 25°C
2 3 4 5 6 7
1 10 100 200
−55oC 150oC
25oC
VGS, Gate−Source Voltage[V]
*Notes:
1. VDS = 20 V 2. 250 ms Pulse Test
*Note: TC = 25oC
VGS = 20V VGS = 10V
Drain−Source On−Resistance
0 40 80 120 160
0.06 0.09 0.12 0.15
150oC
IS, Reverse Drain Current [A]
VSD, Body Diode Forward Voltage [V]
25oC
*Notes:
1. VGS = 0 V 2. 250 ms Pulse Test
100 1000 10000 100000
Coss Ciss
*Notes:
1. VGS = 0 V 2. f = 1 MHz
VDS = 300V VDS = 120V
VDS = 480V
*Note: ID = 26A
−Source Voltage [V]
4 6 8 10
TYPICAL CHARACTERISTICS
Figure 7. Breakdown Voltage Variation vs. Temperature
Figure 8. On−Resistance Variation vs. Temperature
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature
−100 −50 0 50 100 150 200
0.8 0.9 1.0 1.1 1.2
BVDSS, [Normalized] Drain−Source Breakdown Voltage
TJ, Junction Temperature [oC]
*Notes:
1. VGS = 0 V 2. ID = 10 mA
Eoss, [mJ ]
0.1 1 10 100 1000
0.1 1 10 100 300
10 100 1ms 10ms
ID, Drain Current [A]
VDS, Drain−Source Voltage [V]
Operation in This Area DC is Limited by RDS(on)
*Notes:
1. TC = 25°C 2. TJ = 150°C 3. Single Pulse
ms ms
12 18 24 30
25 50 75 100 125 150
0 12 24 36 48 60
ID, Drain Current [A]
TC, Case Temperature [oC]
−100 −50 0 50 100 150 200
0.5 1.0 1.5 2.0 2.5
RDS(on), [Normalized] Drain−Source On−Resistance
TJ, Junction Temperature [ oC]
*Notes:
1. VGS = 10 V 2. ID = 26 A
TYPICAL CHARACTERISTICS
Figure 12. Transient Thermal Response Curve
ZqJC(t), Thermal Response [°C/W]
10−5 10−4 10−3 10−2 10−1 100
0.01 0.1 0.5
0.1
0.02 0.5
Single pulse
t1, Rectangular Pulse Duration [sec]
0.1
0.01 0.05 0.2
*Notes:
1. ZqJC(t) = 0.26°C/W Max.
2. Duty Factor, D = t1/t2 3. TJM − TC = PDM * ZqJC(t)
PDM t1
t2
Figure 13. Gate Charge Test Circuit & Waveform
Figure 14. Resistive Switching Test Circuit & Waveforms
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms RL
VDS VGS
VGS
RG
DUT
VDD
VDS
VGS10%
90%
10%
90% 90%
ton toff
tr tf
td(on) td(off)
Qg Qgd Qgs
VGS
Charge VDS
VGS
RL
DUT IG = Const.
VDD VDS
RG VGS DUT
L
ID
tp
VDD
tp Time
IAS
BVDSS
ID(t)
VDS(t) EAS+1
2@LIAS2
DUT
L
VDD RG
ISD
VSD +
−
VGS
Same Type as DUT
− dv/dt controlled by RG
− ISD controlled by pulse period Driver
VGS (Driver)
ISD (DUT)
VDS
(DUT) VSD
IRM
10 V
di/dt
VDD
IFM, Body Diode Forward Current
Body Diode Reverse Current Body Diode Recovery dv/dt
Body Diode Forward Voltage Drop D+ Gate Pulse Width
Gate Pulse Period
TO−247−3LD SHORT LEAD CASE 340CK
ISSUE A
DATE 31 JAN 2019
XXXX = Specific Device Code A = Assembly Location Y = Year
WW = Work Week ZZ = Assembly Lot Code
GENERIC MARKING DIAGRAM*
AYWWZZ XXXXXXX XXXXXXX
E
D
L1 E2
(3X) b (2X) b2
b4
(2X) e
Q
L
0.25 M B A M A
A1 A2 A
c
B
D1 P1
S P
E1
D2
1 2 3 2