• 検索結果がありません。

MOSFET – Dual, N-Channel,POWERTRENCH),SyncFETt

N/A
N/A
Protected

Academic year: 2022

シェア "MOSFET – Dual, N-Channel,POWERTRENCH),SyncFETt"

Copied!
11
0
0

読み込み中.... (全文を見る)

全文

(1)

MOSFET – Dual, N-Channel, POWERTRENCH ) ,

SyncFETt

FDS6900AS, FDS6900AS-G

General Description

The FDS6900AS is designed to replace two single SO−8 MOSFETs and Schottky diode in synchronous dc−dc power supplies that provide various peripheral voltages for notebook computers and other battery powered electronic devices. FDS6900AS contains two unique 30 V, N−channel, logic level, POWERTRENCH MOSFETs designed to maximize power conversion efficiency.

The high−side switch (Q1) is designed with specific emphasis on reducing switching losses while the lowside switch (Q2) is optimized to reduce conduction losses. Q2 also includes an integrated Schottky diode using onsemi’s monolithic SyncFET technology.

Features

Q2: Optimized to Minimize Conduction Losses Includes SyncFET Schottky Body Diode, 8.2 A, 30 V

R

DS(on)

= 22 mW at V

GS

= 10 V

R

DS(on)

= 28 m W at V

GS

= 4.5 V

Q1: Optimized for Low Switching Losses Low Gate Charge (11 nC typical), 6.9 A, 30 V

R

DS(on)

= 27 mW at V

GS

= 10 V

R

DS(on)

= 34 m W at V

GS

= 4.5 V

100% R

G

(Gate Resistance) Tested

• These Devices are Pb−Free and are RoHS Compliant

Specifications

ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)

Symbol Parameter Q2 Q1 Units

VDSS Drain−Source Voltage 30 30 V

VGSS Gate−Source Voltage ±20 ±20 V

ID Drain Current

− Continuous (Note 1a)

− Pulsed 8.2

30 6.9

20 A

PD Power Dissipation for Dual Operation 2 W Power Dissipation for Single Operation

(Note 1a) (Note 1b) (Note 1c)

1.61 0.9

SOIC8 CASE 751EB

MARKING DIAGRAM

FDS6900AS = Specific Device Code

A = Assembly Site

L = Wafer Lot Number

YW = Assembly Start Week ELECTRICAL CONNECTION

Device Package Shipping ORDERING INFORMATION

FDS6900AS SOIC8

(Pb−Free) 2,500 / Tape & Reel G2S2

D1D1 S1D2S1D2 S1D2G1

Pin 1

FDS6900AS ALYW

8 1

7 2

6 3

5 4

Dual N−Channel SyncFet

Q1

Q2

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.

FDS6900AS−G SOIC8

(Pb−Free) 2,500 / Tape & Reel

(2)

THERMAL CHARACTERISTICS

Symbol Parameter Ratings Units

RqJA Thermal Resistance, Junction−to−Ambient (Note 1a) 78 °C/W

RqJC Thermal Resistance, Junction−to−Case (Note 1) 40 °C/W

Table 1. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Symbol Parameter Conditions Type Min Typ Max Units

OFF CHARACTERISTICS

BVDSS Drain to Source Breakdown Voltage ID = 1 mA, VGS = 0 V ID = 250mA, VGS = 0 V

Q2 Q1

30 30

V

DBVDSS / DTJ

Breakdown Voltage Temperature

Coefficient ID = 10 mA, referenced to 25°C ID = 250mA, referenced to 25°C

Q2 Q1

27 22

mV/°C

IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V Q2 Q1

500

1 mA

IGSS Gate−Body Leakage Current VGS = ±20 V, VDS = 0 V Q2 Q1

±100 nA

ON CHARACTERISTICS (Note 2)

VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 1 mA VGS = VDS, ID = 250mA

Q2 Q1

1 1

1.9 1.9

3 3

V

DVGS(th) / DTJ

Gate to Source Threshold Voltage

Temperature Coefficient ID = 10 mA, referenced to 25°C ID = 250mA, referenced to 25°C

Q2 Q1

−3.2

−4.2

mV/°C

RDS(on) Static Drain−Source On−Resistance VGS = 10 V, ID = 8.2 A

VGS = 10 V, ID = 8.2 A, TJ = 125°C VGS = 4.5 V, ID = 7.6 A

Q2 17

23 21

22 36 28

mW

VGS = 10 V, ID = 6.9 A

VGS = 10 V, ID = 6.9 A, TJ = 125°C VGS = 4.5 V, ID = 6.2 A

Q1 22

30 27

27 38 34

ID(on) On−State Drain Current VGS = 10 V, VDS = 5 V Q2

Q1

30 20

A

gFS Forward Transconductance VDS = 5 V, ID = 8.2 A VDS = 5 V, ID = 6.9 A

Q2 Q1

25 21

S

DYNAMIC CHARACTERISTICS

Ciss Input Capacitance VDS = 15 V, VGS = 0 V, f = 1 MHz Q2 Q1

570 600

pF

Coss Output Capacitance Q2

Q1

180 150

pF

Crss Reverse Transfer Capacitance Q2

Q1

70 70

pF

RG Gate Resistance Q2

Q1

2.8 2.2

4.9

3.8 W

SWITCHING CHARACTERISTICS (Note 2)

td(on) Turn−On Delay Time VDD = 15 V, ID = 1 A, VGS = 10 V,

RGEN = 6 W Q2

Q1

10 9

19 18

ns

tr Turn−On Rise Time Q2

Q1

5 4

10 8

ns

td(off) Turn−Off Delay Time Q2

Q1

26 23

42 32

ns

tf Turn−Off Fall Time Q2

Q1

3 3

6 6

ns

(3)

Table 1. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (continued)

Symbol Parameter Conditions Type Min Typ Max Units

SWITCHING CHARACTERISTICS (Note 2)

td(on) Turn−On Delay Time VDD = 15 V, ID = 1 A, VGS = 4.5 V,

RGEN = 6 W Q2

Q1

11 10

20 19

ns

tr Turn−On Rise Time Q2

Q1

15 9

27 18

ns

td(off) Turn−Off Delay Time Q2

Q1

16 14

29 25

ns

tf Turn−Off Fall Time Q2

Q1

6 4

12 8

ns

Qg(TOT) Total Gate Charge at VGS = 10 V Q2: VDS = 15 V, ID = 8.2 A Q1: VDS = 15 V, ID = 6.9 A

Q2 Q1

10 11

15 15

nC

Qg Total Gate Charge at VGS = 5 V Q2

Q1

5.8 6.1

8.2 8.5

nC

Qgs Gate−Source Charge Q2

Q1

1.6 1.7

nC

Qgd Gate−Drain Charge Q2

Q1

2.1 2.2

nC

DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain−Source

Diode Forward Current Q2

Q1

2.3 1.3

A

Trr Reverse Recovery Time IF = 8.2 A, diF/dt = 300 A/ms

(Note 3) Q2 15 ns

Qrr Reverse Recovery Charge 6 nC

Trr Reverse Recovery Time IF = 6.9 A, diF/dt = 100 A/ms

(Note 3) Q1 19 ns

Qrr Reverse Recovery Charge 10 nC

VSD Drain−Source Diode Forward

Voltage VGS = 0V, IS = 2.3 A (Note 2) VGS = 0V, IS = 5 A (Note 2) VGS = 0V, IS = 1.3 A (Note 2)

Q2 Q2 Q1

0.6 0.7 0.7

0.7 1.0 1.2

V

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

NOTES:

1. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design while RqCA is determined by the user’s board design.

a.

78°C/W when mounted on a 0.5 in2 pad of 2 oz copper.

b.

125°C/W when mounted on a 0.02 in2 pad of 2 oz copper.

c.

135°C/W when mounted on a minimum pad

2. Pulse Test: Pulse Width < 300ms, Duty cycle < 2.0%.

3. See “SyncFET Schottky body diode characteristics” below.

(4)

TYPICAL CHARACTERISTICS: Q2

Figure 1. On−Region Characteristics Figure 2. On−Resistance Variation with Drain Current and Gate Voltage

Figure 3. On−Resistance Variation with

Temperature Figure 4. On−Resistance Variation with

Gate−to−Source Voltage

Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature

0 10 20 30

0 0.5 1 1.5 2 2.5 3

VDS, DRAIN−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

4.5V

3.0V VGS = 10V 4.0V

6.0V

2.5V 3.5V

0.6 0.8 1 1.2 1.4 1.6

−50 −25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC) RDS(ON), NORMALIZED DRAINSOURCE ONRESISTANCE

ID = 8.2A VGS = 10V

0 5 10 15 20 25 30

1.5 2 2.5 3 3.5 4

VGS, GATE TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

TA = 125oC

25oC

−55oC VDS = 5V

0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4

0 5 10 15 20 25 30

ID, DRAIN CURRENT(A) RDS(ON), NORMALIZED DRAINSOURCE ONRESISTANCE

VGS = 3.0V

6.0V 10V 4.5V

4.0V

5.0V 3.5V

0.01 0.02 0.03 0.04 0.05 0.06

2

VGS, GATE TO SOURCE VOLTAGE (V) RDS(ON), ONRESISTANCE (OHM)

ID = 4A

TA = 125oC

TA = 25oC

0.001 0.01 0.1 1 10 100

0

VSD, BODY DIODE FORWARD VOLTAGE (V) IS, REVERSE DRAIN CURRENT (A)

TA= 125oC

25oC

−55oC VGS = 0V

4 6 8 10

0.2 0.4 0.6 0.8 1

(5)

TYPICAL CHARACTERISTICS: Q2

(Continued)

Figure 7. Gate Charge Characteristics Figure 8. Capacitance Characteristics

Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation

Figure 11. Transient Thermal Response Curve

0 2 4 6 8 10

0 3 6 9 12

Qg, GATE CHARGE (nC) VGS, GATESOURCE VOLTAGE (V)

ID =8.2A

VDS = 10V

20V

15V

0 200 400 600 800

0 5 10 15 20 25 30

VDS, DRAIN TO SOURCE VOLTAGE (V)

CAPACITANCE (pF)

Ciss

Crss

Coss

f = 1MHz VGS = 0 V

0.01 0.1 1 10 100

0.1 1 10 100

VDS, DRAIN−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

DC10s 1s

100ms

μ 100 s RDS(ON) LIMIT

VGS = 10V SINGLE PULSE RqJA = 135oC/W TA = 25oC

10ms1ms

0 10 20 30 40 50

0.001

t1, TIME (sec)

P(pk), PEAK TRANSIENT POWER (W)

SINGLE PULSE RqJA = 135°C/W TA = 25°C

0.001 0.01 0.1 1

0.0001 0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec) r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE

RqJA(t) = r(t) * RqJA

RqJA = 135 °C/W

TJ − TA = P * RqJA(t) Duty Cycle, D = t1/ t2 (p )

P k t1

t2 SINGLE PULSE

0.01 0.02 0.05 0.1 0.2 D = 0.5

0.01 0.1 1 10 100 1000

(6)

TYPICAL CHARACTERISTICS: Q1

Figure 12. On−Region Characteristics Figure 13. On−Resistance Variation with Drain Current and Gate Voltage

Figure 14. On−Resistance Variation with

Temperature Figure 15. On−Resistance Variation with Gate−to−Source Voltage

Figure 16. Transfer Characteristics Figure 17. Body Diode Forward Voltage Variation with Source Current and Temperature

0 4 8 12 16 20

0 0.4 0.8 1.2 1.6 2

VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

VGS = 10V

6.0V

3.0V 3.5V

4.5V

2.5V 4.0V

0 4 8 12 16 20

1 1.5 2 2.5 3 3.5 4

VGS, GATE TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

TA = 125oC

25oC

−55oC VDS = 5V

0.8 1 1.2 1.4 1.6 1.8 2 2.2

0

ID, DRAIN CURRENT (A) RDS(ON), NORMALIZED DRAINSOURCE ONRESISTANCE

VGS = 3.0V

4.5V

6.0V 4.0V

10V 3.5V

5.0V

4 8 12 16 20

0.6 0.8 1 1.2 1.4 1.6

−50 −25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC) RDS(ON), NORMALIZED DRAINSOURCE ONRESISTANCE

ID = 6.9A VGS = 10V

0.02 0.03 0.04 0.05 0.06 0.07

2 4 6 8 10

VGS, GATE TO SOURCE VOLTAGE (V) RDS(ON), ONRESISTANCE (OHM)

ID = 3.5A

TA = 125oC

TA = 25oC

0.0001 0.001 0.01 0.1 1 10 100

0 0.2 0.4 0.6 0.8 1 1.2

VSD, BODY DIODE FORWARD VOLTAGE(V) IS, REVERSE DRAIN CURRENT (A)

VGS = 0V

TA = 125oC 25oC

−55oC

(7)

TYPICAL CHARACTERISTICS: Q1

(Continued)

Figure 18. Gate Charge Characteristics Figure 19. Capacitance Characteristics

Figure 20. Maximum Safe Operating Area Figure 21. Single Pulse Maximum Power Dissipation

Figure 22. Transient Thermal Response Curve

0 2 4 6 8 10

0 2 4 6 8 10 12

Qg, GATE CHARGE (nC) VGS, GATESOURCE VOLTAGE (V)

ID = 6.9A

VDS = 10V

15V 20V

0.01 0.1 1 10 100

0.1 1 10 100

VDS, DRAIN−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

DC

10s1s100ms

μ 100 s RDS(ON) LIMIT

VGS = 10V SINGLE PULSE RqJA = 135oC/W TA = 25oC

10ms1ms

0 200 400 600 800

0 5 10 15 20 25 30

VDS, DRAIN TO SOURCE VOLTAGE (V)

CAPACITANCE (pF)

Ciss

Coss

Crss

f = 1 MHz VGS = 0 V

0 10 20 30 40 50

0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec)

P(pk), PEAK TRANSIENT POWER (W) SINGLE PULSE

RqJA = 135°C/W TA = 25°C

0.001 0.01 0.1 1

0.0001 0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec) r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE

RqJA(t) = r(t) * RqJA

RqJA = 135oC/W

TJ − TA = P * RqJA(t) Duty Cycle, D = t1/ t2

(p ) P k

t1

t2

SINGLE PULSE 0.01 0.02 0.05 0.1 0.2 D = 0.5

(8)

TYPICAL CHARACTERISTICS

(Continued)

SyncFET Schottky Body Diode Characteristics

onsemi’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 23 shows the reverse recovery characteristic of the FDS6900AS.

Figure 23. FDS6900AS SyncFET Body Diode Reverse Recovery Characteristics

Current: 1.6A/DIV

Time: 10nS/DIV

For comparison purposes, Figure 24 shows the reverse recovery characteristics of the body diode of an equivalent size MOSFET produced without SyncFET (FDS6690).

Figure 24. Non−SyncFET (FDS6690) Body Diode Reverse Recovery Characteristics

Time: 10nS/DIV

Current: 1.6A/DIV

Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device.

Figure 25. SyncFET Body Diode Reverse Leakage versus Drain−Source Voltage and

Temperature

0.000001 0.00001 0.0001 0.001 0.01

0 5 10 15 20 25 30

VDS, REVERSE VOLTAGE (V) IDSS, REVERSE LEAKAGE CURRENT (A)

125oC

25oC 100oC

(9)

TYPICAL CHARACTERISTICS

(Continued)

Figure 26. Unclamped Inductive Load Test Circuit Figure 27. Unclamped Inductive Waveforms

Figure 28. Gate Charge Test Circuit Figure 29. Gate Charge Waveform

V L

DS

R

GE

DUT

V

GS

I

0.01 Ω

AS

V

DD

+

tp 0V vary tP to obtain required peak IAS

V

GS

t

AV

t

P

I

AS

V

DS

V

DD

BV

DSS

DUT

V

DD

V

GS

I

g(REF

+

+

Same type as Drain Current

10V 50kΩ

V

GS

Q

GS

Q

GD

Q

G(TOT)

10V

Charge, (nC)

Figure 30. Switching Time Test Circuit Figure 31. Switching Time Waveform

V

DS

R

L

R

GEN

DUT V

DD

V

GS

Pulse Width v Dut C cle v 0.1%y y

V

GS

+

10 mF

1 mF

1 ms

t

r

t

f

t

d(ON)

t

d(OFF)

t

ON

t

OFF

Pulse Width

10%

10%

90%

10%

90%

50%

90%

50%

0V 0V

V

GS

V

DS

(10)

SOIC8 CASE 751EB

ISSUE A

DATE 24 AUG 2017

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

98AON13735G DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 SOIC8

(11)

information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license

参照

関連したドキュメント

information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of

information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of

information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of

Figure 29. The core is a 50 mW P−channel MOSFET and controller capable of functioning over a wide input operating range of 1.5 V to 5.5 V per channel. The EN and SEL pins

Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees,

Amount of Remuneration, etc. The Company does not pay to Directors who concurrently serve as Executive Officer the remuneration paid to Directors. Therefore, “Number of Persons”

information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any