MOSFET – Dual P-Channel POWERTRENCH)

MOSFET – Dual P-Channel POWERTRENCH ⁾

-30 V, -3.3 A, 87 mW

FDMA3027PZ ^,

FDMA3027PZ-F130

Description

This device is designed specifically as a single package solution for dual switching requirements such as gate driver for larger Mosfets. It features two independent P−Channel MOSFETs with low on−state resistance for minimum conduction losses.

The MicroFET 2x2 package offers exceptional thermal performance for its physical size and is well suited to linear mode applications. G−S zener has been added to enhance ESD voltage level.

Features

• ^{Max R}

= 87 m W at V

= −10 V, I

= −3.3 A

• ^{Max R}

= 152 m W at V

= −4.5 V, I

= −2.3 A

• HBM ESD Protection Level > 2 kV Typical (Note 3)

• Low Profile − 0.8 mm Maximum − in the New Package MicroFET 2x2 mm

• These Devices are Pb−Free and are RoHS Compliant

• Load Switch

• Discrete Gate Driver

MOSFET Maximum Ratings T_A = 25°C unless otherwise noted

Symbol Parameter Ratings Units

V_DS Drain to Source Voltage −30 V

V_GS Gate to Source Voltage ±25 V

I_D Drain Current −Continuous (Note 1a) −3.3 A

−Pulsed −15

P_D Power Dissipation (Note 1a) 1.4 W

Power Dissipation (Note 1b) 0.7 T_J, TSTG Operating and Storage Junction

Temperature Range −55 to +150 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

MARKING DIAGRAM WDFN6 2X2, 0.65P

CASE 511DA

G2 S1

G1 D2

D1

S2 1

2 3

6 5 4

Z = Assembly Plan Code XY = Date Code (Year & week) KK = Lot Run Traceability Code 327 = Specific Device Code

ZXYKK 327

D1 D2

S1 G1 D2

D1 G2 S2

PIN 1 PIN ASSIGNMENT

See detailed ordering and shipping information on page 7 of this data sheet.

ORDERING INFORMATION

THERMAL CHARACTERISTICS

RθJA Thermal Resistance for Single Operation, Junction to Ambient (Note 1a) 86 °C/W Thermal Resistance for Single Operation, Junction to Ambient (Note 1b) 173 °C/W Thermal Resistance for Dual Operation, Junction to Ambient (Note 1c) 69 °C/W Thermal Resistance for Dual Operation, Junction to Ambient (Note 1d) 151 °C/W Thermal Resistance for Single Operation, Junction to Ambient (Note 1e) 160 °C/W Thermal Resistance for Dual Operation, Junction to Ambient (Note 1f) 133 °C/W

ELECTRICAL CHARACTERISTICS TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BVDSS Drain to Source Breakdown Voltage I_D = −250 mA, VGS = 0 V −30 − − V DBV_DSS(th)

DT_J

Breakdown Voltage Temperature

Coefficient ID = −250 mA, referenced to 25°C − −22 − mV/°C

IDSS Zero Gate Voltage Drain Current VDS= −24 V, VGS= 0 V − − −1 mA

IGSS Gate to Source Leakage Current VGS = ±25 V, VDS = 0 V − − ±10 mA

On Characteristics

VGS(th) Gate to Source Threshold Voltage V_GS = V_DS, ID = −250 mA −1 −1.9 −3 V

DV_GS(th) DT_J

Gate to Source Threshold Voltage

Temperature Coefficient ID= −250 mA, referenced to 25°C − 5 − mV/°C R_DS(on) Static Drain to Source

On Resistance VGS = −10 V, ID = −3.3 A − 69 87 mW

VGS = −4.5 V, ID = −2.3 A − 108 152 VGS = −10 V, ID = −3.3 A,

T_J = 125°C − 97 122

gFS Forward Transconductance VDS = −5 V, ID = −3.3 A − 6 − S

Dynamic Characteristics

Ciss Input Capacitance V_DS = −15 V, V_GS = 0 V, f =1 MHz − 324 435 pF

Coss Output Capacitance − 59 80 pF

Crss Reverse Transfer Capacitance − 53 80 pF

Rg Gate Resistance − 12 − W

Switching Characteristics

t_d(on) Turn−On Delay Time V_DD = −15 V, I_D = −3.3 A,

VGS = −10 V, RGEN = 6 Ω − 5.2 11 ns

tr Rise Time − 3 10 ns

td(off) Turn−Off Delay Time − 17 31 ns

tf Fall Time − 11 25 ns

Q_g(TOT) Total Gate Charge V_GS = 0 V to −10 V,

VDD = −15 V, ID = −3.3 A − 7.2 10 nC

V_GS = 0 V to −5 V,

VDD = −15 V, ID = −3.3 A − 4.1 6 nC

Qgs Gate to Source Charge V_DD = −15 V,

I_D = −3.3 A − 1.0 − nC

Qgd Gate to Drain “Miller” Charge − 1.9 − nC

ELECTRICAL CHARACTERISTICS (continued) TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Drain−Source Diode Characteristics

VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = −3.3 A (Note 2) − −0.94 −1.3 V

trr Reverse Recovery Time IF = −3.3 A, di/dt = 100 A/ms − 20 32 ns

Qrr Reverse Recovery Charge − 10 18 nC

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

1. R_qJA is determined with the device mounted on a 1 in² oz. copper pad on a 1.5 x 1.5 in. board of FR−4 material. R_qJC is guaranteed by design while R_qJA is determined by the user’s board design.

(a) R_qJA = 86°C/W when mounted on a 1 in² pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB. For single operation.

(b) R_qJA = 173°C/W when mounted on a minimum pad of 2 oz copper. For single operation.

(c) R_qJA = 69°C/W when mounted on a 1 in² pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB. For dual operation.

(d) R_qJA = 151°C/W when mounted on a minimum pad of 2 oz copper. For dual operation.

(e) R_qJA = 160°C/W when mounted on a 30 mm² pad of 2 oz copper. For single operation.

(f) R_qJA = 133°C/W when mounted on a 30 mm² pad of 2 oz copper. For dual operation.

a. 86 °C/W when mounted on

a 1 in²pad of 2 oz copper b. 173 °C/W when mounted on

a minimum pad of 2 oz copper

c. 69 °C/W when mounted on a 1 in²pad of 2 oz copper

e. 160 °C/W when mounted on 30 mm² pad of 2 oz copper

d. 151 °C/W when mounted on a minimum pad of 2 oz copper

f. 133 °C/W when mounted on 30 mm² pad of 2 oz copper

2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0%

3. The diode connected between gate and source serves only as protection against ESD. No gate overvoltage rating is implied.

0 15

12 9

6

3 0

1 2 4 5

Figure 1. On−Region Characteristics

−ID, DRAIN CURRENT (A)

−V_DS, DRAIN TO SOURCE VOLTAGE (V)

Figure 2. Normalized On−Resistance vs Drain Current and Gate Voltage

−I_D, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON−RESISTANCE

Figure 3. Normalized On−Resistance vs Junction Temperature

Figure 4. On−Resistance vs Gate to Source Voltage

RDS(on), DRAIN TO SOURCE ON−RESISTANCE (mW) 1.6

−75 −50 25 0 25 50 75 100 125 150

T_J, JUNCTION TEMPERATURE (5C)

Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode 3

V_GS = −10 V VGS = −5 V

V_GS = −4.5 V

V_GS = −4 V

V_GS = −3.5 V

0 5 4

3

2

1 0

3 6 9 12 15

V_GS⁼−3.5 V

VGS = −4 V

V_GS = −5 V V_GS = −10 V

1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7

NORMALIZED DRAIN TO SOURCE ON−RESISTANCE I_D = −3 3 A

V_GS = −10 V

−V_GS, GATE TO SOURCE VOLTAGE (V) 400

300

200

100

02 4 66 8 10

ID = −3.3 A

T_J =125°C

TJ =125°C

V_DS = −5 V

TJ =150°C T_J =25°C

T_J =−55°C

−V_GS, GATE TO SOURCE VOLTAGE (V)

−ID, DRAIN CURRENT (A) 15

12 9

6 3

00 2 3 4 5 6

V_GS =0 V T_J =150°C

T_J =25°C T_J =−55°C

−IS, REVERSE DRAIN CURRENT (A) 20 10

1

0.1

0.01

0.001

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

−V_SD, BODY DIODE FORWARD VOLTAGE (V) V_GS = −3.5 V

PULSE DURATION = 80 ms

DUTY CYCLE = 0.5% MAX PULSE DURATION = 80 ms

DUTY CYCLE = 0.5% MAX

PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX

PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX

V_GS = −4.5 V

TYPICAL CHARACTERISTICS

Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage

Figure 9. Gate Leakage Current vs Gate to Source Voltage

−V_DS, DRAIN to SOURCE VOLTAGE (V) Figure 10. Forward Bias Safe Operating Area

−ID, DRAIN CURRENT (A)) 10

8

6

4 2

00 2 4 6 8

Q_g, GATE CHARGE (nC) I_D = −3.3 A V_DD = −15 V

V_DD = −10 V V_DD = −20 V

1000

100

10 0.1 1 10 30

Ciss

Coss

C_rss f = 1 MHz

VGS = 0 V

−V_DS, DRAIN TO SOURCE VOLTAGE (V)

CAPACITANCE (pF)

−VGS, GATE TO SOURCE VOLTAGE (V)

VDS = 0 V

T_J =125°C

TJ =25°C 10⁻¹

10⁻² 10⁻³ 10⁻⁴ 10⁻⁵ 10⁻⁶ 10⁻⁷ 10⁻⁸ 10⁻⁹

0 4 8 12 16 20 24 28 32

−V_GS, GATE TO SOURCE VOLTAGE (V)

−Ig, GATE LEAKAGE CURRENT (A)

1 ms 10 ms 100 ms

1 s10 s DC

THIS AREA IS LIMITED-

BY r_DS(on) SINGLE PULSE

TJ = MAX RATED)

R_qJA = ₁₇₃°C/W

T_A = ₂₅°C

0.1 1 10 100

20 10

1

0.1

0.01

30

10

1 0.5

SINGLE PULSE

R_qJA = ₁₇₃°C/W

TA = 25°C

P(PK), PEAK TRANSIENT POWER (W)

TYPICAL CHARACTERISTICS

P_DM

t₁ t₂

Figure 12. Junction−to−Ambient Transient Thermal Response Curve t, RECTANGULAR PULSE DURATION (sec)

NORMALIZED THERMAL IMPEDANCE, ZqJA) 2 1

0.1

0.0210⁻³ 10⁻² 10⁻¹ 1 10 100 1000

DUTY CYCLE−DESCENDING ORDER

NOTES: DUTY FACTOR: D = t1/t2

PEAK TJ = PDM x Z_qJA x + R_{qJA +} TA SINGLE PULSE

R_qJA = ₁₇₃°C/

W

D = 0.5 0.2 0.1 0.050.02

0.01

ORDERING INFORMATION

Device Order Number Package Type Pin 1 Orientation in Tape Cavity Shipping^†

FDMA3027PZ WDFN−6

(Pb−Free/Halide Free) Top Left 3000 / Tape and Reel

FDMA3027PZ−F130 WDFN−6

(Pb−Free/Halide Free) Top Right 3000 / Tape and Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

WDFN6 2x2, 0.65P CASE 511DA

ISSUE O

DATE 31 JUL 2016

C

0.10 C A B 0.05 C

TOP VIEW

BOTTOM VIEW

0.05 C

0.08 C

0.05 C 2X

2X

SIDE VIEW

0.10 C

PIN#1 IDENT

0.33±0.05

1.80

(0.10) 0.65

0.42(6X) 0.42(6X)

1.00(2X) 0.21

2.25 0.80(2X)

0.20±0.05 2.0

2.0

1.64±0.05

1.30 0.65

0.86±0.05 0.645±0.05 PIN#1 IDENT

(0.185)4X

F

A B

(6X)

RECOMMENDED LAND PATTERN

NOTES:

A. CONFORM TO JADEC REGISTRATIONS MO−229, VARIATION VCCC, EXCEPT WHERE NOTED.

B. DIMENSIONS ARE IN MILLIMETERS.

C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 2009.

D. LAND PATTERN RECOMMENDATION IS EXISTING INDUSTRY LAND PATTERN.

F. NON−JEDEC DUAL DAP 0.75±0.05

0.025±0.025 SEATING

PLANE

0.350

1 3

6 4

0.275±0.05 (6X)

2.00±0.05

2.00±0.05 (0.57)

1.72

1.41

98AON13615G

DOCUMENT NUMBER: Electronic versions are uncontrolled except when accessed directly from the Document Repository.

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