Low-Power, Dual SIM CardAnalog SwitchFSA2567

Low-Power, Dual SIM Card Analog Switch

FSA2567

Description

The FSA2567 is a bi−directional, low−power, dual double−pole, double−throw (4PDT) analog switch targeted at dual SIM card multiplexing. It is optimized for switching the WLAN−SIM data and control signals and dedicates one channel as a supply−source switch.

The FSA2567 is compatible with the requirements of SIM cards and features a low on capacitance (C

) of 10 pF to ensure high−speed data transfer. The V

switch path has a low R

characteristic to ensure minimal voltage drop in the dual SIM card supply paths.

The FSA2567 contains special circuitry that minimizes current consumption when the control voltage applied to the SEL pin is lower than the supply voltage (V

). This feature is especially valuable in ultra−portable applications, such as cell phones; allowing direct interface with the general−purpose I/Os of the baseband processor.

Other applications include switching and connector sharing in portable cell phones, PDAs, digital cameras, printers, and notebook computers.

Features

• Low On Capacitance for Data Path: 10 pF Typical

• Low On Resistance for Data Path: 6 W Typical

• Low On Resistance for Supply Path: 0.4 W Typical

• ^{Wide V}

Operating Range: 1.65 V to 4.3 V

• Low Power Consumption: 1 m A Maximum

♦

15 m A Maximum I

Over Expanded Voltage Range (V

= 1.8 V, V

= 4.3 V)

• Wide −3 db Bandwidth: >160 MHz

• Packaged in:

♦

Pb−free 16−Lead MLP & 16−Lead UMLP

• 3 kV ESD Rating, >12 kV Power/GND ESD Rating

• Cell Phone, PDA, Digital Camera, and Notebook

• LCD Monitor, TV, and Set−Top Box

MARKING DIAGRAM

See detailed ordering and shipping information on page 2 of this data sheet.

ORDERING INFORMATION WQFN16 3x3, 0.5P

CASE 510BS

UQFN16 1.8x2.6, 0.4P CASE 523BF

$Y&Z&2&K FSA 2567

GX&K

&2&Z

GX, FSA2567 = Device Code

$Y = onsemi Logo

&Z = Assembly Plant Code

&2 = 2−Digit Date Code

&K = 2−Digits Lot Run Traceability Code

ORDERING INFORMATION Part Number Top Mark

Operating

Temperature Range Package Shipping^†

FSA2567MPX FSA2567 −40 to +85°C 16−Lead, Molded Leadless Package (MLP)

Quad, JEDEC MO−220, 3 mm Square 3000 / Tape & Reel

FSA2567UMX GX 16−Lead, Quad, Ultrathin Molded Leadless

Package (UMLP), 1.8 x 2.6 mm 5000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

Figure 1. Analog Symbol 1V_SIM

2V_SIM V_SIM

1RST

2RST RST

Sel 1CLK

2CLK CLK

2DAT DAT

1DAT

PIN ASSIGNMENTS

1V_SIM

Figure 2. Pad Assignment MLP16

(Top Through View) Figure 3. Pad Assignment UMLP16

(Top Through View) VCC

1CLK 2RST

2CLK 1DAT

1RST 2VSIM

VSIM

1V_SIM

CLK

RST Sel

DAT

GND

2DAT 11

3 10

9 7 8

6 5 4 2 1

16 15 14 13

12

(Not connected to GND)

1CLK 2RST

2CLK

1RST CLK

RST

GND 1DAT

VCC

2VSIM

VSIM

15 14 13 16

6 7 8

5 3

9 4

1 12 DAT

Sel 2 11 2DAT

10 No Connect

PIN DESCRIPTION

Pin No. Description

nDAT, nRST, nCLK Multiplexed Data Source Inputs nV_SIM Multiplexed SIM Supply Inputs VSIM, DAT, RST, CLK Common SIM Ports

Sel Switch Select

TRUTH TABLE

Sel Function

Logic LOW 1DAT = DAT, 1RST = RST, 1CLK = CLK, 1VSIM = VSIM

Logic HIGH 2DAT = DAT, 2RST = RST, 2CLK = CLK, 2V_SIM = V_SIM

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Min Max Unit

VCC Supply Voltage −0.5 +5.5 V

VCNTRL DC Input Voltage (Sel) (Note 1) −0.5 VCC V

VSW DC Switch I/O Voltage (Note 1) −0.5 VCC + 0.3 V

IIK DC Input Diode Current −50 − mA

I_SIM DC Output Current − V_SIM − 350 mA

IOUT DC Output Current – DAT, CLK, RST − 35 mA

T_STG Storage Temperature −65 +150 °C

ESD Human Body Model, JEDEC: JESD22−A114 All Pins − 3 kV

I/O to GND − 12

Charged Device Model, JEDEC: JESD22−C101 − 2

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

V_CC Supply Voltage 1.65 4.30 V

V_CNTRL Control Input Voltage (Sel) (Note 2) 0 V_CC V

V_SW Switch I/O Voltage −0.5 V_CC V

I_SIM DC Output Current − V_SIM − 150 mA

I_OUT DC Output Current – DAT, CLK, RST − 25 mA

TA Operating Temperature −40 +85 °C

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.

2. The control input must be held HIGH or LOW; it must not float.

DC ELECTRICAL CHARACTERISTICS (All typical values are at 25°C, 3.3 V VCC unless otherwise specified.)

Conditions V_CC (V)

T_A = −40°C to 85°C

Symbol Parameter Min Typ Max Unit

VIK Clamp Diode Voltage IIN = −18 mA 2.7 − − −1.2 V

V_IH Input Voltage High 1.65 to 2.3 1.1 − − V

2.7 to 3.6 1.3 − −

4.3 1.7 − −

VIL Input Voltage Low 1.65 to 2.3 − − 0.4 V

2.7 to 3.6 − − 0.5

4.3 − − 0.7

I_IN Control Input Leakage V_SW = 0 to V_CC 4.3 −1 − 1 mA

I_nc(off),

I_no(off) Off State Leakage nRST, nDAT, nCLK, nV_SIM = 0.3 V or 3.6 V

Figure 10

4.3 −60 − 60 nA

R_OND Data Path Switch On Resistance

(Note 3) V_SW = 0, 1.8 V, I_ON = −20 mA

Figure 9 1.8 − 7.0 12.0 W

VSW = 0, 2.3 V, ION = −20 mA

Figure 9 2.7 − 6.0 10.0

R_ONV V_SIM Switch On Resistance

(Note 3) V_SW = 0, 1.8 V, I_ON = −100 mA

Figure 9 1.8 − 0.5 0.7 W

VSW = 0, 2.3 V, ION = −100 mA

Figure 9 2.7 − 0.4 0.6

DROND Data Path Delta On Resistance

(Note 4) V_SW = 0 V, I_ON = −20 mA 2.7 − 0.2 − W

I_CC Quiescent Supply Current V_CNTRL = 0 or V_CC, I_OUT = 0 4.3 − − 1.0 mA

I_CCT Increase in I_CC Current Per Control Voltage and VCC

V_CNTRL = 2.6 V, V_CC = 4.3 V 4.3 − 5.0 10.0 mA V_CNTRL = 1.8 V, V_CC = 4.3 V 4.3 − 7.0 15.0 mA 3. Measured by the voltage drop between nDAT, nRST, nCLK and relative common port pins at the indicated current through the switch.

On resistance is determined by the lower of the voltage on the relative ports.

4. Guaranteed by characterization.

AC ELECTRICAL CHARACTERISTICS (All typical values are for V_CC = 3.3 V at 25°C unless otherwise specified.)

Conditions V_CC (V)

T_A = −40°C to 85°C

Symbol Parameter Min Typ Max Unit

t_OND Turn−On Time Sel to Output

(DAT, CLK, RST) RL = 50 W, CL = 35 pF V_SW = 1.5 V

Figure 11, Figure 12

1.8 (Note 5) − 65 95 ns

2.7 to 3.6 − 42 60 ns

t_OFFD Turn−Off Time Sel to Output

(DAT, CLK, RST) RL = 50 W, CL = 35 pF V_SW = 1.5 V

Figure 11, Figure 12

1.8 (Note 5) − 30 50 ns

2.7 to 3.6 − 20 40 ns

t_ONV Turn−On Time

Sel to Output (VSIM) R_L = 50 W, C_L = 35 pF VSW = 1.5 V

Figure 11, Figure 12

1.8 (Note 5) − 55 80 ns

2.7 to 3.6 − 35 55 ns

t_OFFV Turn−Off Time

Sel to Output (VSIM) R_L = 50 W, C_L = 35 pF VSW = 1.5 V

Figure 11, Figure 12

1.8 (Note 5) − 35 50

2.7 to 3.6 − 22 40 ns

t_PD Propagation Delay (Note 5)

(DAT, CLK, RST) CL = 35 pF, RL = 50 W

Figure 11, Figure 13 3.3 − 0.25 − ns

t_BBMD Break−Before−Make (Note 5)

(DAT, CLK, RST) R_L = 50 W, C_L = 35 pF V_SW1 = V_SW2 = 1.5 V Figure 15

2.7 to 3.6 3 18 − ns

t_BBMV Break−Before−Make (Note 5)

(VSIM) R_L = 50 W, C_L = 35 pF VSW1 = VSW2 = 1.5 V Figure 15

2.7 to 3.6 3 12 − ns

Q Charge Injection (DAT, CLK, RST) C_L = 50 pF, R_GEN = 0 W,

V_GEN = 0 V 2.7 to 3.6 − 10 − pC

O_IRR Off Isolation (DAT, CLK, RST) R_L = 50 W, f = 10 MHz

Figure 17 2.7 to 3.6 − −60 − dB

Xtalk Non−Adjacent Channel Crosstalk

(DAT, CLK, RST) RL = 50 W, f = 10 MHz

Figure 18 2.7 to 3.6 − −60 − dB

BW −3 db Bandwidth (DAT, CLK, RST) R_L = 50 W, C_L = 5 pF

Figure 16 2.7 to 3.6 − 475 − MHz

5. Guaranteed by characterization.

CAPACITANCE

Conditions

T_A = −40°C to 85°C

Symbol Parameter Min Typ Max Unit

CIN Control Pin Input Capacitance VCC = 0 V − 1.5 − pF

COND RST, CLK, DAT On Capacitance (Note 6) VCC = 3.3 V, f = 1 MHz, Figure 20 − 10 12 CONV VSIM On Capacitance (Note 6) VCC = 3.3 V, f = 1 MHz, Figure 20 − 110 150

COFFD RST, CLK, DAT Off Capacitance VCC = 3.3 V, Figure 19 − 3 −

C_OFFV V_SIM Off Capacitance V_CC = 3.3 V, Figure 19 − 40 −

6. Guaranteed by characterization.

TYPICAL PERFORMANCE CHARACTERISTICS

Frequency (MHz) C_L = 5 pF, V_CC = 2.7 V 2.00

3.00 4.00 5.00 6.00 7.00

−1.00 0.00 1.00 2.00 3.00 0.00

0.10 0.20 0.30 0.40 0.50

−1.00 0.00 1.00 2.00 3.00

−40°C

Frequency Response

−110

−90

−70

−50

−30

−10

0 1 10 100

Off Isolation (dB)

−125−115

−105−95−85−75−65−55−45−35−25−15−5 0 1 10 100

Cross Talk (dB)

Frequency (MHz) V_CC = 2.7 V

−8

−7

−6

−5

−4

−3

−2

−1

0 1 10 100 1000 10000

Gain (dB)

25°C 85°C

−40°C2585°C°C RON (Ohms)

V_IN, V_CC = 2.7 V

RON (Ohms)

V_IN, V_CC = 2.7 V Figure 4. R_ON Data Path Figure 5. R_ON V_SIM

Frequency Response

Frequency Response Frequency (MHz)

V_CC = 2.7 V Figure 6. Off Isolation

Figure 7. Crosstalk

Figure 8. Bandwidth

TEST DIAGRAMS

Figure 9. On Resistance Figure 10. Off Leakage

I_ON V_ON

GND V_SW

GND

NC

A InA(OFF)

V_SW GND

R_L C_L

GND V_SW

GND V_OUT

Sel

V

GND

CC

90% 90%

10%

10%

90%

V

V_OL

t_ON t_OFF

OH 90%

GND

90% 90%

10%

10 %

50% 50%

VOH

V_OL

tpLH tpHL

nV_SIM, nRST,

nCLK, or nDAT VSIM, RST,

CLK, or DAT

nVSIM, nRST,

nCLK, or nDAT VSIM, RST, CLK, or DAT

RL and CL are functions of the application environment (see tables for specific values).

C_L includes test fixture and stray capacitance.

V_Sel = 0 or V_CC

R_ON = V_ON / I_ON V_Sel = 0 or V_CC

VCC / 2 VCC / 2

V_CC / 2 V_CC / 2 Input − V_SW

Output − V_OUT

Input − V_Sel

Output − V_OUT

t_RISE = 2.5 ns t_FALL = 2.5 ns

t_RISE = 2.5 ns t_FALL = 2.5 ns

Figure 11. AC Test Circuit Load Figure 12. Turn−On / Turn−Off Waveforms

Figure 13. Propagation Delay

TEST DIAGRAMS

Figure 15. Break−Before−Make Interval Timing

Figure 16. Bandwidth Figure 17. Channel Off Isolation

Figure 18. Non−Adjacent Channel−to−Channel Crosstalk V_OUT

V_CC

V_CC/ 2

t_BBM 0 V

V

0.9 · VOUT

90%

C_L R_L 10%

GND V_SW1

GND V_SW2

GND _OUT

Sel

V_OUT GND

R_T GND

GND V_S R_S

Network Analyzer

V_SEL

V_IN

GND GND

R_S and R_T are functions of the application environment (see tables for specific values).

V_OUT R_T

V_S R_S R_T

V_Sel

V_IN

Off isolation = 20 Log (V_OUT / V_IN)

GND GND

GND

GND GND GND

V_OUT

GND R_T

V_S R_S

Network Analyzer

R_T V_Sel

NC

V_IN

GND

GND

GND GND GND

f = 1 MHz

Meter nVSIM, nRST,

nCLK, or nDAT V_SIM, RST,

CLK, or DAT

R_L and C_L are functions of the application environment (see tables for specific values).

C_L includes test fixture and stray capacitance.

tRISE = 2.5 ns

Input − VSel

0.9 · VOUT

Network Analyzer

R_S and R_T are functions of the application environment (see tables for specific values).

R_S and R_T are functions of the application environment (see tables for specific values).

Crosstalk = 20 Log (VOUT / VIN)

nV_SIM, nRST, nCLK, or nDAT

V_SIM, RST, CLK, or DAT

nVSIM, nRST, nCLK, or nDAT nV_SIM, nRST, nCLK, or nDAT

V_Sel = 0 or V_CC V_Sel = 0 or V_CC

f = 1 MHz Capacitance Meter

Capacitance

WQFN16 3x3, 0.5P CASE 510BS

ISSUE O

DATE 31 AUG 2016

UQFN16 1.8x2.6, 0.4P CASE 523BF

ISSUE O

DATE 31 OCT 2016

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

98AON13709G DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

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