NTMFS4C029N MOSFET – Power, Single, N-Channel, SO-8 FL

MOSFET – Power, Single, N-Channel, SO-8 FL

30 V, 46 A

Features

• ^{Low R}

to Minimize Conduction Losses

• Low Capacitance to Minimize Driver Losses

• Optimized Gate Charge to Minimize Switching Losses

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant

Applications

• CPU Power Delivery

• DC−DC Converters

MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)

Parameter Symbol Value Unit

Drain−to−Source Voltage V_DSS 30 V

Gate−to−Source Voltage V_GS ±20 V

Continuous Drain Current R_qJA (Note 1)

Steady State

T_A = 25°C I_D 15.0 A

T_A = 80°C 11.2

Power Dissipation

R_qJA (Note 1) T_A = 25°C P_D 2.49 W

Continuous Drain Current R_qJA ≤ 10 s (Note 1)

T_A = 25°C ID 22.5 A

T_A = 80°C 16.8

Power Dissipation

R_qJA ≤ 10 s (Note 1) TA = 25°C PD 5.6 W Continuous Drain

Current R_qJA (Note 2)

TA = 25°C I_D 8.2 A

TA = 80°C 6.2

Power Dissipation

R_qJA (Note 2) TA = 25°C PD 0.75 W

Continuous Drain Current R_qJC (Note 1)

T_C = 25°C I_D 46 A

T_C =80°C 34

Power Dissipation

R_qJC (Note 1) T_C = 25°C P_D 23.6 W

Pulsed Drain

Current T_A = 25°C, tp = 10 ms I_DM 132 A Current Limited by Package T_A = 25°C I_Dmax 80 A Operating Junction and Storage

Temperature T_J,

TSTG

−55 to +150 °C

Source Current (Body Diode) I_S 21 A

Drain to Source dV/dt dV/dt 7.0 V/ns

Single Pulse Drain−to−Source Avalanche Energy (T_J = 25°C, VGS = 10 V, I_L = 25 A_pk, L = 0.1 mH, RGS = 25 W) (Note 3)

E_AS 31 mJ

Lead Temperature for Soldering Purposes

(1/8″ from case for 10 s) TL 260 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.

MARKING DIAGRAMS www.onsemi.com

V_(BR)DSS R_DS(ON) MAX I_D MAX 30 V 5.88 mW @ 10 V

9.0 mW @ 4.5 V 46 A

N−CHANNEL MOSFET G (4)

S (1,2,3) D (5−8)

SO−8 FLAT LEAD CASE 488AA

STYLE 1

A = Assembly Location

Y = Year

W = Work Week ZZ = Lot Traceabililty

4C029 AYWZZ

1

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

S S S G

D

D D

D

Device Package Shipping^† ORDERING INFORMATION

NTMFS4C029NT1G SO−8 FL

(Pb−Free) 1500 / Tape & Reel NTMFS4C029NT3G SO−8 FL

(Pb−Free) 5000 / Tape & Reel

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2. Surface−mounted on FR4 board using the minimum recommended pad size.

3. This is the absolute maximum rating. Parts are 100% tested at TJ = 25°C, V_GS = 10 V, I_L = 17 Apk, E_AS = 14 mJ.

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Case (Drain) R_qJC 5.3

Junction−to−Ambient – Steady State (Note 4) R_qJA 50.3 °C/W

Junction−to−Ambient – Steady State (Note 5) R_qJA 165.9

Junction−to−Ambient – (t ≤ 10 s) (Note 4) R_qJA 22.2

4. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.

5. Surface−mounted on FR4 board using the minimum recommended pad size.

ELECTRICAL CHARACTERISTICS (T_J = 25°C unless otherwise specified)

Parameter Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V(BR)DSS V_GS = 0 V, I_D = 250 mA 30 V

Drain−to−Source Breakdown Voltage

(transient) V(BR)DSSt VGS = 0 V, ID(aval) = 7.1 A,

T_case = 25°C, ttransient = 100 ns 34 V Drain−to−Source Breakdown Voltage

Temperature Coefficient V_(BR)DSS/

T_J 14.5 mV/°C

Zero Gate Voltage Drain Current I_DSS V_GS = 0 V,

VDS = 24 V T_J = 25°C 1.0

mA

T_J = 125°C 10

Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA

ON CHARACTERISTICS (Note 6)

Gate Threshold Voltage VGS(TH) V_GS = V_DS, I_D = 250 mA 1.3 2.2 V

Negative Threshold Temperature Coefficient VGS(TH)/TJ 4.7 mV/°C

Drain−to−Source On Resistance R_DS(on) VGS = 10 V ID = 30 A 4.9 5.88

VGS = 4.5 V ID = 15 A 7.41 9.0 mW

Forward Transconductance gFS VDS = 1.5 V, ID = 15 A 43 S

Gate Resistance RG TA = 25°C 0.3 1.0 2.0 W

CHARGES AND CAPACITANCES

Input Capacitance CISS

V_GS = 0 V, f = 1 MHz, V_DS = 15 V

987

Output Capacitance COSS 574 pF

Reverse Transfer Capacitance C_RSS 162

Capacitance Ratio C_RSS/C_ISS V_GS = 0 V, V_DS = 15 V, f = 1 MHz 0.165

Total Gate Charge Q_G(TOT)

V_GS = 4.5 V, V_DS = 15 V; I_D = 30 A

9.7

Threshold Gate Charge Q_G(TH) 1.5 nC

Gate−to−Source Charge Q_GS 2.8

Gate−to−Drain Charge Q_GD 4.8

Gate Plateau Voltage V_GP 3.2 V

Total Gate Charge Q_G(TOT) V_GS = 10 V, V_DS = 15 V; I_D = 30 A 18.6 nC

SWITCHING CHARACTERISTICS (Note 7)

Turn−On Delay Time t_d(ON)

VGS = 4.5 V, VDS = 15 V, I_D = 15 A, R_G = 3.0 W

9.0

Rise Time t_r 34 ns

Turn−Off Delay Time t_d(OFF) 14

Fall Time t_f 7.0

ELECTRICAL CHARACTERISTICS (T_J = 25°C unless otherwise specified)

Parameter Symbol Test Condition Min Typ Max Unit

SWITCHING CHARACTERISTICS (Note 7)

Turn−On Delay Time td(ON)

V_GS = 10 V, V_DS = 15 V, ID = 15 A, RG = 3.0 W

7.0

Rise Time tr 26 ns

Turn−Off Delay Time td(OFF) 18

Fall Time tf 4.0

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage VSD V_GS = 0 V,

IS = 10 A

T_J = 25°C 0.80 1.1

T_J = 125°C 0.67 V

Reverse Recovery Time t_RR

VGS = 0 V, dIS/dt = 100 A/ms, I_S = 30 A

26.7

Charge Time t_a 14.1 ns

Discharge Time t_b 12.6

Reverse Recovery Charge Q_RR 13.7 nC

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

6. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

7. Switching characteristics are independent of operating junction temperatures.

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TYPICAL CHARACTERISTICS

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics V_DS, DRAIN−TO−SOURCE VOLTAGE (V) V_GS, GATE−TO−SOURCE VOLTAGE (V)

5 3

2 1

00 10 20 50

15 55

4.0 3.5 3.0 2.0

1.5 1.0

Figure 3. On−Resistance vs. V_GS Figure 4. On−Resistance vs. Drain Current and Gate Voltage

V_GS, GATE−TO−SOURCE VOLTAGE (V) I_D, DRAIN CURRENT (A)

9.0 8.0

7.0 10

6.0 5.0 4.0 0.0023.0

0.006 0.010

70 50

30 40 60

20 0.006

0.010 0.016 0.020

0.002

Figure 5. On−Resistance Variation with

Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage

T_J, JUNCTION TEMPERATURE (°C) V_DS, DRAIN−TO−SOURCE VOLTAGE (V) 150

125 100 75 25

0

−25

−50 0.8 1.0 1.1 1.3

30 25

20 15

10 105

100 1000 10000

ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) IDSS, LEAKAGE (nA)

65

5

4.2 V to 10 V

3.6 V

3.2 V 3.0 V 2.8 V 2.6 V 3.8 V

T_J = 25°C V_DS = 5 V

TJ = 25°C TJ = 125°C

T_J = −55°C

0.008

0.014 I_D = 30 A

VGS = 4.5 V

TJ = 25°C

V_GS = 10 V

50 I_D = 30 A

V_GS = 10 V

V_GS = 0 V

TJ = 85°C TJ = 150°C

T_J = 125°C 2.5

0.004 0.014 0.012

1.2 1.4

0.7 1.5 45

0.016 60

10 3.4 V

4 0

20 40 60

30 70

10 50 80

5.0 0.5

0

0.020 0.018

0.004

1.6 1.7

0.9

4.5 25

30 35 40

4.0 V

0.008 0.012 0.018

TYPICAL CHARACTERISTICS

Q_gs

Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge

V_DS, DRAIN−TO−SOURCE VOLTAGE (V) Q_g, TOTAL GATE CHARGE (nC)

25 20

15

10 30

5 00

400

Figure 9. Resistive Switching Time Variation

vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current

R_G, GATE RESISTANCE (W) V_SD, SOURCE−TO−DRAIN VOLTAGE (V)

100 10

11 10 100 1000

0.9 0.8

0.7 0.6

0.5 00.4

2 4 6 8 10 12

Figure 11. Maximum Rated Forward Biased Safe Operating Area

Figure 12. Maximum Avalanche Energy vs.

Starting Junction Temperature V_DS, DRAIN−TO−SOURCE VOLTAGE (V) T_J, STARTING JUNCTION TEMPERATURE (°C)

100 10

1 0.01 0.1

0.1 1 10 100

150 125

100 75

50 025

2 6 10

C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V)

t, TIME (ns) IS, SOURCE CURRENT (A)

ID, DRAIN CURRENT (A) EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ)

VGS = 0 V TJ = 25°C C_iss

C_oss

C_rss

Q_T

Qgd

V_DD = 15 V I_D = 15 A V_GS = 10 V

td(off)

t_d(on) t_r

tf

TJ = 25°C T_J = 125°C

VGS = 0 V

0 V < V_GS < 10 V Single Pulse T_C = 25°C RDS(on) Limit Thermal Limit Package Limit

100 ms

10 ms 1 ms

dc

ID = 17 A 1000

4 8 200

600 800

12 14 1200

1.0 0

2 4 6 8 10

0 4 6 8 12 14 16 18 20

TJ = 25°C V_DD = 15 V V_GS = 10 V I_D = 30 A

14 16 18 20

10 ms

0.01

10 2

1 3 5 7 9

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TYPICAL CHARACTERISTICS

Figure 13. Thermal Response PULSE TIME (sec)

0.01 0.001

0.0001 0.00001

0.000001 0.01

0.1 1 10 100

R(t) (°C/W)

0.1 1 10 100 1000

10%

Duty Cycle = 50%

20%

5%

2%

1%

Single Pulse

Figure 14. G_FS vs. I_D I_D (A)

40 30 10

00 10 50

GFS (S)

20 50

20

60 80

30 40 60

70

Figure 15. Avalanche Characteristics PULSE WIDTH (SECONDS)

1.E−03 1.E−04 1.E−06

1.E−08 1 10 100

ID, DRAIN CURRENT (A)

1.E−05

TA = 25°C TA = 85°C

1.E−07

M 3.00 3.40 q 0 _ −−− ^3.8012 _ DFN5 5x6, 1.27P

(SO−8FL) CASE 488AA

ISSUE N

DATE 25 JUN 2018 SCALE 2:1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.

XXXXXX = Specific Device Code A = Assembly Location

Y = Year

W = Work Week

ZZ = Lot Traceability

1 2 3 4

TOP VIEW

SIDE VIEW

BOTTOM VIEW D1

E1 q

D

E 2

2 B A

0.20 C

0.20 C

2 X

2 X

DIM MIN NOM MILLIMETERS A 0.90 1.00 A1 0.00 −−−

b 0.33 0.41 c 0.23 0.28

D 5.15

D1 4.70 4.90 D2 3.80 4.00

E 6.15

E1 5.70 5.90 E2 3.45 3.65

e 1.27 BSC

G 0.51 0.575

K 1.20 1.35

L 0.51 0.575

L1 0.125 REF

A 0.10 C

0.10 C

DETAIL A

1 4

L1 e/2

8X

G D2 E2

K b

A 0.10 C B 0.05 c

L

DETAIL A c A1

4 X

C

SEATING PLANE

GENERIC MARKING DIAGRAM*

1

XXXXXX AYWZZ 1

MAX 1.10 0.05 0.51 0.33 5.10 4.20 6.10 3.85 0.71 1.50 0.71

STYLE 1:

PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN

M

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

1.270

2X

0.750 1.000 0.905

4.530 1.530

4.560 0.495

3.200

1.330

0.965

2X 2X

4X 4X PIN 5

(EXPOSED PAD)

STYLE 2:

PIN 1. ANODE 2. ANODE 3. ANODE 4. NO CONNECT 5. CATHODE

5.00 5.30

6.00 6.30

PITCH

DIMENSIONS: MILLIMETERS

1

RECOMMENDED e

2X

0.475

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking.

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

98AON14036D DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 DFN5 5x6, 1.27P (SO−8FL)

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