NTMFS4744N Power MOSFET

Power MOSFET

30 V, 53 A, Single N−Channel, SO−8 FL

Features

• ^{Low R}

to Minimize Conduction Losses

• Low Capacitance to Minimize Driver Losses

• Optimized Gate Charge to Minimize Switching Losses

• These are Pb−Free Devices

• CPU Power Delivery

• DC−DC Converters

• Low Side Switching

MAXIMUM RATINGS (T_J = 25°C unless otherwise stated)

Parameter Symbol Value Unit

Drain−to−Source Voltage V_DSS 30 V

Gate−to−Source Voltage V_GS 20 V

Continuous Drain Current R_qJA (Note 1)

Steady State

T_A = 25°C I_D 11 A

TA = 85°C 8.0

Power Dissipation

R_qJA (Note 1) T_A = 25°C P_D 2.2 W

Continuous Drain Current R_qJA (Note 2)

TA = 25°C ID 7.0 A

T_A = 85°C 5.0

Power Dissipation

R_qJA (Note 2) TA = 25°C PD 0.88 W

Continuous Drain Current R_qJC (Note 1)

T_C = 25°C I_D 53 A

TC = 85°C 38

Power Dissipation

R_qJC (Note 1) T_C = 25°C P_D 47.2 W

Pulsed Drain

Current tp=10ms T_A = 25°C I_DM 106 A

Operating Junction and Storage Temperature T_J, T_STG −55 to

+150 °C

Source Current (Body Diode) I_S 46 A

Drain to Source dV/dt dV/dt 6.0 V/ns

Single Pulse Drain−to−Source Avalanche Energy (VDD = 50 V, VGS = 10 V, I_L = 24 A_pk, L = 1.0 mH, R_G = 25 W)

EAS 286 mJ

Lead Temperature for Soldering Purposes

(1/8” from case for 10 s) TL 260 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

http://onsemi.com

SO−8 FLAT LEAD CASE 488AA

STYLE 1

MARKING DIAGRAM

1

4744N = Specific Device Code A = Assembly Location

Y = Year

W = Work Week ZZ = Lot Traceability

N−Channel D

S G

30 V

14 mW @ 4.5 V 10 mW @ 10 V

R_DS(on) MAX

53 A I_D MAX V_(BR)DSS

4744N AYWZZ S

S S G

D

D D

D

Device Package Shipping^† ORDERING INFORMATION NTMFS4744NT1G SO−8 FL

(Pb−Free) 1500 Tape & Reel NTMFS4744NT3G SO−8 FL 5000 Tape & Reel

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

http://onsemi.com 2

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Case (Drain) R_qJC 2.65

Junction−to−Ambient – Steady State (Note 1) R_qJA 56.9 °C/W

Junction−to−Ambient – Steady State (Note 2) R_qJA 142.4

1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.

2. Surface−mounted on FR4 board using the minimum recommended pad size.

ELECTRICAL CHARACTERISTICS (T_J = 25°C unless otherwise specified)

Parameter Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V_(BR)DSS V_GS = 0 V, I_D = 250 mA 30 V

Drain−to−Source Breakdown Voltage

Temperature Coefficient V_(BR)DSS/ TJ

10 mV/°C

Zero Gate Voltage Drain Current IDSS VGS = 0 V,

V_DS = 24 V TJ = 25 °C 1.0

TJ = 125°C 10 mA

Gate−to−Source Leakage Current I_GSS V_DS = 0 V, V_GS = 20 V 100 nA

ON CHARACTERISTICS (Note 3)

Gate Threshold Voltage V_GS(TH) V_GS = V_DS, I_D = 250 mA 1.5 2.5 V

Negative Threshold Temperature Coefficient V_GS(TH)/T_J 5.0 mV/°C

Drain−to−Source On Resistance RDS(on) VGS = 10 V to

11.5 V I_D = 30 A 7.6

mW

I_D = 15 A 7.3

I_D = 10 A 7.3 10

V_GS = 4.5 V I_D = 30 A 10.4 I_D = 15 A 10.1

I_D = 10 A 9.9 14

Forward Transconductance g_FS V_DS = 15 V, I_D = 15 A 25 S

CHARGES, CAPACITANCES & GATE RESISTANCE

Input Capacitance C_ISS

V_GS = 0 V, f = 1 MHz, V_DS = 12 V

1300

Output Capacitance C_OSS 550 pF

Reverse Transfer Capacitance C_RSS 132

Total Gate Charge Q_G(TOT)

V_GS = 4.5 V, V_DS = 15 V; I_D = 30 A

10 17

Threshold Gate Charge Q_G(TH) 0.9 nC

Gate−to−Source Charge Q_GS 1.8

Gate−to−Drain Charge Q_GD 5.9

Total Gate Charge Q_G(TOT) V_GS = 11.5 V, V_DS = 15 V;

ID = 30 A 25 37 nC

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time t_d(ON)

VGS = 4.5 V, VDS = 15 V, ID = 30 A, R_G = 3.0 W

12

Rise Time t_r 203 ns

Turn−Off Delay Time t_d(OFF) 14

Fall Time t_f 83

3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

4. Switching characteristics are independent of operating junction temperatures.

ELECTRICAL CHARACTERISTICS (T_J = 25°C unless otherwise specified)

Parameter Symbol Test Condition Min Typ Max Unit

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time td(ON)

V_GS = 11.5 V, V_DS = 15 V, ID = 30 A, RG = 3.0 W

7.0

Rise Time tr 94 ns

Turn−Off Delay Time td(OFF) 23

Fall Time tf 4.7

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage VSD V_GS = 0 V,

IS = 30 A

T_J = 25°C 0.78 1.2

T_J = 125°C 0.7 V

Reverse Recovery Time t_RR

VGS = 0 V, dIS/dt = 100 A/ms, I_S = 30 A

37 60

Charge Time t_a 21 ns

Discharge Time t_b 17

Reverse Recovery Charge Q_RR 37 nC

PACKAGE PARASITIC VALUES

Source Inductance L_S

T_A = 25°C

0.65 nH

Drain Inductance L_D 0.005

Gate Inductance L_G 1.84

Gate Resistance R_G 2.0 5.0 W

3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

4. Switching characteristics are independent of operating junction temperatures.

http://onsemi.com 4

TYPICAL PERFORMANCE CURVES

10 V

10 0.020

30 0.004

0

1.4

1.0

0.6

100 1000

0 5

16

2 1

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

ID, DRAIN CURRENT (AMPS)

0

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

ID, DRAIN CURRENT (AMPS)

2.6 0.1

3 0.04

0 3.4

Figure 3. On−Resistance vs. Gate−to−Source Voltage

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

Figure 4. On−Resistance vs. Drain Current and Temperature

ID, DRAIN CURRENT (AMPS)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

Figure 5. On−Resistance Variation with Temperature

TJ, JUNCTION TEMPERATURE (°C)

Figure 6. Drain−to−Source Leakage Current vs. Drain Voltage

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) IDSS, LEAKAGE (nA)

−50 −25 0 25 50 75 100 125

2 3

18

12 30

0 3

T_J = 25°C

T_J = −55°C T_J = 125°C

I_D = 9 A V_GS = 10 V

T_J = 85°C T_J = 125°C 24

0 4 5

T_J = 25°C

24 0.1

3 V

1.8

6

10

4 0 1

5 0

0.012 4.5 V

2.4 V 2.6 V 2.8 V 24

8 32

16 32

8

TJ = 125°C

3.8 4.2 4.6

0.02 0.06 0.08

25 5

V_GS = 10 V

150 1 3.5 V

TJ = 25°C

0.016

15 20

TJ = −55°C 0.008

1.2

0.8 1.6

6

T_J = 25°C I_D = 30 A

TYPICAL PERFORMANCE CURVES

C_rss

0 8 12 20

GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)

C, CAPACITANCE (pF)

Figure 7. Capacitance Variation 800

0 1600

4

V_GS = 0 V T_J = 25°C

Coss

C_iss 1200

2000

Figure 8. Gate−To−Source and Drain−To−Source Voltage vs. Total Charge

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

0 1 0

Q_G, TOTAL GATE CHARGE (nC) 5

2

8 4

I_D = 30 A T_J = 25°C

12

0.10.2

V_SD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

, SOURCE CURRENT (AMPS)I S

Figure 9. Resistive Switching Time Variation vs. Gate Resistance

R_G, GATE RESISTANCE (OHMS)

1 10 100

1000

1

t, TIME (ns)

VGS = 0 V

Figure 10. Diode Forward Voltage vs. Current 100

0.6 0.4

1 t_r

t_d(off) t_d(on) tf

10

V_DS = 15 V I_D = 30 A V_GS = 4.5 V

0.8 10

T_J = 25°C

Figure 11. Maximum Rated Forward Biased 16

3

025

T_J, JUNCTION TEMPERATURE (°C) ID = 24 A

Figure 12. Maximum Avalanche Energy vs.

50 75 175

200

100 125

300

EAS, SINGLE PULSE DRAIN−TO−SOURCE AVALANCHE ENERGY (mJ)

150 400

100 4

T_J = 150°C

0.01 0.1 1 10 100 1000

0.1 1 10 100

VGS = 2.0 V SINGLE PULSE TC = 25°C

RDS(on) LIMIT Thermal Limit Package Limit

10 ms 100 ms 1 ms 10 ms

dc

ID, DRAIN CURRENT (A)

V_DS, DRAIN−TO−SOURCE VOLTAGE (V)

Q_GD Q_GS

Q_T

http://onsemi.com 6

TYPICAL PERFORMANCE CURVES

Figure 13. Avalanche Characteristics 1000

1 100

PULSE WIDTH (ms)

I D, DRAIN CURRENT (AMPS)

10

10 125°C

1 100

100°C 25°C

M 3.00 3.40 q 0 _ −−− ^3.8012 _ DFN5 5x6, 1.27P

(SO−8FL) CASE 488AA

ISSUE N

DATE 25 JUN 2018 SCALE 2:1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.

XXXXXX = Specific Device Code A = Assembly Location

Y = Year

W = Work Week

ZZ = Lot Traceability

1 2 3 4

TOP VIEW

SIDE VIEW

BOTTOM VIEW D1

E1 q

D

E 2

2 B A

0.20 C

0.20 C

2 X

2 X

DIM MIN NOM MILLIMETERS A 0.90 1.00 A1 0.00 −−−

b 0.33 0.41 c 0.23 0.28

D 5.15

D1 4.70 4.90 D2 3.80 4.00

E 6.15

E1 5.70 5.90 E2 3.45 3.65

e 1.27 BSC

G 0.51 0.575

K 1.20 1.35

L 0.51 0.575

L1 0.125 REF

A 0.10 C

0.10 C

DETAIL A

1 4

L1 e/2

8X

G D2 E2

K b

A 0.10 C B 0.05 c

L

DETAIL A c A1

4 X

C

SEATING PLANE

GENERIC MARKING DIAGRAM*

1

XXXXXX AYWZZ 1

MAX 1.10 0.05 0.51 0.33 5.10 4.20 6.10 3.85 0.71 1.50 0.71

STYLE 1:

PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN

M

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

1.270

2X

0.750 1.000 0.905

4.530 1.530

4.560 0.495

3.200

1.330

0.965

2X 2X

4X 4X PIN 5

(EXPOSED PAD)

STYLE 2:

PIN 1. ANODE 2. ANODE 3. ANODE 4. NO CONNECT 5. CATHODE

5.00 5.30

6.00 6.30

PITCH

DIMENSIONS: MILLIMETERS

1

RECOMMENDED e

2X

0.475

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking.

98AON14036D DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 DFN5 5x6, 1.27P (SO−8FL)

information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

TECHNICAL SUPPORT

North American Technical Support:

Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910

LITERATURE FULFILLMENT:

Email Requests to: [email protected] onsemi Website: www.onsemi.com

Europe, Middle East and Africa Technical Support:

Phone: 00421 33 790 2910

For additional information, please contact your local Sales Representative

◊