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onsemi and and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/

or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.

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June, 2019 − Rev. 0 1 Publication Order Number:

NTMS4916N/D

MOSFET – Power, N-Channel, SO-8

30 V, 11.6 A

Features

• ^{Low R}

DS(on)

to Minimize Conduction Losses

• Low Capacitance to Minimize Driver Losses

• Optimized Gate Charge to Minimize Switching Losses

• Optimized for 5 V, 12 V Gate Drives

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant

Applications

• DC−DC Converters

• ^Printers

MAXIMUM RATINGS (T_J = 25°C unless otherwise stated)

Parameter Symbol Value Unit

Drain−to−Source Voltage V_DSS 30 V

Gate−to−Source Voltage V_GS ±20 V

Continuous Drain

Current R_qJA (Note 1) Steady

State TA = 25°C I_D 9.4 A

T_A = 70°C 7.5

Power Dissipation R_qJA

(Note 1) Steady

State T_A = 25°C P_D 1.30 W Continuous Drain

Current R_qJA (Note 2) Steady

T_A = 70°C 6.2

Power Dissipation R_qJA

(Note 2) T_A = 25°C P_D 0.89 W

Continuous Drain Current R_qJA, t v 10 s (Note 1)

Steady

T_A = 70°C 9.3

Power Dissipation

R_qJA, t v 10 s(Note 1) Steady

State TA = 25°C PD 1.98 W Pulsed Drain Current TA = 25°C, tp = 10 ms I_DM 145 A Operating Junction and Storage Temperature TJ,

T_stg −55 to

150 °C

Source Current (Body Diode) I_S 2.5 A

Single Pulse Drain−to−Source Avalanche Energy (T_J = 25°C, VDD = 30 V, V_GS = 10 V,

I_L = 9 A_pk, L = 1.0 mH, R_G = 25 W)

EAS 40.5 mJ

Lead Temperature for Soldering Purposes

(1/8″ from case for 10 s) T_L 260 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Ambient – Steady State (Note 1) R_qJA 96 °C/W Junction−to−Ambient – t v 10 s (Note 1) R_qJA 63

Junction−to−Foot (Drain) R_qJF 24.5

Junction−to−Ambient – Steady State (Note 2) R_qJA 141

http://onsemi.com

Device Package Shipping^† ORDERING INFORMATION V_(BR)DSS R_DS(ON) MAX I_D MAX

30 V 9 mW @ 10 V

11.6 A

N−Channel D

S G

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.

SO−8 CASE 751 STYLE 12

MARKING DIAGRAM/

PIN ASSIGNMENT

1

12 mW @ 4.5 V

NTMS4916NR2G SO−8

(Pb−Free) 2500/Tape & Reel

4916NAYWWGG

4916N = Device Code A = Assembly Location

Y = Year

WW = Work Week G = Pb−Free Package

1 8

Drain Drain Drain Drain Source

Source Source Gate

Top View

(Note: Microdot may be in either location)

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NTMS4916N

http://onsemi.com 2

1. Surfacemounted on FR4 board using 1 in sq pad size, 1 oz Cu.

2. Surfacemounted on FR4 board using the minimum recommended pad size.

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ELECTRICAL CHARACTERISTICS (T_J = 25°C unless otherwise specified)

Parameter Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 V

Drain−to−Source Breakdown Voltage

Temperature Coefficient V(BR)DSS/TJ 16 mV/°C

Zero Gate Voltage Drain Current I_DSS

V_GS = 0 V, V_DS = 30 V T_J = 25°C 1.0 mA

T_J = 125°C 10

Gate−to−Source Leakage Current I_GSS V_DS = 0 V, V_GS = ±20 V ±100 nA

ON CHARACTERISTICS (Note 3)

Gate Threshold Voltage V_GS(TH) V_GS = V_DS, I_D = 250 mA 1.0 1.7 2.5 V

Negative Threshold Temperature

Coefficient V_GS(TH)/T_J 5 mV/°C

Drain−to−Source On Resistance R_DS(on) V_GS = 10 V, I_D = 12 A 6.75 9.0 mW

VGS = 4.5 V, ID = 10 A 9.0 12

Forward Transconductance gFS VDS = 1.5 V, ID = 7.5 A 23 S

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance Ciss

V_GS = 0 V, f = 1.0 MHz, V_DS = 25 V

1376 pF

Output Capacitance Coss 401

Reverse Transfer Capacitance Crss 205

Total Gate Charge QG(TOT)

VGS = 4.5 V, VDS = 15 V, ID = 7.5 A

15 nC

Threshold Gate Charge QG(TH) 2.44

Gate−to−Source Charge Q_GS 4

Gate−to−Drain Charge Q_GD 6.5

Total Gate Charge Q_G(TOT) V_GS = 10 V, V_DS = 15 V, I_D = 7.5 A 28 nC

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time t_d(on)

VGS = 10 V, VDS = 15 V, I_D = 1.0 A, R_G = 6.0 W

9.4 ns

Rise Time t_r 7.4

Turn−Off Delay Time t_d(off) 32

Fall Time t_f 15.6

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage V_SD

V_GS = 0 V, I_S = 2.0 A T_J = 25°C 0.740 1.0 V

T_J = 125°C 0.570

Reverse Recovery Time t_RR

V_GS = 0 V, d_IS/d_t = 100 A/ms, I_S = 2.0 A

30.7 ns

Charge Time t_a 14.3

Discharge Time t_b 16.4

Reverse Recovery Charge Q_RR 20 nC

PACKAGE PARASITIC VALUES

Source Inductance L_S

T_A = 25°C

0.66 nH

Drain Inductance L_D 0.2

Gate Inductance L_G 1.5

Gate Resistance R_G 0.77 W

3. Pulse Test: pulse width = 300 ms, duty cycle v 2%.

4. Switching characteristics are independent of operating junction temperatures.

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NTMS4916N

TYPICAL PERFORMANCE CURVES

0 5 10 15 20 25

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

V_DS, DRAIN−TO−SOURCE VOLTAGE (V) ID,DRAIN CURRENT (A)

Figure 1. On−Region Characteristics TJ = 25°C

2.3 V 3.0 V

5 V

2.5 V 4 V

2.6 V

2.4 V 2.8 V 10V

7 V

2.2 V

0 10 20 30 40 50

1 1.5 2 2.5 3 3.5 4 4.5

T_J = 125°C

Figure 2. Transfer Characteristics V_GS, GATE−TO−SOURCE VOLTAGE (V) ID,DRAIN CURRENT (A)

T_J = −55°C T_J = 25°C

V_DS ≥ 10 V

0.000 0.005 0.010 0.015 0.020 0.025 0.030

3 4 5 6 7 8 9 10

Figure 3. On−Resistance vs. Gate−to−Source Voltage

VGS, GATE−TO−SOURCE VOLTAGE (V) RDS(on),DRAIN−TO−SOURCE RESISTANCE (W)

T_J = 25°C I_D = 12 A

0.005 0.006 0.007 0.008 0.009 0.01

2 4 6 8 10 12 14 16 18 20 22

Figure 4. On−Resistance vs. Drain Current and Gate Voltage

TJ = 25°C

RDS(on),DRAIN−TO−SOURCE RESISTANCE (W)

V_GS = 10 V VGS = 4.5 V

ID, DRAIN CURRENT (A)

0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 1.50 1.60 1.70

−50 −25 0 25 50 75 100 125 150

Figure 5. On−Resistance Variation with Temperature

T_J, JUNCTION TEMPERATURE (°C) I_D = 12 A

V_GS = 10 V

RDS(on),DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)

10 100 1000 10000

5 10 15 20 25 30

Figure 6. Drain−to−Source Leakage Current vs. Voltage

V_DS, DRAIN−TO−SOURCE VOLTAGE (V) V_GS = 0 V

IDSS, LEAKAGE (nA)

T_J = 150°C

T_J = 100°C

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TYPICAL PERFORMANCE CURVES

Figure 7. Capacitance Variation DRAIN−TO−SOURCE VOLTAGE (V)

C, CAPACITANCE (pF)

T_J = 25°C Ciss

C_oss C_rss

V_GS = 0 V

0 2 4 6 8 10

0 5 10 15 20 25 30

Figure 8. Gate−To−Source and Drain−To−Source Voltage vs. Total Charge

Q_G, TOTAL GATE CHARGE (nC) I_D = 7.5 A V_GS = 10 V T_J = 25°C QGS Q_GD

V_DS QT

Q2 Q1

VGS, GATE−TO−SOURCE VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 9. Resistive Switching Time Variation vs. Gate Resistance

R_G, GATE RESISTANCE (W)

t, TIME (ns)

V_DD = 15 V I_D = 1 A V_GS = 10 V

tr

td(on)

t_f t_d(off)

0 0.5 1 1.5 2

0.5 0.55 0.6 0.65 0.7 0.75 0.8

VSD, SOURCE−TO−DRAIN VOLTAGE (V) IS, SOURCE CURRENT (A)

V_GS = 0 V T_J = 25°C

Figure 10. Diode Forward Voltage vs. Current

Figure 11. Maximum Rated Forward Biased Safe Operating Area

V_DS, DRAIN−TO−SOURCE VOLTAGE (V) R_DS(on) LIMIT

THERMAL LIMIT PACKAGE LIMIT SINGLE PULSE

T_C = 25°C

dc 10 ms

1 ms 100 ms 10 ms

0 5 10 15 20 25 30 35 40 45

25 50 75 100 125 150

T_J, STARTING JUNCTION TEMPERATURE (°C) EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ)

I_D = 9 A

Figure 12. Maximum Avalanche Energy vs.

Starting Junction Temperature ID, DRAIN CURRENT (A)

1 10 100 1000

1 10 100

0.01 0.1 1 10 100 1000

0.01 0.1 1 10 100

1000 200300 400500 600700 800900 10001100 12001300 14001500 16001700 18001900 2000

0 5 10 15 20 25 30

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NTMS4916N

PACKAGE DIMENSIONS

SOIC−8 NB CASE 751−07

ISSUE AK

SEATING PLANE 1

4 5 8

N

J

X 45_ K

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.

A

B S

H D

C

0.10 (0.004)

DIM

A MIN MAX MININCHESMAX 4.80 5.00 0.189 0.197 MILLIMETERS

B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020

G 1.27 BSC 0.050 BSC

H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050

M 0 8 0 8

N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244

−X−

−Y−

G

Y M

0.25 (0.010)M

−Z−

Y 0.25 (0.010)M Z ^S X ^S

M

_ _ _ _

0.0601.52

7.0 0.275

0.0240.6 1.270

0.050 4.0 0.155

ǒ

_inches^mm

Ǔ

SCALE 6:1

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

STYLE 12:

PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

NTMS4916N/D PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free USA/Canada

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Phone: 421 33 790 2910 Japan Customer Focus Center

Phone: 81−3−5773−3850 LITERATURE FULFILLMENT:

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ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative

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