MJF122, MJF127 Complementary Power Darlingtons

(1)

Complementary Power Darlingtons

For Isolated Package Applications

Designed for general−purpose amplifiers and switching applications, where the mounting surface of the device is required to be electrically isolated from the heatsink or chassis.

Features

• Electrically Similar to the Popular TIP122 and TIP127

• ^{100 V}

CEO(sus)

• 5.0 A Rated Collector Current

• No Isolating Washers Required

• Reduced System Cost

• High DC Current Gain − 2000 (Min) @ I

_C

= 3 Adc

• UL Recognized, File #E69369, to 3500 V

RMS

Isolation

• Pb−Free Packages are Available*

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

MAXIMUM RATINGS

ÎÎÎÎÎÎÎÎÎÎÎÎ

Rating

ÎÎÎ

Symbol

ÎÎÎÎ

Value

ÎÎÎ

Unit

Collector−Emitter Voltage ^ÎÎÎ

ÎÎÎ

V_CEO^ÎÎÎÎ

ÎÎÎÎ

100 ^ÎÎÎ

ÎÎÎ

Vdc

Collector−Base Voltage ^ÎÎÎ

ÎÎÎ

V_CB^ÎÎÎÎ

ÎÎÎÎ

100 ^ÎÎÎ

ÎÎÎ

Vdc

Emitter−Base Voltage ^ÎÎÎ

ÎÎÎ

VEB^ÎÎÎÎ

ÎÎÎÎ

5 ^ÎÎÎ

ÎÎÎ

Vdc

RMS Isolation Voltage (Note 1) (t = 0.3 sec, R.H. ≤ 30%, T_A = 25°C) Per Figure 14

ÎÎÎ

V_ISOL^ÎÎÎÎ

ÎÎÎÎ

4500^ÎÎÎ

ÎÎÎ

V_RMS

Collector Current −Continuous Peak

ÎÎÎ

I_C^ÎÎÎÎ

ÎÎÎÎ

5 8

ÎÎÎ

Adc

Base Current

ÎÎÎ

I_B

ÎÎÎÎ

0.12

ÎÎÎ

Adc

Total Power Dissipation (Note 2)

@ TC = 25_C Derate above 25_C

ÎÎÎ

P_D

ÎÎÎÎ

30 0.24

ÎÎÎ

W W/_C

Total Power Dissipation @ T_A = 25_C

Derate above 25_C ^ÎÎÎ

ÎÎÎ

P_D

ÎÎÎÎ

2

0.016^ÎÎÎ

ÎÎÎ

W W/_C

Operating and Storage Junction Temperat- ure Range

ÎÎÎ

T_J, T_stg^ÎÎÎÎ

ÎÎÎÎ

−65 to + 150

ÎÎÎ

I_C

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

THERMAL CHARACTERISTICS

Characteristic ÎÎÎ

ÎÎÎ

SymbolÎÎÎÎ

ÎÎÎÎ

Max ÎÎÎ

ÎÎÎ

Unit

Thermal Resistance, Junction−to−Ambient

ÎÎÎ

R_qJA

ÎÎÎÎ

62.5

ÎÎÎ

_C/W

Thermal Resistance, Junction−to−Case

(Note 2) ^ÎÎÎ

ÎÎÎ

R_qJC

ÎÎÎÎ

4.1

ÎÎÎ

_C/W

Lead Temperature for Soldering Purpose ^ÎÎÎ

ÎÎÎ

T_L^ÎÎÎÎ

ÎÎÎÎ

260 ^ÎÎÎ

ÎÎÎ

_C Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

1. Proper strike and creepage distance must be provided.

2. Measurement made with thermocouple contacting the bottom insulated mounting surface (in a location beneath the die), the device mounted on a

http://onsemi.com

MARKING DIAGRAM

x = 2 or 7

G = Pb−Free Package A = Assembly Location

Y = Year

WW = Work Week

COMPLEMENTARY SILICON POWER DARLINGTONS

5.0 A, 100 V, 30 W

TO−220 CASE 221D−02

STYLE 2

MJF12xG AYWW

*For additional information on our Pb−Free strategy Device Package Shipping^†

ORDERING INFORMATION

MJF122 TO−220 50 Units / Rail

MJF122G TO−220

(Pb−Free) 50 Units / Rail

MJF127 TO−220 50 Units / Rail

MJF127G TO−220

(Pb−Free) 50 Units / Rail

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

COLLECTOR 2

BASE 1

EMITTER 3 COLLECTOR 2

BASE 1

EMITTER 3

NPN PNP

MJF122 MJF127

23 1

(2)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ELECTRICAL CHARACTERISTICS (T_C= 25_C unless otherwise noted)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Characteristic ^ÎÎÎÎ

ÎÎÎÎ

Symbol^ÎÎÎÎ

ÎÎÎÎ

Min ^ÎÎÎ

ÎÎÎ

Max^ÎÎÎ

ÎÎÎ

Unit

OFF CHARACTERISTICS

Collector−Emitter Sustaining Voltage (Note 3) (I_C = 100 mAdc, I_B = 0)

ÎÎÎÎ

V_CEO(sus)^ÎÎÎÎ

ÎÎÎÎ

100 ^ÎÎÎ

ÎÎÎ

− ^ÎÎÎ

ÎÎÎ

Vdc

Collector Cutoff Current

(V_CE = 50 Vdc, I_B = 0) ^ÎÎÎÎ

ÎÎÎÎ

I_CEO ÎÎÎÎ

ÎÎÎÎ

− ÎÎÎ

ÎÎÎ

10 ÎÎÎ

ÎÎÎ

mAdc

Collector Cutoff Current (VCB = 100 Vdc, IE = 0)

ÎÎÎÎ

ICBO

ÎÎÎÎ

−

ÎÎÎ

10

ÎÎÎ

mAdc

Emitter Cutoff Current (VBE = 5 Vdc, IC = 0) ^ÎÎÎÎ

ÎÎÎÎ

IEBO ^ÎÎÎÎ

ÎÎÎÎ

− ^ÎÎÎ

ÎÎÎ

2 ^ÎÎÎ

ÎÎÎ

mAdc

ON CHARACTERISTICS (Note 3)

DC Current Gain (IC = 0.5 Adc, VCE = 3 Vdc) DC Current Gain (IC = 3 Adc, VCE = 3 Vdc)

ÎÎÎÎ

hFE ^ÎÎÎÎ

ÎÎÎÎ

1000 2000

ÎÎÎ

−

ÎÎÎ

−

Collector−Emitter Saturation Voltage (IC = 3 Adc, IB = 12 mAdc)

Collector−Emitter Saturation Voltage (IC = 5 Adc, IB = 20 mAdc) ^ÎÎÎÎ

ÎÎÎÎ

VCE(sat)ÎÎÎÎ

ÎÎÎÎ

−

− ^ÎÎÎ

ÎÎÎ

2

3.5^ÎÎÎ

ÎÎÎ

Vdc

Base−Emitter On Voltage (IC = 3 Adc, VCE = 3 Vdc) ^ÎÎÎÎ

ÎÎÎÎ

VBE(on)

ÎÎÎÎ

− ^ÎÎÎ

ÎÎÎ

2.5^ÎÎÎ

ÎÎÎ

Vdc

DYNAMIC CHARACTERISTICS

Small−Signal Current Gain (I_C = 3 Adc, V_CE = 4 Vdc, f = 1 MHz) ^ÎÎÎÎ

ÎÎÎÎ

h_fe ^ÎÎÎÎ

ÎÎÎÎ

4 ^ÎÎÎ

ÎÎÎ

− ^ÎÎÎ

ÎÎÎ

−

Output Capacitance MJF127

(V_CB = 10 Vdc, I_E = 0, f = 0.1 MHz) MJF122

ÎÎÎÎ

C_ob ^ÎÎÎÎ

ÎÎÎÎ

−

ÎÎÎ

300 200

ÎÎÎ

pF

3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

Figure 1. Switching Times Test Circuit

V_CC = 30 V I_C/I_B = 250 I_B1 = I_B2 T_J = 25°C

0.1 0.3 0.5 0.7 2 5 10

5

I_C, COLLECTOR CURRENT (AMP)

t_d @ V_BE(off) = 0 V

t, TIME (s)μ

2 1 0.5

0.2 0.1 0.05

Figure 2. Typical Switching Times t_s

t_f

0.3 3

0.2 1

0.07 0.7

3 7

PNP NPN

≈120

≈8 k V₂

APPROX.

+8 V

V₁ APPROX.

-12 V 25 ms

R_B

51 D₁

+ 4 V

V_CC - 30 V RC

SCOPE TUT

t_r, t_f≤ 10 ns DUTY CYCLE = 1%

FOR t_d AND t_r, D₁ IS DISCONNECTED AND V₂ = 0

FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.

RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS D₁, MUST BE FAST RECOVERY TYPES, e.g.,

1N5825 USED ABOVE IB ≈ 100 mA MSD6100 USED BELOW I_B≈ 100 mA

t_r 0

(3)

PD, POWER DISSIPATION (WATTS) 0 80

60

40

20 4

3

2

1 T_A T_C

0

Figure 3. Maximum Power Derating T, TEMPERATURE (°C)

40 60 80 100 120 140 160

T_C

20

t, TIME (ms) 0.01

0.1 0.5 1 2 5 10 20 50 100 200 500 5K 10K

1

0.2 0.1 0.05

r(t), TRANSIENT THERMAL

SINGLE PULSE R_qJC(t) = r(t) R_qJC T_J(pk) - T_C = P_(pk)R_qJC(t)

RESISTANCE (NORMALIZED)

Figure 4. Thermal Response 0.5

0.3

0.03 0.02

0.2 0.3 3 30 300 1K 2K 3K

T_A

V_CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 5. Maximum Forward Bias

Safe Operating Area 1

10

1

30 CURRENT LIMIT

SECONDARY BREAKDOWN LIMIT

THERMAL LIMIT @ T_C = 25°C (SINGLE PULSE)

I C, COLLECTOR CURRENT (AMPS)

0.1

2 3 50

3

0.3

10 0.2

d

c

T_J = 150°C 1ms

5 ms

100 ms

2 5

0.5

5 20 100

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I

C

− V

CE

limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.

The data of Figure 5 is based on T

J(pk)

= 150 _ C; T

C

is variable depending on conditions. Secondary breakdown pulse limits are valid for duty cycles to 10% provided T

J(pk)

< 150 _ C. T

J(pk)

may be calculated from the data in Figure 4.

At high case temperatures, thermal limitations will reduce

the power that can be handled to values less than the

limitations imposed by secondary breakdown.

(4)

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

Figure 6. Typical Small−Signal Current Gain f, FREQUENCY (kHz)

70 300

hfe, SMALL-SIGNAL CURRENT GAIN

30 200

100

50 T_C = 25°C

V_CE = 4 Vdc I_C = 3 Adc

Figure 7. Typical Capacitance 10,000

V_R, REVERSE VOLTAGE (VOLTS)

C, CAPACITANCE (pF)

C_ib C_ob

0.1 200

100 1000 500 300

10 30

100 5

1 0.5 2000

3000 5000

10 50

0.2 2 20

T_J = 25°C

I_C, COLLECTOR CURRENT (AMP) NPN

MJF122 PNP

MJF127

Figure 8. Typical DC Current Gain 0.1

I_C, COLLECTOR CURRENT (AMP)

200 0.2 0.5

3000

1000 10,000

hFE, DC CURRENT GAIN

V_CE = 4 V

T_J = 150°C 5000

0.3 1

25°C

-55°C 2000

0.7 3

20,000

300 500

5 10

hFE, DC CURRENT GAIN

I_B, BASE CURRENT (mA) 2.6

2.2

1.8

1.4

0.3 0.5 0.7 2 5 10

I_C = 2 A 4 A

1

6 A

T_J = 25°C 3

1

20 30

I_B, BASE CURRENT (mA) 2.6

2.2

1.8

1.4 3

1 PNP

NPN

PNP NPN

1 2 5 10 20 50 100 200 500 1000

20 50

200 3000

1000 10,000 5000

2000 20,000

300 500

2 7 0.1 0.2 0.3 0.5 0.7 1 2 3 5 7 10

V_CE = 4 V

T_J = 150°C 25°C

-55°C

I_C = 2 A 4 A 6 A

700 7000

3 7 0.3 0.5 0.7 1 2 3 5 7 10 20 30

T_J = 25°C

(5)

V, TEMPERATURE COEFFICIENTS (mV/C)°θ 0.1

NPN

MJF122 PNP

MJF127

10^-1

0

+0.4 -0.2 -0.4 -0.6

+0.6 +0.2 -0.8 -1 -1.2 -1.4

I_C, COLLECTOR CURRENT (AMP) 0

*I_C/I_B≤ h_{FE 3}

- 5

10⁴

V_BE, BASE-EMITTER VOLTAGE (VOLTS) 10^-1

0 - 0.4

, COLLECTOR CURRENT (A)μ

I C 10³ 10² 10¹ 10⁰

+0.2 +0.4 +0.6 T_J = 150°C

100°C

REVERSE FORWARD

25°C

V_CE = 30 V 10⁵

-0.6 -0.2 +0.8 +1 +1.2 +1.4

10⁴

V_BE, BASE-EMITTER VOLTAGE (VOLTS)

, COLLECTOR CURRENT (A)μ

I C 10³ 10² 10¹ 10⁰

T_J = 150°C 100°C

REVERSE FORWARD

25°C

V_CE = 30 V 10⁵

- 4 - 3 - 2 - 1

qVB FOR V_BE

25°C to 150°C

*qVC FOR V_CE(sat)

I_C, COLLECTOR CURRENT (AMP) Figure 10. Typical “On” Voltages

Figure 11. Typical Temperature Coefficients 0.1

1.5

V, VOLTAGE (VOLTS)

3 2.5

1 0.5

0.2 0.3 0.5 0.7 1 3 5 10

1.5

V, VOLTAGE (VOLTS)

3

2.5

1 0.5

T_J = 25°C

V_BE(sat) @ I_C/I_B = 250 V_BE @ V_CE = 4 V

T_J = 25°C

V_BE(sat) @ I_C/I_B = 250 V_BE @ V_CE = 4 V V_CE(sat) @ I_C/I_B = 250

V, TEMPERATURE COEFFICIENT (mVC)°θ

7

2 0.1 0.2 0.3 0.5 0.7 1 2 3 5 7 10

0.2 0.3 0.5 0.7 1 2 3 5 7 10 0.1 0.2 0.3 0.5 1 2 3 5 7 10

+ 1 + 2 + 3 + 4 + 5

0

- 5 - 4 - 3 - 2 - 1 + 1 + 2 + 3 + 4 + 5

- 55°C to 25°C

*I_C/I_B≤ h_{FE 3}

qVB FOR V_BE

*qVC FOR V_CE(sat)

V_CE(sat) @ I_C/I_B = 250

25°C to 150°C

- 55°C to 25°C

25°C to 150°C

- 55°C to 25°C

25°C to 150°C - 55°C to 25°C

(6)

BASE

EMITTER COLLECTOR

≈8 k ≈120 BASE

EMITTER COLLECTOR

≈8 k ≈120 NPN

MJF122 PNP

MJF127

Figure 13. Darlington Schematic

TEST CONDITIONS FOR ISOLATION TESTS*

FULLY ISOLATED PACKAGE

LEADS

HEATSINK 0.110, MIN

Figure 14. Mounting Position

*Measurement made between leads and heatsink with all leads shorted together.

4-40 SCREW PLAIN WASHER

HEATSINK

COMPRESSION WASHER NUT

CLIP

HEATSINK

Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw torque of 6 to 8 in^.lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a con- stant pressure on the package over time and during large temperature excursions.

Destructive laboratory tests show that using a hex head 4−40 screw, without washers, and applying a torque in excess of 20 in^.lbs will cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.

Additional tests on slotted 4−40 screws indicate that the screw slot fails between 15 to 20 in^.lbs without adversely affecting the package. However, in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend

Figure 15. Typical Mounting Techniques*

MOUNTING INFORMATION

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TO−220 FULLPAK CASE 221D−03

ISSUE K

DATE 27 FEB 2009

STYLE 4:

PIN 1. CATHODE 2. ANODE 3. CATHODE STYLE 1:

PIN 1. GATE 2. DRAIN 3. SOURCE

STYLE 2:

PIN 1. BASE 2. COLLECTOR 3. EMITTER

STYLE 3:

PIN 1. ANODE 2. CATHODE 3. ANODE

DIM A

MIN MAX MIN MAX MILLIMETERS 0.617 0.635 15.67 16.12

INCHES

B 0.392 0.419 9.96 10.63 C 0.177 0.193 4.50 4.90 D 0.024 0.039 0.60 1.00 F 0.116 0.129 2.95 3.28

G 0.100 BSC 2.54 BSC

H 0.118 0.135 3.00 3.43 J 0.018 0.025 0.45 0.63 K 0.503 0.541 12.78 13.73 L 0.048 0.058 1.23 1.47

N 0.200 BSC 5.08 BSC

Q 0.122 0.138 3.10 3.50 R 0.099 0.117 2.51 2.96 S 0.092 0.113 2.34 2.87 U 0.239 0.271 6.06 6.88

STYLE 5:

PIN 1. CATHODE 2. ANODE 3. GATE

STYLE 6:

PIN 1. MT 1 2. MT 2 3. GATE

SEATING PLANE

−T−

U C

S

J R SCALE 1:1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH 3. 221D-01 THRU 221D-02 OBSOLETE, NEW

STANDARD 221D-03.

MARKING DIAGRAMS

xxxxxx = Specific Device Code G = Pb−Free Package A = Assembly Location Y = Year

WW = Work Week xxxxxxG

AYWW

A = Assembly Location

Y = Year

WW = Work Week xxxxxx = Device Code G = Pb−Free Package AKA = Polarity Designator

AYWW xxxxxxG

AKA

Bipolar Rectifier

−B−

−Y−

G N D

L K

H A

F Q

3 PL 1 2 3

B M

0.25 (0.010)M Y

98ASB42514B DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 TO−220 FULLPAK

(8)

information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

www.onsemi.com/site/pdf/Patent−Marking.pdf.

MJF122, MJF127 Complementary Power Darlingtons

Complementary Power Darlingtons

For Isolated Package Applications

Designed for general−purpose amplifiers and switching applications, where the mounting surface of the device is required to be electrically isolated from the heatsink or chassis.

• Electrically Similar to the Popular TIP122 and TIP127

• 100 V

• 5.0 A Rated Collector Current

• No Isolating Washers Required

• Reduced System Cost

• High DC Current Gain − 2000 (Min) @ I

= 3 Adc

• UL Recognized, File #E69369, to 3500 V

Isolation

• Pb−Free Packages are Available*

MARKING DIAGRAM

COMPLEMENTARY SILICON POWER DARLINGTONS

5.0 A, 100 V, 30 W

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I

− V

limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.

The data of Figure 5 is based on T

= 150 _ C; T

is variable depending on conditions. Secondary breakdown pulse limits are valid for duty cycles to 10% provided T

< 150 _ C. T

may be calculated from the data in Figure 4.

At high case temperatures, thermal limitations will reduce

the power that can be handled to values less than the

limitations imposed by secondary breakdown.

TEST CONDITIONS FOR ISOLATION TESTS*

MOUNTING INFORMATION

• ^{100 V}