Field Effect Transistor - Dual, N-Channel,
Enhancement Mode NDC7002N
General Description
These dual N−Channel enhancement mode power field effect transistors are produced using onsemi’s proprietary, high cell density, DMOS technology. This very high density process has been designed to minimize on−state resistance, provide rugged and reliable performance and fast switching. These devices is particularly suited for low voltage applications requiring a low current high side switch.
Features
• 0.51 A, 50 V, R
DS(ON)= 2 W @ V
GS= 10 V
• High Density Cell Design for Low R
DS(ON)• Proprietary SUPERSOTt−6 Package Design Using Copper Lead Frame for Superior Thermal and Electrical Capabilities
• High Saturation Current
• This is a Pb−Free Device
ABSOLUTE MAXIMUM RATINGS(TA = 25°C unless otherwise noted)
Symbol Parameter Ratings Unit
VDS Drain−Source Voltage 50 V
VGSS Gate−Source Voltage 20 V
ID Drain Current
− Continuous (Note 1a)
− Pulsed 0.51
1.5
A
PD Power Dissipation (Note 1a) (Note 1b) (Note 1c)
0.960.9 0.7
W
TJ, TSTG Operating and Storage Tempera-
ture Range −55 to +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol Parameter Ratings Unit
RθJC Thermal Resistance,
Junction to Case (Note 1) 60 °C/W
RθJA Thermal Resistance,
Junction to Ambient (Note 1a) 130
ORDERING INFORMATION MARKING DIAGRAM
TSOT23 6−Lead CASE 419BL
PINOUT
SOT−6 (SUPERSOTt−6) 1 5
4
6
3
2 G1S2G2 D1
S1D2
Device Package Shipping†
NDC7002N TSOT−23−6
(Pb−free) 3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
XXX MG G 1
XXX = Specific Device Code M = Date Code
G = Pb−Free Package (Note: Microdot may be in either location)
ELECTRICAL CHARACTERISTICS(TA = 25°C unless otherwise noted)
Symbol Parameter Test Conditions Min Typ Max Unit
OFF CHARACTERISTICS
BVDSS Drain−Source Breakdown Voltage ID = 250 mA, VGS = 0 V 50 V
IDSS Zero Gate Voltage Drain Current VDS = 40 V, VGS = 0 V
TJ = 125°C 1
500 mA
IGSSF Gate−Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
IGSSR Gate−Body Leakage, Reverse VGS = −20 V, VDS = 0 V −100 nA
ON CHARACTERISTICS (Note 2)
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 mA
TJ = 125°C 1
0.8 1.9
1.5 2.5
2.2 V
RDS(ON) Static Drain−Source On−Resistance VGS = 10 V, ID = 0.51 A
TJ = 125°C 1
1.7 2
3.5 W
VGS = 4.5 V, ID = 0.35 A 1.6 4
ID(on) On−State Drain Current VGS = 10 V, VDS = 10 V 1.5 A
gFS Forward Transconductance VDS = 10 V, ID = 0.51 A 400 mS
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz 20 pF
Coss Output Capacitance 13 pF
Crss Reverse Transfer Capacitance 5 pF
SWITCHING CHARACTERISTICS (Note 2)
td(on) Turn−On Delay Time VDD = 25 V, ID = 0.25 A, VGS = 10 V,
RGEN = 25 W 6 20 ns
tr Turn−On Time 6 20
td(off) Turn−Off Delay Time 11 20
tf Turn−Off Fall Time 5 20
Qg Total Gate Charge VDS = 25 V, ID = 0.51 A, VGS = 10 V 1 nC
Qgs Gate−Source Charge 0.19 nC
Qgd Gate to Drain Charge 0.33 nC
DRAIN−SOURCE DIODE CHARACTERISTICS
IS Maximum Continuous Source Current 0.51 A
ISM Maximum Pulse Source Current (Note 2) 1.5 A
VSD Drain−Source Diode Forward Voltage VGS = 0 V, IS = 0.51 A (Note 2) 0.8 1.2 V 1. RθJA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user’s board design.
PD(t)+TJ*TA
RqJA(t) + TJ*TA
RqJC)RqCA(t)+I2D(t) RDS(ON)@TJ
Typical RqJA for single device operation using the board layouts shown below on 4.5″ x 5″ FR−4 PCB in a still air environment:
a.
130°C/W when mounted on a 0.125 in2 pad of 2oz copper.b.
140°C/W when mounted on a 0.005 in2 pad of 2oz copper.c.
180°C/W when mounted on a 0.0015 in2 pad of 2oz copper.1a 1b 1c
TYPICAL ELECTRICAL CHARACTERISTICS
Figure 1. On−Region Characteristics Figure 2. On−Resistance Variation with Gate Voltage and Current
Figure 3. On−Resistance Variation with Temperature Figure 4. On−Resistance vs Variation with Drain Current and Temperature
Figure 5. Transfer Characteristics Figure 6. Gate Threshold Variation with Temperature
0 1 2 3 4 5
0 0.3 0.6 0.9 1.2 1.5
8.07.0 6.0
3.5 4.0 4.5 5.0 5.5
3.0 VGS = 10 V
VDS, Drain−Source Voltage (V) ID, Drain−Source Current (A)
0 0.3 0.6 0.9 1.2 1.5
0.5 1 1.5
2 2.5
3
6.0 4.0 4.5
5.0 5.5
8.0 10 7.0 VGS = 3.5 V
ID, Drain Current (A) RDS(on), Normalized Drain−Source On−Resistance
−50 −25 0 25 50 75 100 125 150
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
2 ID = 0.51 A VGS = 10 V
RDS(on), Normalized Drain−Source On−Resistance
TJ, Junction Temperature (°C)
0 0.3 0.6 0.9 1.2 1.5
0.5 1 1.5
2 2.5
TJ = 125°C
25°C -55°C VGS = 10 V
ID, Drain Current (A) RDS(on), Normalized Drain−Source On−Resistance
1 2 3 4 5 6 7 8
0 0.3 0.6 0.9 1.2 1.5
25°C 125°C VDS = 10 V
VGS, Gate to Source Voltage (V) ID, Drain Current (A)
TJ = −55°C
−50 −25 0 25 50 75 100 125 150
0.7 0.8 0.9 1 1.1
1.2 VDS = VGS
ID = 250 mA
Vth, Normalized Gate−Source Threshold Voltage
TJ, Junction Temperature (°C)
TYPICAL ELECTRICAL CHARACTERISTICS
(continued)Figure 7. Breakdown Voltage Variation with Temperature Figure 8. Body Diode Forward Voltage Variation with Current and Temperature
Figure 9. Capacitance Characteristics Figure 10. Gate Charge Characteristics
Figure 11. Transconductance Variation with Drain Current and Temperature
−50 −25 0 25 50 75 100 125 150
0.88 0.92 0.96 1 1.04 1.08 1.12
1.16 ID = 250 mA
BVDSS, Normalized Drain−Source Breakdown Voltage
TJ, Junction Temperature (°C)
0.2 0.4 0.6 0.8 1 1.2
0.001 0.01 0.1 0.5 1.51
25°C
-55°C TJ = 125°C
VGS = 0 V
IS, Reverse Drain Current (A)
VSD, Body Diode Forward Voltage (V)
0.1 0.2 0.5 1 2 5 10 20 50
1 2 5 10 20 50 100
f = 1 MHz VGS = 0 V
Capacitance (pF)
VDS, Drain to Source Voltage (V) Ciss
Coss Crss
0 0.2 0.4 0.6 0.8 1 1.2
0 2 4 6 8
10 VDS = 25 V ID = 0.51 A
VGS, Gate−Source Voltage (V)
Qg, Gate Charge (nC)
0 0.3 0.6 0.9 1.2 1.5
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
25°C 125°C TJ = −55°C VDS = 10 V
VGS, Gate to Source Voltage (V) ID, Drain Current (A)
TYPICAL THERMAL CHARACTERISTICS
Figure 12. SOT−6 Dual Package Maximum Steady−State Power Dissipation versus Copper Mounting Pad Area
0 0.2 0.4 0.6 0.8 1
0.6 0.7 0.8 0.9 1 1.1 1.2
1c 1b
1a
4.5″ x 5″ FR−4 Board TA = 25°C
Still Air
2oz Copper Mounting Pad Area (in2) Steady−State Power Dissipation (W)
0 0.025 0.05 0.075 0.1 0.125
0.35 0.4 0.45
0.5 0.55
1c 1b
1a
4.5″ x 5″ FR−4 Board TA = 25°C’
Still Air VGS = 10 V
2oz Copper Mounting Pad Area (in2) ID, Steady−State Drain Current (A)
Figure 13. Maximum Steady−State Drain Current versus Copper Mounting Pad Area
1 2 5 10 20 50 70
0.01 0.02 0.05 0.1 0.2 0.5 1 23
VGS = 10 V Single Pulse RqJA = See Note 1c TA = 25°C
VDS, Drain−Source Voltage (V) ID, Drain Current (A)
Figure 14. Maximum Safe Operating Area
0.0001 0.001 0.01 0.1 1 10 100 300
0.01 0.02 0.05 0.1 0.2 0.5 1
Single Pulse D = 0.5
0.1 0.05 0.02 0.01
0.2 RqJA(t) = r(t) * RqJA
RqJA = See Note 1c
TJ − TA = P * RqJA(t) Duty Cycle, D = t1/t2
t1 t2
P(pk)
t1, Time (sec) r(t), Normalized Effective Transient Thermal Resistance
Figure 15. Transient Thermal Response Curve
(Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design.)
SUPERSOT is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries.
TSOT23 6−Lead CASE 419BL
ISSUE A
DATE 31 AUG 2020
XXX MG G GENERIC MARKING DIAGRAM*
1
XXX = Specific Device Code M = Date Code
G = Pb−Free Package
*This information is generic. Please refer to device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products
(Note: Microdot may be in either location) SCALE 2:1
1
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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