3.2 ᬌ⸛ᢥ₂
3.2.2 䉲䊮䉫䊦䊶䉟䊔䊮䊃䊶䊃䊤䊮䉳䉢䊮䊃䈱䊁䉪䊉䊨䉳䊷䊉䊷䊄䈮䉋䉎ะ
ᢥ₂ฬ Digital Single Event Transient Trends With Technology Node Scaling
ౖ IEEE Transaction on Nuclear Science, Vol.53, No.6, pp. 3462 - 3465, Dec. 2006.
⪺⠪ฬ J. M. Benedetto, P. H. Eaton, D. G. Mavis, M. Gadlage, and T. Turflinger ኻ⽎䊂䊋䉟䉴 0.25, 0.18, 0.13Ǎm CMOS
ታ㛎⸳ Brookhaven National Laboratories (BNL), Lawrence Berkley National Laboratories (LBL) ᾖ✢⒳䈶
䉣䊈䊦䉩䊷䈱ಽ
㊀䉟䉥䊮
LET䋺 60MeV-cm2/mg න⊒⽎䈲
Ⓧ▚✢㊂ലᨐ䈱ಽ
න⊒⽎
ታ㛎䈲ℂ⺰䈱ಽ ታ㛎
(1) ⷐ
นᄌㆃᑧ䊤䉾䉼(programmable delay temporal latch)䉕↪䈇䈩0.25, 0.18, 0.13㱘m CMOS 䈮䈧䈇䈩SET䈱ᢿ㕙Ⓧ䉕᷹ቯ䈜䉎䈖䈫䈮䉋䉍䇮䊁䉪䊉䊨䉳䊷䊉䊷䊄䈮䉋䉎ะ䉕⹏ଔ䈚䈢䇯SET䈱䊌 䊦䉴䈍䉋䈶ᢿ㕙Ⓧ䈱ᦨᄢ୯䈲ਥ䈮㔚Ḯ㔚䈮ଐሽ䈚䇮ਔ⠪䈲േ㔚䉕ਅ䈕䉎䈫⪺䈚䈒Ⴧട䈜 䉎䈖䈫䈏䉒䈎䈦䈢䇯
(2) ᐨ⺰
వ┵ᛛⴚ䈱 CMOS 䈪䈲 SET 䈏⺋േ䈱ਥⷐ䈭ⷐ࿃䈮䈭䈦䈩䈇䉎䈖䈫䈏䉌䈎䈮䈘䉏䈩䈇䉎 [1]-[5]䇯䈖䉏䉁䈪䇮PDTL(programmable delay temporal latch䇮એᓟ ’นᄌㆃᑧ䊤䉾䉼’ 䈫䈜) 䉕↪䈇䈩0.25䈫0.18㱘m 䊂䊋䉟䉴䈱SET䊌䊦䉴䉕᷹ቯ䈚䈢⚿ᨐ䈏ႎ๔䈘䉏䈩䈇䉎[6]䇯䈠䉏䈮䉋 䉎䈫䊁䉪䊉䊨䉳䊷䊉䊷䊄䈫㔚䈱䉴䉬䊷䊥䊮䉫䈏ㅴ䉃䈫SET䈱㗴䈏ᖡൻ䈜䉎䈖䈫䈏␜䈘䉏䈢䇯
ੑ䈧䈱ℂ↱䈮䉋䈦䈩䇮SET 䈲ᓟ䈱䊂䉳䉺䊦࿁〝䈱䉸䊐䊃䉣䊤䊷䈱㊀ⷐ䈭ⷐ࿃䈮䈭䉎䇯৻䈧䈮䈲 䊁䉪䊉䊨䉳䊷䊉䊷䊄䈱䉴䉬䊷䊥䊮䉫䈮䉋䉍SET䊌䊦䉴䈲ข䉍ㄟ䉁䉏䉎䈮චಽ䈭ᄢ䈐䈘䈱䊌䊦䉴䈫ᝄ
䉕ᜬ䈧䉋䈉䈮䈭䉎䈖䈫䇯ੑ䈧⋡䈮䈲േᵄᢙ䈏㜞䈒䈭䉎䈢䉄 SET 䈏ข䉍ㄟ䉁䉏䉎⏕₸䈏Ⴧᄢ䈜䉎 䈢䉄䈪䈅䉎䇯⚵䉂ว䉒䈞࿁〝䈱䉣䊤䊷ᢿ㕙Ⓧ䈲㗅ᐨ࿁〝䉋䉍䉅䈲䉎䈎䈮ᄢ䈐䈇䈢䉄䇮SET 䈱㗴䈏
ᓟ䉁䈜䉁䈜ᄢ䈐䈒䈭䈦䈩䈒䉎䇯䈖䉏䉁䈪䈱⎇ⓥ䉇䊝䊂䊥䊮䉫䈪䉅 SET 䈏⚵䉂ว䉒䈞⺰ℂ࿁〝䉕વ
៝䈚䈩䉉䈒䈖䈫䈏ႎ๔䈘䉏䈩䈇䉎[7]-[12]䇯
ᧄ⺰ᢥ䈪䈲SET䈱䊌䊦䉴䈫ᢿ㕙Ⓧ䈏䊁䉪䊉䊨䉳䊷䊉䊷䊄(0.25, 0.18, 0.13㱘m)䈫േ㔚(2.0, 1.5, 1.25, 1.0V)䈪䈬䈱᭽䈮ᄌൻ䈜䉎䈎⺞䈼䈢䉅䈱䈪䈅䉎䇯LET䈲60MeV-cm2/mg䈫৻ቯ䈮䈚䈢䇯 䊁䉪䊉䊨䉳䊷䊉䊷䊄䈫േ㔚䈱䉴䉬䊷䊥䊮䉫䈮䉋䉍SET䈱䊌䊦䉴䈏Ⴧട䈜䉎䈖䈫䉕␜䈜䈏䇮ᱜⷙ䈱 㔚䉋䉍䉅ૐ䈇㔚䈪േ䈘䈞䉎䈫ᦝ䈮䊌䊦䉴䈏Ⴧᄢ䈜䉎䈖䈫䉅ႎ๔䈜䉎䇯
࿑ 3.2.2-2 0.13㱘m䊉䊷䊄䈱㔚Ḯ㔚䈫SETᢿ 㕙Ⓧ䈱㑐ଥ
࿑ 3.2.2-4 0.13㱘m䈱േ㔚䉕ዋ䈚䈕䈩ઁ
䈱䊒䊨䉶䉴䈫ห䈛ಽᏓ䈮䈚䈢䉅䈱㩷 (3) 䊂䉞䉳䉺䊦䉲䊮䉫䊦䉟䊔䊮䊃䈱⹜㛎ⵝ⟎
SET 䈱䊌䊦䉴䈱᷹ቯ࿁〝䈮䈲นᄌㆃᑧ䊤䉾䉼䉕↪䈇䈢䇯นᄌㆃᑧ䊤䉾䉼䈲⸳ቯ䈘䉏䈢ㆃᑧᤨ
㑆䉋䉍⍴䈇䊌䊦䉴䈱 SET 䉕㒰䈚䇮ㆃ ᑧᤨ㑆䉋䉍䉅㐳䈇䊌䊦䉴䈱 SET 䈲ข䉍 ㄟ䉃䉋䈉䈮⸳⸘䈘䉏䈩䈇䉎[6]䇯ㆃᑧᤨ㑆䈲 㔚ᵹᓮ䈮䉋䉎䉟䊮䊋䊷䉺䈪ᄖㇱ䈎䉌ᓮ 䈪䈐䉎䉋䈉䈮䈭䈦䈩䈇䉎䇯ታ㛎ਛ䈮ㆃᑧᤨ
㑆䉕ᄌൻ䈘䈞䉎䈖䈫䈪ㆊᷰ䊌䊦䉴䈱ᦨᄢ
䉕᷹ቯ䈜䉎䈖䈫䈏᧪䉎䇯
╙ੑ䈱᷹ቯ࿁〝䈫䈚䈩䇮1,000 䈱䉟䊮 䊋䊷䉺䉕䉼䉾䊒䈮⚵䉂ㄟ䉖䈣䇯⹜㛎೨ 䈮䉥䉲䊨䉴䉮䊷䊒䈭䈬䉕↪䈇䈩ోㆃᑧᤨ㑆 䉕᷹ቯ䈚䈩䉟䊮䊋䊷䉺䈱ᢙ䈪ഀ䉎䈖䈫䈪䇮
৻Ბᒰ䈢䉍䈱ㆃᑧᤨ㑆䉕᳞䉄䉎䈖䈫䈏
᧪䉎[3]䇯
0.25㱘m䈫0.18㱘m CMOS䉼䉾䊒䈲
TSMC(Taiwan Semiconductor Manufacturing Company)䈱⺰ℂLSI
↪䉰䊥䉰䉟䊄䊒䊨䉶䉴䈪䈘䉏䇮0.13㱘 m 䈲 IBM 䈪䈘䉏䈢䇯ታ㛎ᣉ⸳䈲 Brookhaven National Laboratories
(BNL)䈫Lawrence Berkley National Laboratories (LBL)䉕↪䈇䈢䇯ਔᣉ⸳䈪ᓧ䉌䉏䈢䊂䊷䉺 䈲⦟䈇৻⥌䈏䉌䉏䈢䇯ᣉ⸳䈱․ᓽ䈎䉌䇮㜞䉟䉥䊮ᵹ᧤䈱䉅䈱䈲BNL䇮㜞LET䈱䉅䈱䈲LBL䉕↪
䈇䈢䇯
࿑ 3.2.2-1 0.18㱘m CMOS䈮䈍䈇䈩㔚䉕ᄌൻ䈘 䈞䈢䈫䈐䈱SET䊌䊦䉴䈫ᢿ㕙Ⓧ䈱㑐ଥ㩷
࿑ 3.2.2-3 ਃ䈧䈱䊉䊷䊄䉕ᮡḰ㔚䈪േ䈘䈞 䈢䈫䈐䈱SET䊌䊦䉴䈫ᢿ㕙Ⓧ䈱㑐ଥ㩷
࿑ 3.2.2-6 DICE䉶䊦䈮䈍䈔䉎䊂䊷䉺ข䉍ㄟ 䉂䉕⺑䈜䉎䉺䉟䊚䊮䉫䉻䉟䉝䉫䊤䊛
࿑ 3.2.2-5 DICE 䉶䊦䈪㔚Ḯ㔚䉕ᄌ䈋䈢 䈫䈐䈱LET䈫SEEᢿ㕙Ⓧ䈱㑐ଥ
(4) ㊀䉟䉥䊮⹜㛎⚿ᨐ䈫ᬌ⸛
࿑ 3.2.2-1䈮䈲䊤䉾䉼䈱ㆃᑧᤨ㑆(SET䈱ᦨᄢ䊌䊦䉴)䈫䉣䊤䊷ᢿ㕙Ⓧ䈱㑐ଥ䉕␜䈚䈢䇯䊂䊋䉟
䉴䈲TSMC䈱0.18㱘m CMOS䈪䈅䉎䇯వ䈮⊒䈚䈢⺰ᢥ[1]䈫ห䈛䈒䊌䊦䉴䈲ᐢ䈒ಽᏓ䈚䈢䇯േ
㔚䈪䊌䊦䉴䈏ᄢ䈐䈒ᄌ䉒䉎䈱䈏್䉎䇯0.18㱘m䈱ᮡḰ㔚䈲1.8V䈪䈅䉍䇮䈖䈱䈫䈐䈱ᦨᄢ䊌䊦䉴
䈲1.5ns䈪䈅䉎䈏䇮䈖䉏䉕1.1V䉁䈪ਅ䈕䉎䈫䊌䊦䉴䈲3ns䉁䈪Ⴧᄢ䈜䉎䇯ห᭽䈱ะ䈲ઁ䈱䊁䉪 䊉䊨䉳䊷䊉䊷䊄䈪䉅䉌䉏䈢ޕ
࿑ 3.2.2-2䈲0.13㱘m CMOS䈮䈧䈇䈩ห᭽䈱᷹ቯ䉕䈚䈢⚿ᨐ䈪䈅䉎䇯SET䊌䊦䉴䈲ᦝ䈮ᐢ 䈇▸࿐䈮ಽᏓ䈚1.1V䈪䈲4.5ns䉕䈋䉎䉅䈱䉅䈅䈦䈢䇯
࿑ 3.2.2-3䈲ਃ䈧䈱䊁䉪䊉䊨䉳䊷䊉䊷䊄䉕ᮡḰ㔚䈪േ䈘䈞䈢⚿ᨐ䈪䈅䉎䇯
0.25㱘m䈫0.18㱘m䈲ห䈛ಽᏓ䈪䈅䉎䈏䇮0.13㱘m䈪䈲ಽᏓ䈏ᐢ䈒䈭䈦䈩䈇䉎䇯
࿑ 3.2.2-4䈲0.13㱘m䈱േ㔚䉕ዋ䈚䈕䈩ઁ䈱䊒䊨䉶䉴䈫ห䈛ಽᏓ⁁ᘒ䈮ว䉒䈞䈢䉅䈱䈪
䈅䉎䇯䈖䉏䈮䉋䈦䈩SET䊌䊦䉴䈱ಽᏓ䈏㔚䈮ଐሽ䈚䈩䈇䉎䈖䈫䈏್䉎䇯
䈖䉏䉁䈪นᄌㆃᑧ䊤䉾䉼䈪᳞䉄䈢䊂䊷䉺䈱ᅷᒰᕈ䉕⺞䈼䉎䈢䉄䇮DICE 䉶䊦䈪䉅⹜㛎䊂䊷䉺䉕
᷹ቯ䈚䈢䇯࿑ 3.2.2-5䈲 200MHz䈱䊂䊷䉺䈪䈅䉎䇯㔚䉕ਅ䈕䉎䈫䇮䊌䊦䉴䈏ᐢ䈏䉎䈢䉄䇮DICE 䉶䊦䈮ข䉍ㄟ䉁䉏䉎 SET 䈏ᄙ䈒䈭䈦䈩䈍䉍䇮นᄌㆃᑧ䊤䉾䉼䈫ห䈛⚿ᨐ䈮䈭䉎䈖䈫䈏䉒䈎䉎䇯ታ㛎䈲 㕒ᱛ⁁ᘒ(0Hz)䈎䉌 500MHz 䉁䈪⹜㛎䈚䈢䈏䇮䈬䉏䉅࿑䈫ห䈛ะ䉕ᓧ䈢䇯㕒ᱛᤨ䈮䈲䉣䊤䊷䈲䉷 䊨䈪䇮ᵄᢙ䈏㜞䈒䈭䉎䈫SET䈱ข䉍ㄟ䉂ᢙ䈏Ⴧട䈚䇮એ೨䈱⺰ᢥ[2]䈫ห᭽䈱⚿ᨐ䉕ᓧ䈢䇯
࿑ 3.2.2-6䈲SET䊌䊦䉴䈏ข䉍ㄟ䉁䉏䉎䉺䉟䊚䊮䉫䉕⺑䈚䈢䉅䈱䈪䈅䉎䇯⸳⸘䈪䈲䉪䊨䉾䉪䈱┙ਅ
䉍䈪䊂䊷䉺䉕ข䉍ㄟ䉃䉋䈉䈮䈭䈦䈩䈇䉎䇯࿑䈱⌀ਛ䈱ੑ䈧䈱䉺䉟䊚䊮䉫䈪䈲SET䊌䊦䉴䈏䉪䊨䉾䉪䈱ข ㄟ䉂ᦼ㑆䈮䈎䈎䉎䈱䈪ข䉍ㄟ䉁䉏䉎䇯৻⇟䈫ਅ䈲ขㄟ䉂ᦼ㑆䈮ኻ䈚䈩 SET 䊌䊦䉴䈱㆐䈏ᣧㆊ 䈑䈢䉍ㆃㆊ䈑䈢䉍䈜䉎䈱䈪ข䉍ㄟ䉁䉏䈭䈇䇯䈖䈱࿑䈎䉌䉪䊨䉾䉪ᵄᢙ䈏㜞䈒䈭䉍䇮䊌䊦䉴䈏ᐢ䈒䈭䈦 䈩䉉䈒䈫䇮ข䉍ㄟ䉁䉏䉎⏕₸䈏100%䈮ㄭ䈨䈇䈩䉉䈒䈖䈫䈏ℂ⸃䈘䉏䉎䇯
(5) 䉁䈫䉄䈫⚿⺰
ᧄ⺰ᢥ䈪䈲LET৻ቯ䈱ਅ䈪䇮0.25, 0.18, 0.13㱘m䈱䊁䉪䊉䊨䉳䊷䊉䊷䊄䈮䈧䈇䈩േ㔚䉕ᄌ 䈋䈩SET䈱䊌䊦䉴䈫ᢿ㕙Ⓧ䉕⺞䈼䈢䇯䊁䉪䊉䊨䉳䊷䊉䊷䊄䈫േ㔚䈱䉴䉬䊷䊥䊮䉫䈏ㅴ䉃䈫SET 䊌䊦䉴䈏㐳䈒䈭䈦䈩䉉䈒䈖䈫䉕␜䈚䈢䇯䈖䉏䈫ᵄᢙ䈏㜞䈒䈖䈫䈮䉋䉍䇮SET 䈮䉋䉎䉸䊐䊃䉣䊤䊷䈏
ᓟ䈱㊀ⷐ䈭㗴䈮䈭䉎䈖䈫䉕␜䈚䈢䇯ታ㛎䈪䈲นᄌㆃᑧ䊤䉾䉼䈪䊂䊷䉺䉕ขᓧ䈚䈢䈏䇮DICE䉶䊦
䈪䉅ታ㛎䉕ⴕ䈦䈩Ყセ䈜䉎䈖䈫䈪䇮䊂䊷䉺䈱ᅷᒰᕈ䉕⏕䈎䉄䈢䇯
(6) ᢥ₂䈮ኻ䈜䉎⠨ኤ
ᧄ⺰ᢥ䈲ᓥ᧪䈱⺰ᢥ䈱䊂䊷䉺䈮 0.13㱘m 䈱䊂䊷䉺䉕ㅊട䈚䈢䉅䈱䈪䈅䉎䇯⓭䈐䉄䈩ౝኈ䉕ี
䈜䉎䈫䇮0.25䈫0.18㱘m䈪䈲SET䊌䊦䉴䈱Ꮕ䈏䈭䈒䇮0.13㱘m CMOS䉕ᮡḰ㔚䈱1.25V䈪
േ䈘䈞䉎䈫 SET 䈱䊌䊦䉴䈏ᄢ䈮Ⴧᄢ䈚䈩㗴䈮䈭䉎䈫䈇䈉ὐ䉕ਥᒛ䈚䈩䈇䉎䇯䈖䈱䊉䊷䊄䈱 䊂䊷䉺䈣䈔䈪వ䈱ㅢ䈚䉕䉄ઃ䈔䈩䉋䈇䈎䈫䈇䈉⇼䉕↢䈛䉎䇯ITRS 䈱䊨䊷䊄䊙䉾䊒䈪䈲䉅䈦䈫వ 䈱䊉䊷䊄䉁䈪ᮡḰ㔚䉕ឭ␜䈚䈩䈇䉎䈱䈪䇮䉅䈉ዋ䈚ᄙ䈒䈱䊉䊷䊄䈱䊂䊷䉺䉕ข䈦䈩వ䈱ㅢ䈚䉕┙䈩 䉎䈖䈫䈏ᦸ䉁䉏䉎䇯
3.2.3 ᭂ⭯䊗䊂䉞䉲䊮䉫䊦䉭䊷䊃䇮䉻䊑䊦䉭䊷䊃䊂䊋䉟䉴䈮䈍䈔䉎㊀䉟䉥䊮ᾖ䈱㊂ሶലᨐ䈱⎇
ⓥ
ᢥ₂ฬ Investigation of Quantum Effects in Ultra-Thin Body Single- and Double-Gate Devices Submmited to Heavy Ion Irradiation
ౖ IEEE Transaction on Nuclear Science, Vol.53, No.6, pp. 3363- 3371, Dec. 2006.
⪺⠪ฬ D. Munteanu, V. Ferlet-Cavrois, J. L. Autran, P. Paillet, J. Baggio, O. Faynot, C. Jahan, and L. Tosti 㩷 㩷 䋨MRᄢ䇮CEA䋩
ኻ⽎䊂䊋䉟䉴 䉻䊑䊦䉭䊷䊃MOSFET䇮SOI ታ㛎⸳ GANIL䋨䉦䊮䌀䊐䊤䊮䉴䋩
䋨䉸䊐䊃䉡䉣䉝䋩ISE␠䊂䊋䉟䉴䉲䊚䊠䊧䊷䉺DESSIS ᾖ✢⒳䈶
䉣䊈䊦䉩䊷䈱ಽ
㊀䉟䉥䊮ᾖ
LET䋽0.1䌾100MeVcm䋲/mg න⊒⽎䈲
Ⓧ▚✢㊂ലᨐ䈱ಽ
න⊒ォ⽎䋨SET䋩 ታ㛎䈲ℂ⺰䈱ಽ ⸘▚ᯏ䉲䊚䊠䊧䊷䉲䊢䊮䇮ታ㛎
(1) ⷐ⚂㩷
10nm䉰䉟䉵SOI MOSFET䈮ኻ䈜䉎SET䉕䇮㊀䉟䉥䊮ᾖታ㛎䇮䈍䉋䈶䇮㊂ሶലᨐ䉕⠨ᘦ䈚䈢3
ᰴర䊂䊋䉟䉴䉲䊚䊠䊧䊷䉲䊢䊮䈪⎇ⓥ䈚䈢䇯50nmFD(ቢోⓨਲဳ)䉲䊮䉫䊦䉭䊷䊃SOI䈮GANIL䋨䉦 䊮䌀䊐䊤䊮䉴䋩䈱ᣂታ㛎ⵝ⟎䉕䈦䈩㊀䉟䉥䊮䉕ᾖ䈚䈢䇯ᰴઍᭂ⭯䉲䊮䉫䊦䉭䊷䊃䇮䉻䊑䊦䉭䊷䊃 䊂䊋䉟䉴䈪䈲㊂ሶ㐽䈛ㄟ䉄ലᨐ䈏㊀ⷐ䈪䈅䉍䇮㊀䉟䉥䊮ᾖᤨ䈱േ䈮ኻ䈚䈩䉅ᓇ㗀䈏ᄢ䈐䈇䇯
(2) ✜⸒㩷
ᭂ⭯䊗䊂䉞䈱SOI MOSFET䈲䇮SG(䉲䊮䉫䊦䉭䊷䊃)䇮DG(䉻䊑䊦䉭䊷䊃)䈇䈝䉏䈮䈍䈇䈩䉅䇮䉼䊞 䊈䊦䈱䊘䊁䊮䉲䊞䊦ᓮ䇮⍴䉼䊞䊈䊦ലᨐ䈱ᷫዋ䇮䊐䊨䊷䊁䉞䊮䉫䊗䊂䉞ലᨐ䈱ᷫዋ䈮䉋䈦䈩㗼⪺䈭 䊌䊐䉤䊷䊙䊮䉴䉕␜䈜[1],[2]䇯㊀䉟䉥䊮䈏ᾖ䈘䉏䉎䈫䇮ၒㄟ䉂㉄ൻ⤑䈏㔚⩄㓸䉕㒢䈚䇮SET䈮 ኻ䈜䉎ᗵᐲ䈏㗼⪺䈮ૐ䈒䈭䉎䇯Si⤑䉕⭯䈒䈚䈩䈇䈒䈫SET⠴ᕈ䈏ะ䈜䉎[3]䇯
䈖䉏䉌䈱ᭂ⭯䊂䊋䉟䉴䋨⤑ෘ䈏10nmએਅ䋩䈮䈍䈇䈩䈲䇮㊂ሶജቇ⊛ലᨐ䈏㊀ⷐ䈪䈅䉎䇯⤑䈱⭯䈘 䈏㔚ሶ䈱ᵄ㐳⒟ᐲ䈫㕖Ᏹ䈮⁜䈇䊘䊁䊮䉲䊞䊦ᚭ䈪䈲䇮ᴺ✢ᣇะ䈮ᒝ䈇䉰䊑䊋䊮䊄ಽ㔌䈫䉨䊞䊥䉝 㐽䈛ㄟ䉄䉕⺃䈜䉎[4]䇯㊂ሶ㐽䈛ㄟ䉄䈲䉼䊞䊈䊦䈏⭯䈒䈭䉎䈾䈬䉋䉍ᒝ⺞䈘䉏䇮䉼䊞䊈䊦ౝ䈱䉨䊞䊥 䉝ಽᏓ䉕ᢅᗵ䈮ᄌൻ䈘䈞䉎䇯㔚⩄䈱䊏䊷䉪⟎䈲⇇㕙䈎䉌Si⤑ౝㇱ䈻⒖േ䈚䇮ォ㔚⩄䈱✚㊂䈏
ᷫዋ䈜䉎䇯ᚒ䇱䈲ᭂ⭯⤑䈮䈍䈔䉎FD SG SOI䈻䈱䉟䉥䊮ᛂ䈤ㄟ䉂䈮䉋䉎䊄䊧䉟䊮ㆊᷰ㔚ᵹ䈮䈧䈇 䈩䇮㊂ሶലᨐ䉕ೋ䉄䈩⠨ᘦ䈚䈢3ᰴర䊂䊋䉟䉴䉲䊚䊠䊧䊷䉲䊢䊮䉕ⴕ䈦䈢䇯
䊅䊉䉴䉬䊷䊦䈻ะ䈎䈉MOSFET䈱䈭䈎䈪ᦨജ䈫⠨䈋䉌䉏䈩䈇䉎DG䊂䊋䉟䉴䈲䇮2䈧䈱䉭䊷䊃㔚
ᭂ䈮䉋䉎㕒㔚⊛ᓮ䈱䈢䉄䈍䉋䈶⍴䉼䊞䊈䊦ലᨐ䈱㒰䈱䈢䉄䈮㕖Ᏹ䈮⭯䈇Si⤑䉕ᔅⷐ䈫䈚䈩䈇 䉎䇯DG䊂䊋䉟䉴䈪䈲⒖േᐲ䈏Ⴧട䈚䇮ਇ⚐‛䉉䉌䈑䈏㒰䈘䉏䇮㜞⏕₸䈭䊋䊥䉴䊁䉞䉾䉪ャㅍ䉕ឭଏ 䈜䉎৻ᣇ䇮ᭂ⭯䉼䊞䊈䊦䈲ᒝജ䈭㊂ሶജቇ⊛㐽䈛ㄟ䉄ലᨐ䉕䈖䈜䇯
㩷
㩷
(3) ታ㛎䋺ኻ⽎䊂䊋䉟䉴䈱⸥ㅀ㩷
㊀䉟䉥䊮ታ㛎䈲䇮GANIL䋨䉦䊮䌀䊐䊤䊮䉴䋩䈪ⴕ䈦䈢䇯ዊ䈘䈒䈩ᢅᗵ䈭䊂䊋䉟䉴䉕⺞䈼䉎䈢䉄䈮䇮㕖 Ᏹ䈮㜞䈇䊐䊤䉾䉪䉴(109-1010ions/cm2/s)䉕ᓧ䉎䈢䉄䈪䈅䉎䇯780MeV Kr78䉟䉥䊮䉕↪䈚䇮LET䈲 30MeVcm2/mg䇮ᾖ▸࿐䈲䈍䈍䉋䈠100㱘m䈪䈅䉎䇯
SEMᢿ㕙䉕䉎䈫ታ䉭䊷䊃㐳䈲⒓䉭䊷䊃㐳䉋䉍⚂20nm⍴䈇䇯
ታ㛎ⵝ䈱ේℂ䈮䈧䈇䈩䈲䇮એ೨䈱⎇ⓥ[9]-[11]䈮⚦䉕⸥䈚䈢䇯ᤨ㑆ಽ⸃䉟䉥䊮䊎䊷䊛㔚⩄
㓸(TRIBIC)[12]䉕↪䈇䈩䈇䉎䇯ᾖ䈲䉥䊐⁁ᘒ䈪ⴕ䈦䈢䇯ᚒ䇱䈱ታ㛎ⵝ䈱ᐕ䈱ਥⷐ䈭ᡷༀὐ 䈲䇮ᣂ䈚䈇㜞Ꮺၞ䉲䊮䉫䊦䉲䊢䉾䊃䉴䉮䊷䊒䈪䈅䉎䇯
䉟䉥䊮ൻ㘧〔䈱⟎䈲䉒䈎䉌䈭䈇䈱䈪䇮⛔⸘⊛䈮ផቯ䈜䉎䈚䈎䈭䈇䇯Si⤑䈏⭯䈇䈱䈪䇮⫾Ⓧ㔚⩄
䈱䈳䉌䈧䈐(10%)䉕⠨ᘦ䈜䉎ᔅⷐ䈏䈅䉎䇯
(4) FD䉲䊮䉫䊦䉭䊷䊃SOI䊂䊋䉟䉴䈱㊂ሶ䉲䊚䊠䊧䊷䉲䊢䊮㩷
䉲䊚䊠䊧䊷䉲䊢䊮䈪ข䉍ᛒ䈉3ᰴరSOI䈱⇛䉕࿑ 3.2.1-1 (a)䈮␜䈜䇯䉭䊷䊃㐳䈏50nm䇮80nm䈱 FD SG SOI䊃䊤䊮䉳䉴䉺䈮䈧䈇䈩䉲䊚䊠䊧䊷䉲䊢䊮䉕ⴕ䈦䈢䇯
(a) ㊂ሶ䊝䊂䊦
3ᰴరᢙ୯䉲䊚䊠䊧䊷䉲䊢䊮䈲䇮3D Synopsis䉮䊷䊄䋨Dessis䊝䉳䊠䊷䊦䋩[18]䈫ᚒ䇱䈏⁛⥄䈮
ᚑ䈚䈢䊐䊦㊂ሶ䉮䊷䊄BALMOS3D[19]䈪ታⴕ䈚䈢䇯3D Synopsis 䉲䊚䊠䊧䊷䉲䊢䊮䈪䈲䇮䉨䊞䊥䉝 䈱㊂ሶ㐽䈛ㄟ䉄ലᨐ䈮ኻ䈚䈩ኒᐲ൨㈩䊝䊂䊦[18],[20]䉕↪䈇䉎䇯ኒᐲ൨㈩䊝䊂䊦䈪䈲䇮㔚ሶኒ ᐲ䈱ᣇ⒟ᑼ䉕䉨䊞䊥䉝ኒᐲ䈱൨㈩䈮ଐሽ䈜䉎ઃട㗄㰸䉕䉃䉋䈉䈮ୃᱜ䈜䉎䋺
¸¸¹
¨¨ ·
©
§ /
kT Ec Nc E
n exp Fn 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 (1)
ᱜሹ䈮䈧䈇䈩䉅ห᭽䈪䈅䉎䇯ਔ䉨䊞䊥䉝ኒᐲᑼ䈲䊘䉝䉸䊮ᣇ⒟ᑼ䈫ャㅍᣇ⒟ᑼ䋨䊄䊥䊐䊃ᢔ䊝䊂 䊦䉁䈢䈲䊊䉟䊄䊨䉻䉟䊅䊚䉾䉪䊝䊂䊦䋩䈱䉶䊦䊐䉮䊮䉲䉴䊁䊮䊃⸃ᴺ䈮↪䈘䉏䉎䇯ᰴ䈱ᓸಽ䈱ᑼ䈪 ਈ䈋䉌䉏䉎ƭ䉕ㆡಾ䈮䊝䊂䊥䊮䉫䈜䉎ᔅⷐ䈏䈅䉎䋺
n n m
2
6
/ J= 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷 㩷(2)
䋨⸶ᵈ䋺 = 䈲ᱜ⏕䈮䈲 = 䈱ᐔᣇ䈪䈅䉎䇯䋩䊐䉞䉾䊁䉞䊮䉫䊐䉜䉪䉺䊷㱏䈱䉨䊞䊥䊑䊧䊷䉲䊢䊮䈲 BALMOS3D䈪ⴕ䈦䈢䇯
BALMOS3D[19]䈲1ᰴర䉲䊠䊧䊷䊂䉞䊮䉧䊷ᣇ⒟ᑼ䈫3ᰴర䊘䉝䉸䊮ᣇ⒟ᑼ䉕䉶䊦䊐䉮䊮䉲䉴
࿑ 3.2.3-1. Schematic description of the 3D FD Single-Gate SOI and Double-Gate devices simulated in this work. The doping levels of the colored regions are: green regions -1015cm-3, orange regions -5×1018cm-3, red regions -1020cm-3
䊁䊮䊃䈮⸃䈒䇯䈖䈱ᣇ⒟ᑼ⟲䈱⸃䈲䇮䉼䊞䊈䊦䈪䈱䊄䊥䊐䊃ᢔャㅍᣇ⒟ᑼ䈫䉦䉾䊒䊥䊮䉫䈘䉏䉎䇯 䉼䊞䊈䊦䇮䉸䊷䉴䇮䊄䊧䉟䊮䈱ฦ㗔ၞ䇮䉭䊷䊃㉄ൻ⤑ጀ䇮䉭䊷䊃㔚ᭂ䉕⸘▚䈜䉎䈢䉄䈮㒢Ꮕಽ䊜䉾 䉲䊠䈲ਇ╬㑆㓒䈫䈚䈢䇯䉸䊷䉴䋯䊄䊧䉟䊮䈱㔚⇇䇮䉭䊷䊃㉄ൻ⤑ਛ䈱㔚ሶᵄേ㑐ᢙ䉅⠨ᘦ䈚䈢䇯
䉨䊞䊥䊑䊧䊷䉲䊢䊮䈲Si⤑ෘ11nm䈱䉭䊷䊃㐳50nm䇮80nm䈮ኻ䈚䈩ⴕ䈦䈢䇯ฦ䊂䊋䉟䉴䈮䈍 䈇䈩䇮ID-VG․ᕈ䉕BALMOS 3D䈪⸘▚䈚䈢䇯Synopsis䈪⸘▚䈘䉏䈢․ᕈ䈫ቢో䈮৻⥌䈘䈞䉎䈢 䉄䈮䇮㱏䉕♖ᐲ⦟䈒䉼䊠䊷䊆䊮䉫䈚䈢䇯
(b) 㕒⊛䉲䊚䊠䊧䊷䉲䊢䊮䈱ታ㛎䊂䊷䉺䈮ኻ䈜䉎䉨䊞䊥䊑䊧䊷䉲䊢䊮
Synopsis䉮䊷䊄䈪䈲䇮ኒᐲ൨㈩䊝䊂䊦䈮ട䈋䈩䇮SRHౣ⚿ว䇮Augerౣ⚿ว䇮䊐䉢䊦䊚䊂䉞䊤䉾 䉪⛔⸘䉕䉃‛ℂ䊝䊂䊦䇮䈏⠨ᘦ䈘䉏䈩䈇䉎䇯ⴣ⓭䉟䉥䊮ൻᢔੂ䈫䉨䊞䊥䉝⒖േᐲ䈲䇮䊊䉟䊄䊨䉻䉟 䊅䊚䉾䉪䊝䊂䊦䈪⸘▚䈘䉏䈢䉨䊞䊥䉝䉣䊈䊦䉩䊷䈮ଐሽ䈘䈞䉎䈖䈫䈏䈪䈐䉎䇯⒖േᐲ䊝䊂䊦䈲䇮ᩰሶ
᷷ᐲ䉇䉼䊞䊈䊦䈱䊄䊷䊏䊮䉫䊧䊔䊦䈮ଐሽ䈜䉎䊝䊂䊦䉅䉖䈪䈇䉎䇯࿑ 3.2.3-2䈲䇮50nm FD
SG SOI䊂䊋䉟䉴䈮䈍䈔䉎䉨䊞䊥䊑䊧䊷䉲䊢䊮⚿ᨐ䉕␜䈜䇯
ታ㛎䊂䊷䉺䈫䉋䈒৻⥌䈚䈩䈇䉎䇯 (c) ㆊᷰ䉲䊚䊠䊧䊷䉲䊢䊮䈱⚦䈫⚿ᨐ
䉨䊞䊥䊑䊧䊷䉲䊢䊮ᓟ䇮ᗵᔕ㗔ၞ䈻䈱䉟䉥䊮ᛂㄟ䉂䈮䉋 䉎 SET䉲䊚䊠䊧䊷䉲䊢䊮䉕ฎౖ⊛䉬䊷䉴䋨㊂ሶലᨐ䈭䈚䋩䈫
㊂ሶ䉬䊷䉴䈱ਔᣇ䈪ⴕ䈦䈢䇯䊋䉟䉝䉴䈲䉥䊐⁁ᘒ䋨ᦨ䉅ᢅ
ᗵ䈭⁁ᘒ䋩䈫䈚䈢䇯
ᾖ㘧〔䈲䉧䉡䉲䉝䊮ဳ䈪䇮ඨᓘ 14nm䇮䊏䊷䉪ᤨೞ 50ps䇮․ᕈᤨ㑆2ps䋨䉟䉥䊮ᛂㄟ䉂ᤨೞ䈲t=1fs䋩䈫䈚䈢䇯 ඨᓘ䉕䈖䈱䉋䈉䈮ዊ䈘䈒䈚䈢ℂ↱䈲䇮ታ㛎䈫Ყセ䈜䉎䈢䉄䈪
䈅䉎䇯ᦨೋ䈲೨⸥䈱㊀䉟䉥䊮ታ㛎䈫ห᭽䈮䉟䉥䊮ⷺ䉕60ᐲ䈫䈚䈢䇯
㊂ሶ䉬䊷䉴䈪䈲ォ㔚⩄ኒᐲ䈱ᦨᄢ୯䈏Si䉼䊞䊈䊦ౝㇱ䈻䉲䊐䊃䈚䈩䈇䉎䇯࿑ 3.2.3-3(a)䉕
䉎䈫䇮㔚ሶኒᐲ䈱䊏䊷䉪⟎䈲䇮ฎౖ䉬䊷䉴䈪䈲Si䉼䊞䊈䊦䈫䉭䊷䊃㉄ൻ⤑䈱⇇㕙䈮䇮㊂ሶ䉬䊷䉴 䈪䈲Si⤑䈱ౝㇱᢙnm䈱ᷓ䈘䈻⒖േ䈚䈩䈇䉎䇯㊂ሶ䉬䊷䉴䈱ᣇ䈏ォ㔚⩄䈱✚㊂䈲ዋ䈭䈒䇮䈠䈱 䈢䉄㑣୯㔚䈲㜞䈒䈭䉍䇮⚿ᨐ䈫䈚䈩䉥䊐⁁ᘒ䈪䈱䊄䊧䉟䊮㔚ᵹ䈏ዊ䈘䈇䋨࿑ 3.2.3-3(b)䋩䇯
ᐞ䈧䈎䈱 LET 䈮䈧䈇䈩䇮䉟䉥䊮ᛂㄟ䉂䈮䉋䉎ㆊᷰ䊄䊧䉟䊮㔚ᵹ䉕Ყセ䈚䈩࿑ 3.2.3-4䈮␜䈜䇯 㔚ᵹ䈱ᕆỗ䈭┙䈤䈏䉍䈫䊁䊷䊦䈲㕖Ᏹ䈮ૃ䈩䈇䉎䇯㜞LET ၞ䈪䈲㔚⩄↢ᚑ䈱ነਈ䈏㕖Ᏹ䈮ᄢ 䈐䈒䇮䉼䊞䊈䊦ౝ䉨䊞䊥䉝ಽᏓ䈱㆑䈇䉕䊙䉴䉪䈜䉎䈱䈪ㆊᷰ㔚ᵹ䈲䈾䈫䉖䈬ห৻䈮䈭䉎䇯
䉲䊚䊠䊧䊷䉲䊢䊮䈪䈱ㆊᷰ㔚ᵹ䈱ᜬ⛯ᤨ㑆䈲㕖Ᏹ䈮⍴䈒ታ᷹୯䉋䉍䉅⍴䈇䇯50nmFD SG SOI䈪 䈲䇮ᜬ⛯ᤨ㑆䋨䊏䊷䉪୯䈱10%䋩䈲LET=30䈪15ps䈪䈅䉎䇯
㓸㔚⩄䇮䊋䉟䊘䊷䊤䉭䉟䊮䈫䉅㊂ሶ䉬䊷䉴䈱႐ว䈱ᣇ䈏ૐ䈇䋨࿑ 3.2.3-5䋩䇯䈖䉏䈲䉥䊐⁁ᘒ㔚
࿑ 3.2.3-2. Calibration of the simulated quantum drain current on experimental data in 50 nm (70nm drawn gate) FD Single-Gate SOI devices.