NTHD3101F MOSFET – Power, P-Channel, Schottky Diode, ChipFET, FETKY, Schottky Barrier Diode

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MOSFET – Power,

P-Channel, Schottky Diode, ChipFET, FETKY, Schottky Barrier Diode

-20 V, -4.4 A, 4.1 A

Features

• Leadless SMD Package Featuring a MOSFET and Schottky Diode

• 40% Smaller than TSOP−6 Package

• Leadless SMD Package Provides Great Thermal Characteristics

• Independent Pinout to each Device to Ease Circuit Design

• Trench P−Channel for Low On Resistance

• Ultra Low V

_F

Schottky

• Pb−Free Packages are Available

Applications

• Li−Ion Battery Charging

• High Side DC−DC Conversion Circuits

• High Side Drive for Small Brushless DC Motors

• Power Management in Portable, Battery Powered Products

MOSFET MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)

Parameter Symbol Value Units

Drain−to−Source Voltage V_DSS −20 V

Gate−to−Source Voltage VGS ±8.0 V

Continuous Drain

Current (Note 1) Steady State

T_J= 25°C I_D −3.2 A

T_J= 85°C −2.3

t ≤5 s T_J= 25°C −4.4 Power Dissipation

(Note 1) Steady

State TJ = 25°C

P_D 1.1 W

t ≤ 5 s 2.1

Pulsed Drain Current tp = 10 ms I_DM −13 A Operating Junction and Storage Temperature TJ, TSTG −55 to

150 °C

Source Current (Body Diode) I_S 2.5 A

Lead Temperature for Soldering Purposes

(1/8″ from case for 10 s) TL 260 °C

SCHOTTKY DIODE MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)

Peak Repetitive Reverse Voltage V_RRM 20 V

DC Blocking Voltage V_R 20 V

http://onsemi.com

G

P−Channel MOSFETD S

C A

Schottky Diode

−20 V

20 V

85 mW @ −2.5 V 64 mW @ −4.5 V

4.1 A R_DS(on) TYP

−4.4 A

0.510 V

I_D MAX V_(BR)DSS

MOSFET

SCHOTTKY DIODE

V_R MAX V_F TYP I_F MAX

ChipFET CASE 1206A

STYLE 3 1

8

PIN

CONNECTIONS MARKING

DIAGRAM 1

2 3 4

8 7 6 5

8 7 6

5 4

3 2 1

C C D D A

A S G

D1 MG

D1 = Specific Device Code M = Month Code G = Pb−Free Package

See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.

ORDERING INFORMATION

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http://onsemi.com 2

SCHOTTKY DIODE MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)

Average Rectified

Forward Current Steady

State T_J= 25°C

I_F 2.2 V

t ≤ 5 s 4.1 A

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces).

THERMAL RESISTANCE RATINGS

Parameter Symbol Max Units

Junction−to−Ambient – Steady State (Note 2) R_qJA 113 °C/W

Junction−to−Ambient – t ≤ 10 s (Note 2) R_qJA 60 °C/W

2. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces).

MOSFET ELECTRICAL CHARACTERISTICS(TJ = 25°C unless otherwise noted)

Parameter Symbol Test Conditions Min Typ Max Units

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V(BR)DSS V_GS= 0 V, I_D= −250 mA −20 V

Drain−to−Source Breakdown Voltage

Temperature Coefficient V_(BR)DSS/T_J −15 mV/°C

Zero Gate Voltage Drain Current I_DSS

VDS = −16 V, VGS = 0 V TJ = 25°C −1.0 mA

T_J = 125°C −5.0

Gate−to−Source Leakage Current I_GSS V_DS= 0 V, V_GS= ±8.0 V ±100 nA

ON CHARACTERISTICS (Note 3)

Gate Threshold Voltage V_GS(TH) VGS = VDS, ID = −250 mA −0.45 −1.5 V

Gate Threshold

Temperature Coefficient VGS(TH)/TJ 2.7 mV/°C

Drain−to−Source On−Resistance RDS(on) V_GS= −4.5, I_D= −3.2 A 64 80 mW

VGS = −2.5, ID = −2.2 A 85 110

VGS = −1.8, ID = −1.0 A 120 170

Forward Transconductance g_FS V_DS= −10 V, I_D= −2.9 A 8.0 S

CHARGES AND CAPACITANCES

Input Capacitance C_ISS

V_GS= 0 V, f = 1.0 MHz, V_DS= −10 V

680 pF

Output Capacitance C_OSS 100

Reverse Transfer Capacitance CRSS 70

Total Gate Charge QG(TOT)

V_GS= −4.5 V, V_DS= −10 V, ID = −3.2 A

7.4 nC

Threshold Gate Charge Q_G(TH) 0.6

Gate−to−Source Charge Q_GS 1.4

Gate−to−Drain Charge Q_GD 2.5

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time t_d(ON)

V_GS= −4.5 V, V_DD= −10 V, ID = −3.2 A, RG = 2.4 W

5.8 ns

Rise Time tr 11.7

Turn−Off Delay Time td(OFF) 16

Fall Time t_f 12.4

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage V_SD V_GS= 0 V, I_S= −2.5 A T_J = 25°C −0.8 −1.2 V

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MOSFET ELECTRICAL CHARACTERISTICS(T_J = 25°C unless otherwise noted)

DRAIN−SOURCE DIODE CHARACTERISTICS

Reverse Recovery Time tRR

V_GS= 0 V, I_S= −1.0 A , dI_S/dt = 100 A/ms

13.5 ns

Charge Time t_a 9.5

Discharge Time t_b 4.0

Reverse Recovery Charge Q_RR 6.5 nC

SCHOTTKY DIODE ELECTRICAL CHARACTERISTICS (T_J = 25°C unless otherwise noted)

Maximum Instantaneous

Forward Voltage V_F I_F= 0.1 A 0.425 V

I_F= 1.0 A 0.510 0.575

Maximum Instantaneous

Reverse Current IR VR = 10 V 1.0 mA

VR = 20 V 5.0

3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

4. Switching characteristics are independent of operating junction temperatures.

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TYPICAL P−CHANNEL PERFORMANCE CURVES

(T_J = 25°C unless otherwise noted)

−2 V

100°C 0

4

5 3

6 3

2

−V_DS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

−ID,DRAIN CURRENT (AMPS) 2 1 0

1

Figure 1. On−Region Characteristics

0.5 4

2

1.5 2.5

3 2 1

1 0

3

Figure 2. Transfer Characteristics

−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

Figure 3. On−Resistance vs. Gate−to−Source Voltage

−ID,DRAIN CURRENT (AMPS)

Figure 4. On−Resistance vs. Drain Current and Gate Voltage

−50 −25 0 25 1.3

1.2

1

0.8

0.7 50 100 125

Figure 5. On−Resistance Variation with Temperature

−T_J, JUNCTION TEMPERATURE (°C) TJ = 25°C

TC = −55°C

75 150

ID = −3.2 A VGS = −4.5 V

RDS(on),DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)

4

25°C

1.4

−2.2 V

2 4 8

10 16 20

Figure 6. Drain−to−Source Leakage Current vs. Voltage

−V_DS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 12

VGS = 0 V

−IDSS, LEAKAGE (nA)

TJ = 100°C

−1.4 V

−1.6 V

−1.8 V

100 1000

7 8

−2.6 V

V_DS≥ −10 V

6 10 14 18

VV_GS_GS = −3 V = −5 V to −3.6 V

1.1

0.9 5 6 7 8 9

9 10

−2.4 V

9 8 7 6 5

0 3.5

0.1

3 5

0.2

0.05

−V_GS, GATE−TO−SOURCE VOLTAGE (VOLTS) RDS(on),DRAIN−TO−SOURCE RESISTANCE (W)

−ID, DRAIN CURRENT (AMPS)

2 4

I_D = −3.2 A TJ = 25°C

RDS(on),DRAIN−TO−SOURCE RESISTANCE (W)

1 6 2 3 4 5

T_J = 25°C

V_GS = −4.5 V VGS = −2.5 V 0.15

6 7 8

0.125

0.075 0.175

0.1 0.2

0.05 0.15 0.125

0.075 0.175

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VDS = 0 V

V_GS = 0 V

5 10

1500

1200

900

300 0

20 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 7. Capacitance Variation

C, CAPACITANCE (pF)

Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge T_J = 25°C

C_OSS C_ISS

C_RSS

R_G, GATE RESISTANCE (OHMS) Figure 9. Resistive Switching Time Variation

vs. Gate Resistance

t, TIME (ns)

5 0

−V_GS −V_DS 15

1.2 1

0

−V_SD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 10. Diode Forward Voltage vs. Current

−IS, SOURCE CURRENT (AMPS)

VGS = 0 V T_J = 25°C 5

0.9 0.6

0.3 2 3 4

TYPICAL P−CHANNEL PERFORMANCE CURVES

(T_J = 25°C unless otherwise noted)

0 1 2 3 4 5

0 2 4 6 80

2 4 6 8 10

−V_GS

−VGS, GATE−TO−SOURCE VOLTAGE (V)

I_D = −3.2 A T_J = 25°C

−VDS,DRAIN−TO−SOURCE VOLTAGE (V) Q_GD

−V_DS

Q_T

Q_g, TOTAL GATE CHARGE (nC)

1 10 100 1000

1 10 100

V_DS = −10 V ID = −3.2 A VGS = −4.5 V

td(off)

t_d(on) t_f t_r 600

Q_GS

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TYPICAL SCHOTTKY PERFORMANCE CURVES

(T_J = 25°C unless otherwise noted) 10

0.20

VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS) IF, INSTANTANEOUS FORWARD CURRENT (AMPS)

1

0.1

Figure 11. Typical Forward Voltage Figure 12. Maximum Forward Voltage

10 1E−6

100E−9 10E−9

Figure 13. Typical Reverse Current V_R, REVERSE VOLTAGE (VOLTS) IR,REVERSE CURRENT (AMPS)

Figure 14. Maximum Reverse Current

25 3

2 2.5

1

0 65 105 125

Figure 15. Current Derating T_L, LEAD TEMPERATURE (°C) T_J = 150°C

1E−3

T_J = 25°C

85 165

freq = 20 kHz

IO, AVERAGE FORWARD CURRENT (AMPS) 3.5

20

0 1

0 3 3.5

Figure 16. Forward Power Dissipation I_O, AVERAGE FORWARD CURRENT (AMPS)

2 PFO, AVERAGE POWER DISSIPATION (WATTS)

0.2 1.8 0.40

0.5 1.5 2.5

0.60 0.80

0

T_J = 25°C T_J = −55°C

10

0.20

VF, MAXIMUM INSTANTANEOUS FORWARD VOLTAGE (VOLTS)

IF, INSTANTANEOUS FORWARD CURRENT (AMPS) 1

0.1

T_J = 150°C

0.40 0.60 0.80

T_J = 25°C

10E−6

T_J = 100°C T_J = 150°C

10

V_R, REVERSE VOLTAGE (VOLTS)

20 IMAXIMUM REVERSE CURRENT (AMPS)R, 0

1.5

0.5

45 145

Ipk/Io = 20 Ipk/Io = 10 Ipk/Io = 5 Ipk/Io = p square wave

dc

1 1.6

0.4 0.6 0.8

Ipk/Io = 20 Ipk/Io = 10

Ipk/Io = 5 Ipk/Io = p

square wave dc 1.4

1.2 100E−6

10E−3

1E−3 100E−6 10E+0

T_J = 25°C 100E−3

T_J = 100°C T_J = 150°C 1E+0

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DEVICE ORDERING INFORMATION

Device Package Shipping^†

NTHD3101FT1 ChipFET 3000 / Tape & Reel

NTHD3101FT1G ChipFET

(Pb−Free) 3000 / Tape & Reel

NTHD3101FT3 ChipFET 10000 / Tape & Reel

NTHD3101FT3G ChipFET

(Pb−Free) 10000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

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E

A e b

e1

D

1 2 3 4

8 7 6 5

c

L

1 2 3 4

8 7 6 5

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.

4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL AND VERTICAL SHALL NOT EXCEED 0.08 MM.

5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.

6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD SURFACE.

0.05 (0.002) SCALE 1:1

xxx MG G

xxx = Specific Device Code M = Month Code G = Pb−Free Package

(Note: Microdot may be in either location) GENERIC

MARKING DIAGRAM*

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “ G”, may or may not be present.

OPTIONAL SOLDERING FOOTPRINTS ON PAGE 2

1 8

DIM

A MINMILLIMETERSNOM MAX MIN

1.00 1.05 1.10 0.039

INCHES

b 0.25 0.30 0.35 0.010

c 0.10 0.15 0.20 0.004

D 2.95 3.05 3.10 0.116

E 1.55 1.65 1.70 0.061

e 0.65 BSC

e1 0.55 BSC

L 0.28 0.35 0.42 0.011

0.041 0.043 0.012 0.014 0.006 0.008 0.120 0.122 0.065 0.067 0.025 BSC 0.022 BSC

0.014 0.017

NOM MAX

1.80 1.90 2.00 0.071 0.075 0.079

HE

5°NOM

q 5°NOM

H_E

q

STYLE 1:

PIN 1. DRAIN 2. DRAIN 3. DRAIN 4. GATE 5. SOURCE 6. DRAIN 7. DRAIN 8. DRAIN

STYLE 2:

PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. DRAIN 2 7. DRAIN 1 8. DRAIN 1

STYLE 3:

PIN 1. ANODE 2. ANODE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. CATHODE 8. CATHODE

STYLE 4:

PIN 1. COLLECTOR 2. COLLECTOR 3. COLLECTOR 4. BASE 5. EMITTER 6. COLLECTOR 7. COLLECTOR 8. COLLECTOR

STYLE 5:

PIN 1. ANODE 2. ANODE 3. DRAIN 4. DRAIN 5. SOURCE 6. GATE 7. CATHODE 8. CATHODE

SOLDERING FOOTPRINT

0.457 0.018

2.032 0.08

0.65 0.025 PITCH

0.66 0.026

ǒ

_inches^mm

Ǔ

Basic Style

2.362 0.093

1

8X

STYLE 6:

PIN 1. ANODE 2. DRAIN 3. DRAIN 4. GATE 5. SOURCE 6. DRAIN 7. DRAIN

8. CATHODE / DRAIN

RESET ChipFETt CASE1206A−03

ISSUE K

DATE 19 MAY 2009

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.

98AON03078D DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 2 ChipFET

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*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

2.032 0.08

1.727 0.068

0.66 0.026 2.362

0.093

ǒ

_inches^mm

Ǔ

0.457 0.018

2.032 0.08

0.65 0.025 PITCH

0.66

0.026 1.118

0.044

ǒ

_inches^mm

Ǔ

1.092 0.043

2.362 0.093

Styles 1 and 4

Style 5 Style 2

0.457 0.018

ISSUE K

DATE 19 MAY 2009 ADDITIONAL SOLDERING FOOTPRINTS*

0.457 0.018

2.032

0.08 0.66

0.026

1.118 0.044

ǒ

_inches^mm

Ǔ

1.092 0.043

Style 3

1

2X 2X

1

2X 4X

1

2X

0.65 0.025 PITCH

2.362 0.093

0.457 0.018 2.032

0.08 0.66

0.026

1.118 0.044

ǒ

_inches^mm

Ǔ

1.092 0.043 1

2X

0.65 0.025 PITCH 2.362

0.093

98AON03078D DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 2 OF 2 ChipFET

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PUBLICATION ORDERING INFORMATION

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LITERATURE FULFILLMENT:

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For additional information, please contact your local Sales Representative

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