NCP786A Linear Regulator - Wide Input Voltage Range, Ultra-Low Iq, High PSRR, Adjustable Output Voltage

Linear Regulator - Wide Input Voltage Range,

Ultra-Low Iq, High PSRR, Adjustable Output Voltage

10mA

The NCP786A is high−performance linear regulator, offering a very wide operating input voltage range of up to 450 V DC, with an output current of up to 10 mA. Ideal for high input voltage applications such as industrial and home metering, home appliances. The NCP786A family offers ± 3% initial accuracy, extremely high−power supply rejection ratio and ultra−low quiescent current. The NCP786A family is optimized for high−voltage line and load transients, making them ideal for harsh environment applications. The output voltage can be set by resistor divider in range from 1.27 V up to 15 V. DFN6 5x6 Pb−free package with high allowable power dissipation keep small footprint at space sensitive applications.

Features

• Wide Input Voltage Range:

DC: Up to 450 V

AC: 85 V to 260 V (half−wave rectifier and 4.7 mF capacitor)

• 10 mA Guaranteed Output Current

• Ultra Low Quiescent Current: Typ. 10 m A (V

≤ 15 V)

• ± 5% Accuracy Over Full Load, Line and Temperature Variations

• Ultra−high PSRR: 70 dB at 60 Hz, 90 dB at 100 kHz

• Stable with Ceramic Output Capacitor 2.2 mF MLCC

• Thermal Shutdown and Current Limit Protection

• Available in DFN6 5x6 Package

• This is a Pb−Free Device

• Industrial Applications, Home Appliances

• Home Metering / Network Application

• Off−line Power Supplies

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See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.

ORDERING INFORMATION MARKING DIAGRAM

DFN6 5x6 ST SUFFIX CASE 506DV

(Note: Microdot may be in either location) (Top View)

786A XXX ALLYYWWG

G 786A = Specific Device Marking XXX = Voltage Version

(see page 7) A = Assembly Location LL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package

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Figure 1. Typical Applications VOUT

GND

1

ADJ GND NC VIN

GND NCP786

DFN6 5x6 EP Vin = (55 – 450) V

2

3

4 EP

6

NC 5 VOUT = (1.275 – 15.0) V / 10mA VIN

C_IN

VOUT

C_OUT R₁

R2

2.2 mF 4.7 mF

Figure 2. Simplified Internal Block Diagram

ADJ

+−

+− VREF

1.27V

VIN

VOUT

GND

Thermal Shutdown

Current Limit

Table 1. PIN FUNCTION DESCRIPTION

Pin No. Pin Name Description

1 VIN Supply Voltage Input. Connect 4.7 mF capacitor from VIN to GND.

2 NC Not connected.

3 NC Not connected.

4 GND Ground connection.

5 VOUT Regulator Output. Connect 2.2 mF or higher MLCC capacitor from VOUT to GND.

6 ADJ ADJ pin for output voltage setting via resistors divider.

EP EP EP should be connected to GND potential.

Table 2. ABSOLUTE MAXIMUM RATINGS

Rating Symbol Value Unit

Input Voltage (Note 1) V_IN −0.3 to 700 V

Output Voltage V_OUT −0.3 to 18 V

Maximum Junction Temperature T_J(MAX) 125 °C

Table 2. ABSOLUTE MAXIMUM RATINGS

Storage Temperature T_STG −55 to 150 °C

ESD Capability, Human Body Model (All pins except HV pin no.1) (Note 2) ESD_HBM 2000 V

ESD Capability, Machine Model (Note 2) ESD_MM 200 V

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Peak 650 V max 1 ms non repeated for 1 s

2. This device series incorporates ESD protection and is tested by the following methods:

ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) Latch−up Current Maximum Rating tested per JEDEC standard: JESD78.

Table 3. THERMAL CHARACTERISTICS

Rating Symbol Value Unit

Thermal Characteristics, DFN6

Thermal Resistance, Junction−to−Air JEDEC 51.3, One side, 600 sq mm PCB

R_qJA 82 °C/W

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Table 4. ELECTRICAL CHARACTERISTICS NCP786A Adj. (−40°C ≤ TJ ≤ 85°C; VIN = 340 V; I_OUT = 100 mA, CIN = 4.7 mF, COUT = 10 mF, unless otherwise noted. Typical values are at TJ = +25°C.) (Note 3)

Parameter Test Conditions Symbol Min Typ Max Unit

Operating Input Voltage DC V_IN 55 450 V

Maximum output voltage −40°C ≤ T_J≤ 85°C, Iout = 100 mA,

55 V ≤ Vin ≤ 450 V Voutmax 15 V

Reference Voltage Accuracy TJ = 25°C, Iout = 100 mA, 55 V ≤ Vin ≤ 450 V VREF −3% 1.275 +3% V −40°C ≤ TJ ≤ 85°C, Iout = 100 mA,

55 V ≤ Vin ≤ 450 V VREF −5% 1.275 +5% V

Line Regulation V_IN = 55 V to 450 V, Iout = 100 mA Reg_LINE −0.5 0.1 +0.5 %

Load Regulation I_OUT = 100 mA to 10 mA, Vin = 55 V Reg_LOAD −1.0 0.7 +1.0 %

Maximum Output Current 55 V ≤ Vin ≤ 450 V, (Note 4) I_OUT 11 mA

Quiescent Current I_OUT = 0, 55 V ≤ Vin ≤ 450 V I_GND 10 15 mA

Ground current 55 V ≤ Vin ≤ 450 V, (Note 4)

0 < I_OUT≤ 10 mA 25 mA

ADJ Pin current 150 nA

Power Supply Rejection Ratio Vin = 340 VDC +1 Vpp modulation,

Iout = 100 mA f = 1 kHz PSRR 65 dB

Noise f = 10 kHz to 1 MHz Vin = 340 VDC, Iout = 1 mA,

C_OUT = 10 mF V_NOISE 150 mVrms

Thermal Shutdown Temperature

(Note 5) Temperature increasing from T_J = +25°C T_SD 145 °C

Thermal Shutdown Hysteresis

(Note 5) Temperature falling from T_SD T_SDH − 10 − °C

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

3. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

4. Respect to Safe Operating Area 5. Guaranteed by design

TYPICAL CHARACTERISTICS

Figure 3. Output Voltage vs. Input Voltage Figure 4. Output Voltage vs. Temperature

INPUT VOLTAGE (V) TEMPERATURE (°C)

400 350 300 250 200 150 100 1.27250

1.273 1.274 1.275 1.276 1.277 1.278 1.279

80 60

40 20 0

−20 1.272−40

1.273 1.274 1.275 1.276 1.277 1.278 1.279

Figure 5. Quiescent Current vs. Input Voltage Figure 6. Output Voltage vs. Output Current

INPUT VOLTAGE (V) OUTPUT CURRENT (mA)

400 350 300 250 200 150 100 350 4 5 6 7 8 9 10

7 6 5 4 3 2 1 1.2660 1.268 1.270 1.272 1.274 1.276 1.278

Figure 7. Noise Density vs. Frequency FREQUENCY (kHz)

1000 100

10 1

0.1 00.01

5 10 15 20 25

OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V)

QUIESCENT CURRENT (mA) OUTPUT VOLTAGE (V)

NOISE DENSITY (mV√Hz)

450 T_A = 85°C

T_A = 25°C

T_A = 0°C

T_A = −40°C NCP786A Adj. V_OUT(nom) = 1.275 V

C_IN = 4.7 mF, COUT = 10 mF I_OUT = 100 mA

450

VIN = 55 V VIN = 150 V V_IN = 250 V V_IN = 350 V V_IN = 450 V

10 9 8 V_IN = 55 V

V_IN = 75 V V_IN = 100 V V_IN = 150 V V_IN = 200 V V_IN = 250 V V_IN = 300 V V_IN = 350 V

NCP786A Adj. T_A = 25°C C_IN = 4.7 mF, COUT = 10 mF V_OUT(nom) = 1.275 V

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APPLICATION INFORMATION

Figure 8. Typical Application Schematics

NCP786A

C

C

R

R

Vout = 1.275 V – 15 V / 10 mA IN

GND OUT

ADJ Vin = (55 – 450) Vdc

C

C

R

R

Vout = 1.275 V – 15 V / 10 mA Vin = (85 – 265) Vac

C

C

R

R

Vout = 1.275 V – 15 V / 10 mA Vin = (85 – 265) Vac

NC NC

EP

NCP786A

GND NC

EP

IN OUT

NC ADJ

NCP786A

GND NC

EP OUT IN

ADJ NC

Input Decoupling (C1)

A 4.7 mF capacitor either ceramic or electrolytic is recommended and should be connected close to the input pin of NCP786A. Higher value 4.7 mF is necessary to keep the input voltage above the required minimum input voltage at full load for AC voltage as low as 85 V with half wave rectifier. The capacitor 2.2 mF or 1 mF could be acceptable for DC input voltage or AC input voltage 235 V ±20%.

There must be assured minimum Input Voltage more than 55 V at input pin of NCP786A regulator in order to keep stable desired output voltage with guaranteed parameters.

Output Decoupling (C2)

The NCP786A Regulator does not require any specific Equivalent Series Resistance (ESR). Thus capacitors exhibiting ESRs ranging from a few m W up to 0.5 W can be used safely. The minimum decoupling value is 2.2 m F. The regulator accepts ceramic chip capacitors as well as tantalum devices or low ESR electrolytic capacitors. Larger values improve noise rejection and especially load transient response.

Layout Recommendations

Please be sure that the V

and GND lines are sufficiently wide. When the impedance of these lines is high, there is a chance to pick up noise or to cause the malfunction of regulator.

Set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible.

Thermal

As power across the NCP786A increases, it might become

necessary to provide some thermal relief. The maximum

power dissipation supported by the device is dependent

upon board design layout and used package. Mounting pad

configuration on the PCB, the board material, and also the

ambient temperature affect the rate of temperature rise for

the part. This is stating that when the NCP786A has good

thermal conductivity through the PCB, the junction

temperature will be relatively low with high power

dissipation applications.

Output Voltage

The output voltage can be set by using a resistor divider as shown in Figure 1 in range from 1.275 V up to 15 V. The appropriate resistor divider can be found by solving the equation below.

V_OUT+1.275

ǒ

Ǔ

^ǒ

Ǔ

The recommended current through the resistor divider is from 1 mA to 3 mA in order to keep negligible ADJ pin consumption. In this case we can simplify Equation 1 to:

V_OUT+1.275

ǒ

R2

Ǔ

ORDERING INFORMATION

Part Number Output Voltage Marking Package Shipping^†

NCP786AMNADJTBG Adjustable ADJ DFN6 5x6

(Pb−Free) 1000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

DFN6 5x6, 1.27P CASE 506DV

ISSUE O

DATE 12 OCT 2016 SCALE 2:1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.20 AND 0.25 MM FROM THE TERMINAL TIP.

4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.

5. FOR DEVICE OPN CONTAINING W OPTION, DETAIL B ALTERNATE B−1 AND DETAIL A ALTERNATE A−1 CONSTRUCTIONS ARE NOT APPLICABLE.

TOP VIEW

SIDE VIEW D

E A B

PIN ONE

DIM MINMILLIMETERSNOM A 0.80 0.90 A1 −−− −−−

b 0.30 0.40

D 5.00

D2 4.10 4.20

E 6.00

E2 1.75 1.85

e 1.27 BSC

K 0.25 −−−

L 0.45 0.55

0.08 C

0.10 C ^{DETAIL A}

MAX 1.00 0.05 0.50 4.30 1.95

−−−

0.65

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

4.90 5.10

5.90 6.10

RECOMMENDED

A = Assembly Location LL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “ G”, may or may not be present.

GENERIC MARKING DIAGRAM*

XXXXXXXX XXXXXXXX ALLYYWWG

G

(Note: Microdot may be in either location) DETAIL A

L

ALTERNATE TERMINAL CONSTRUCTIONS

L

ÉÉÉ

ÉÉÉ ÇÇÇ

DETAIL B

MOLD CMPD EXPOSED Cu

ALTERNATE CONSTRUCTIONS

ÉÉÉ

ÉÉÉ ÇÇÇ

A1

A3

ALTERNATE B−1 ALTERNATE B−2 ALTERNATE A−1 ALTERNATE A−2

A3 0.20 REF

e2 3.81 BSC

ÉÉ

ÉÉ

REFERENCE

SEATING PLANE

A3 A

A1 C

0.20 6.30

3.81 0.60

1.95

6X

PITCH

DIMENSIONS: MILLIMETERS

1

5.30 4.41

1.27 PITCH

0.75^6X

2

6 3

PACKAGE OUTLINE

BOTTOM VIEW

1 e2 2

10X

D2 K

E2 b

A 0.10 C B 0.05 C

L

DETAIL A NOTE 3

e

6X

3 6

NOTE 4

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ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.

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DESCRIPTION:

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Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

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