MOSFET – N-Channel, UniFETt

© Semiconductor Components Industries, LLC, 2007

December, 2019 − Rev. 3 1 Publication Order Number:

FDH210N08/D

UniFETt

75 V, 210 A, 5.5 mW

FDH210N08

Description

UniFET t MOSFET is ON Semiconductor’s high voltage MOSFET family based on planar stripe and DMOS technology. This MOSFET is tailored to reduce on−state resistance, and to provide better switching performance and higher avalanche energy strength.

This device family is suitable for switching power converter applications such as power factor correction (PFC), flat panel display (FPD) TV power, ATX and electronic lamp ballasts.

Features

• ^R

= 4.65 m (Typ.), V

= 10 V, I

= 125 A

• Low Gate Charge (Typ. 232 nC)

• ^{Low C}

(Typ. 262 pF)

• 100% Avalanche Tested

• Improved dv/dt Capability

• This Device is Pb−Free and is RoHS Compliant

• Synchronous Rectification for ATX / Server / Telecom PSU

• Battery Protection Circuit

• Motor Drives and Uninterruptible Power Supplies

See detailed ordering and shipping information on page 2 of this data sheet.

ORDERING INFORMATION www.onsemi.com

$Y = ON Semiconductor Logo

&Z = Assembly Plant Code

&3 = Data Code (Year & Week)

&K = Lot

FDH210N08 = Specific Device Code MARKING DIAGRAM

V_DSS R_DS(ON) MAX I_D MAX

75 V 5.5 m 210 A

G

S D

G D S

$Y&Z&3&K FDH 210N08

TO−247−3 CASE 340CK

ABSOLUTE MAXIMUM RATINGS (T_C = 25°C, Unless otherwise noted)

Symbol Parameter Value Unit

VDSS Drain−Source Voltage 75 V

I_D Drain Current Continuous (TC = 25°C) 210 A

Continuous (TC = 100°C) 132

IDM Drain Current Pulsed (Note 1) 840 A

VGSS Gate−Source Voltage ±20 V

EAS Single Pulsed Avalanche Energy (Note 2) 9375 mJ

IAR Avalanche Current (Note 1) 210 A

EAR Repetitive Avalanche Energy (Note 1) 46.2 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns

PD Power Dissipation (TC = 25°C) 462 W

Derate Above 25°C 3.7 W/°C

T_J, T_STG Operating and Storage Temperature Range −55 to +175 °C

T_L Maximum Lead Temperature for Soldering,

1/8″ from Case for 5 Seconds 300 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Repetitive rating: pulse width limited by maximum junction temperature.

2. L = 0.4 mH, I_AS = 125 A, V_DD = 50 V, R_G = 25 , starting TJ = 25°C.

3. I_SD ≤ 125 A, di/dt ≤ 260 A/s, VDD ≤ BVDSS, starting T_J = 25°C.

THERMAL CHARACTERISTICS

Symbol Parameter FDH210N08 Unit

R_JC Thermal Resistance, Junction to Case, Max. 0.27 _C/W

R_JA Thermal Resistance, Junction to Ambient, Max. 40 _C/W

PACKAGE MARKING AND ORDERING INFORMATION Part Number Top Mark Package

Packing

Method Reel Size Tape Width Quantity

FDH210N08 FDH210N08 TO−247 Tube N/A N/A 30 Units

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ELECTRICAL CHARACTERISTICS (T_C = 25°C unless otherwise noted)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

OFF CHARACTERISTICS

BV_DSS Drain−Source Breakdown Voltage V_GS = 0 V, I_D= 250 A 75 V

BVDSS / TJ Breakdown Voltage Temperature

Coefficient I_D= 250 A, Referenced to 25_C 0.1 V/°C

I_DSS Zero Gate Voltage Drain Current V_DS= 75 V, V_GS= 0 V 20 A

V_DS= 60 V, TJ = 150_C 250

I_GSSF Gate−Body Leakage Current, Forward V_GS= 20 V, V_DS = 0 V 200 nA

I_GSSR Gate−Body Leakage Current, Reverse V_GS=−20 V, V_DS = 0 V −200 nA

ON CHARACTERISTICS

V_GS(TH) Gate Threshold Voltage VDS= VGS, ID= 250 A 2.0 4.0 V

R_DS(ON) Static Drain−Source On−Resistance V_GS= 10 V, I_D= 125 A 4.65 5.5 m

g_FS Forward Transconductance V_DS= 25 V, I_D= 125 A 200 S

DYNAMIC CHARACTERISTICS

C_ISS Input Capacitance V_DS= 25 V, V_GS= 0 V, f = 1 MHz 8743 11340 pF

C_OSS Output Capacitance 2134 2778 pF

C_RSS Reverse Transfer Capacitance 262 393 pF

SWITCHING CHARACTERISTICS

t_d(ON) Turn-On Delay Time V_DD= 37.5 V, I_D= 69 A, R_G= 25

(Note 4) 100 210 ns

tr Turn−On Rise Time 410 830 ns

td(OFF) Turn-Off Delay Time 630 1270 ns

tf Turn−Off Fall Time 290 590 ns

Qg Total Gate Charge V_DS= 60 V, I_D= 125 A, V_GS= 10 V

(Note 4) 232 301 nC

Qgs Gate−Source Charge 58 nC

Qgd Gate−Drain Charge 77 nC

DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

I_S Maximum Continuous Drain−Source Diode Forward Current 210 A

I_SM Maximum Pulsed Drain−Source Diode Forward Current 840 A

V_SD Drain−Source Diode Forward Voltage V_GS = 0 V, I_S= 125 A 1.4 V

t_rr Reverse Recovery Time VGS= 0 V, IS = 125 A,

dl_F/dt = 100 A/s 123 ns

Q_RR Reverse Recovered Charge 420 nC

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Essentially independent of operating temperature typical characteristics.

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

Figure 3. On−Resistance Variation vs. Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature

0.1 1

10 100 500

* Notes : VGS

Top : 15.5 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom :

ID, Drain Current (A)

VDS, Drain−Source Voltage (V) ^2.3 12 4 6 8 10

10 100

* Notes :

−55 C 25^oC 175^oC

ID, Drain Current (A)

VGS, Gate−Source Voltage (V) 500

1. 250 ms Pulse Test

2. TC = 255C 1. V_DS = 25 V

2. 250 ms Pulse Test o

0 50 100 150 200 250 300 350 400 0.004

0.005 0.006

* Note : TJ = 25^oC VGS = 20V VGS = 10V

RDS(ON)(W), Drain−Source On−Resistance

ID, Drain Current (A)

1 10 100 1000 VGS = 0V

175^oC

IS, Reverse Drain Current (A)

V_SD, Body Diode Forward Voltage (V) 25^oC

VDS, Drain−Source Voltage (V)

10¹⁻ 10⁰ 10¹

0 4000 8000 12000 16000 20000 24000

Coss Ciss

Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd

Crss = Cgd

* Note:

1. VGS = 0 V 2. f = 1 MHz

Crss

Capacitances (pF)

30

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

0 50 100 150 200 250

0 2 4 6 8 10

* Note : ID = 125 A V_DS = 20 V

V_DS = 40 V V_DS = 60 V

VGS, Gate−Source Voltage (V)

Qg, Total Gate Charge (nC)

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TYPICAL PERFORMANCE CHARACTERISTICS

Figure 7. Breakdown Voltage Variation vs.

Temperature Figure 8. On− Resistance Variation

vs. Temperature

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature

Figure 11. Transient Thermal Response Curve

−100 −50 0 50 100 150 200

0.8 0.9 1.0 1.1 1.2

* Notes : 1. VGS = 0 V 2. ID = 1 mA BVDSS, (Normalized) Drain−Source Breakdown Voltage

TJ, Junction Temperature(5C) 0.0−100 −50 0 50 100 150 200

0.5 1.0 1.5 2.0 2.5 3.0

* Notes : 1. VGS = 10 V 2. ID = 125 A rDS(on), (Normalized) Drain−Source On−Resistance

TJ, Junction Temperature (5C)

25 50 75 100 125 150 175

0 50 100 150 200 250

ID, Drain Current (A)

TC, Case Temperature Limited by Package

10⁰ 10¹ 10² (5C)

10²⁻

10¹⁻

10⁰ 10¹ 10² 10³ 10⁴

10 ms 1 ms

DC Operation in This Area

is Limited by RDS(on)

* Notes : ID, Drain Current (A)

VDS, Drain−Source Voltage (V) 1. T_C = 255C 2. TJ = 1755C 3. Single Pulse

30 ms 100 ms

t₁, Rectangular Pulse Duration (sec)

10⁻⁵ 10⁴⁻ 10⁻³ 10²⁻ 10¹⁻ 10⁰ 10¹ 10² 0.001

0.01 0.1 1

0.01 0.1 0.2

0.05 0.02

* Notes :

1. ZJC(t) = 0.27^oC/W Max.

2. Duty Factor, D=t1/t2 3. TJM − TC = PDM * ZJC(t) D = 0.5

Single pulse

ZJC(t),Thermal Response (5C/W)

Figure 12. Gate Charge Test Circuit & Waveform

Figure 13. Resistive Switching Test Circuit & Waveforms

Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms Q_g

Q_gd Q_gs

V_GS

Charge V_DS

V_GS

Same Type as DUT

I_G = Const. DUT

R_L V_DS

V_GS

V_GS

R_G

DUT

V_DD

V_DS

V_GS10%

90%

10%

90% 90%

ton toff

t_r t_f

t_d(on) t_d(off)

V_DD VDS

R_G

V_GS DUT

L

ID

tp

V_DD

Time IAS

BV_DSS

I_D(t)

V_DS(t) E_AS+1

2@LI_AS² BV_DSS BV_DSS*V_DD

300 nF 200 nF

12 V

50 k

t_p

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Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT

L

VDD

RG

I_SD

V_DS +

−

VGS

Same Type as DUT

− dv/dt controlled by R_G

− I_SD controlled by pulse period Driver

VGS

(Driver)

ISD

(DUT)

V_DS

(DUT) V_SD

I_RM

10 V

di/dt

V_DD I_FM, Body Diode Forward Current

Body Diode Reverse Current

Body Diode Recovery dv/dt

Body Diode Forward Voltage Drop D+Gate Pulse Width

Gate Pulse Period

UniFET is a trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.

TO−247−3LD SHORT LEAD CASE 340CK

ISSUE A

DATE 31 JAN 2019

XXXX = Specific Device Code A = Assembly Location Y = Year

WW = Work Week ZZ = Assembly Lot Code

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking.

GENERIC MARKING DIAGRAM*

AYWWZZ XXXXXXX XXXXXXX

E

D

L1 E2

(3X) b (2X) b2

b4

(2X) e

Q

L

0.25 ^M B A ^M A

A1 A2 A

c

B

D1 P1

S P

E1

D2

1 2 3 2

DIM MILLIMETERS MIN NOM MAX A 4.58 4.70 4.82 A1 2.20 2.40 2.60 A2 1.40 1.50 1.60 b 1.17 1.26 1.35 b2 1.53 1.65 1.77 b4 2.42 2.54 2.66 c 0.51 0.61 0.71 D 20.32 20.57 20.82

D1 13.08 ~ ~

D2 0.51 0.93 1.35 E 15.37 15.62 15.87

E1 12.81 ~ ~

E2 4.96 5.08 5.20

e ~ 5.56 ~

L 15.75 16.00 16.25 L1 3.69 3.81 3.93

P 3.51 3.58 3.65 P1 6.60 6.80 7.00 Q 5.34 5.46 5.58 S 5.34 5.46 5.58

DOCUMENT NUMBER: Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

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