MOSFET – Power, SingleN-Channel

MOSFET – Power, Single N-Channel

40 V, 0.7 m W , 362 A

NVMFS5C406NL

Features

• Small Footprint (5x6 mm) for Compact Design

• ^{Low R}

to Minimize Conduction Losses

• ^{Low Q}

and Capacitance to Minimize Driver Losses

• NVMFS5C406NLWF − Wettable Flank Option for Enhanced Optical Inspection

• AEC−Q101 Qualified and PPAP Capable

• These Devices are Pb−Free and are RoHS Compliant

Parameter Symbol Value Unit

Drain−to−Source Voltage V_DSS 40 V

Gate−to−Source Voltage V_GS ±20 V

Continuous Drain Current R_qJC

(Notes 1, 3) Steady State

T_C = 25°C I_D 362 A

T_C = 100°C 256

Power Dissipation

R_qJC (Note 1) T_C = 25°C P_D 179 W

T_C = 100°C 90

Continuous Drain Current R_qJA

(Notes 1, 2, 3) Steady State

T_A = 25°C I_D 53 A

T_A = 100°C 38

Power Dissipation

R_qJA (Notes 1, 2) T_A = 25°C P_D 3.9 W

T_A = 100°C 1.9

Pulsed Drain Current TA = 25°C, tp = 10 ms IDM 900 A Operating Junction and Storage Temperature

Range T_J, T_stg −55 to

+175 °C

Source Current (Body Diode) I_S 149 A

Single Pulse Drain−to−Source Avalanche

Energy (I_L(pk) = 32.5 A) E_AS 498 mJ

Lead Temperature for Soldering Purposes

(1/8″ from case for 10 s) T_L 260 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Case − Steady State R_qJC 0.84 °C/W Junction−to−Ambient − Steady State (Note 2) R_qJA 38.7

1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted.

2. Surface−mounted on FR4 board using a 650 mm², 2 oz. Cu pad.

3. Maximum current for pulses as long as 1 second is higher but is dependent

V_(BR)DSS R_DS(ON) MAX I_D MAX 40 V 0.7 mW @ 10 V

362 A

G (4)

S (1,2,3) N−CHANNEL MOSFET

D (5,6)

See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet.

ORDERING INFORMATION 1.1 mW @ 4.5 V

MARKING DIAGRAMS

XXXXXX AYWZZ S

S S G

D

D D

D DFN5

CASE 506EZ

1

XXXXXX = Specific Device Code A = Assembly Location

Y = Year

W = Work Week ZZ = Lot Traceability

DFNW5 CASE 507BA

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 40 − − V Drain−to−Source Breakdown Voltage

Temperature Coefficient V(BR)DSS/

T_J − 16 − mV/°C

Zero Gate Voltage Drain Current I_DSS V_GS = 0 V,

V_DS = 40 V T_J = 25 °C − − 10

T_J = 125°C − − 250 mA

Gate−to−Source Leakage Current I_GSS V_DS = 0 V, V_GS = 20 V − − 100 nA

ON CHARACTERISTICS (Note 4)

Gate Threshold Voltage V_GS(TH) V_GS = V_DS, I_D = 280 mA 1.2 − 2.0 V

Threshold Temperature Coefficient V_GS(TH)/T_J − −5.7 − mV/°C

Drain−to−Source On Resistance R_DS(on) V_GS = 10 V I_D = 50 A − 0.55 0.7 V_GS = 4.5 V I_D = 50 A − 0.90 1.1 mW

Forward Transconductance g_FS V_DS =15 V, I_D = 50 A − 215 − S

CHARGES, CAPACITANCES & GATE RESISTANCE

Input Capacitance C_ISS

VGS = 0 V, f = 1 MHz, VDS = 20 V

− 9400 −

Output Capacitance C_OSS − 4600 − pF

Reverse Transfer Capacitance C_RSS − 140 −

Total Gate Charge Q_G(TOT) V_GS = 10 V, V_DS = 20 V; I_D = 50 A − 149 −

Threshold Gate Charge Q_G(TH) nC

V_GS = 10 V, V_DS = 20 V; I_D = 50 A

− 15.1 −

Gate−to−Source Charge Q_GS − 27 −

Gate−to−Drain Charge Q_GD − 22 −

Plateau Voltage VGP − 3.1 − V

SWITCHING CHARACTERISTICS (Note 5)

Turn−On Delay Time td(ON)

V_GS = 10 V, V_DS = 32 V, ID = 50 A, RG = 2.5 W

− 14 −

Rise Time tr − 47 − ns

Turn−Off Delay Time td(OFF) − 112 −

Fall Time tf − 131 −

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage VSD V_GS = 0 V,

IS = 50 A

TJ = 25°C 0.78 1.2

T_J = 125°C 0.64 V

Reverse Recovery Time tRR

VGS = 0 V, dIS/dt = 100 A/ms, I_S = 50 A

93

Charge Time t_a 44 ns

Discharge Time t_b 50

Reverse Recovery Charge Q_RR 174 nC

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

5. Switching characteristics are independent of operating junction temperatures.

TYPICAL CHARACTERISTICS

3.6 V

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics V_DS, DRAIN−TO−SOURCE VOLTAGE (V) V_GS, GATE−TO−SOURCE VOLTAGE (V)

3.0 1.5

1.0 0.5

00 50 100 150 200 250

3.0 2.0

0 1.0 100 200 300 400

Figure 3. On−Resistance vs. Gate−to−Source Voltage

Figure 4. On−Resistance vs. Drain Current and Gate Voltage

V_GS, GATE VOLTAGE (V) I_D, DRAIN CURRENT (A)

10 9 8 7 6 5 4 0 3

2 4

150 110

50 30 010 0.4 1.6

Figure 5. On−Resistance Variation with Temperature

Figure 6. Drain−to−Source Leakage Current vs. Voltage

T_J, JUNCTION TEMPERATURE (°C) V_DS, DRAIN−TO−SOURCE VOLTAGE (V) 150

125 100 75 25

0

−25

−50 0.6 0.8 1.0 1.2 1.4 1.6 1.8

40 35 30 25 15

15 1K

ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)

RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE IDSS, LEAKAGE (nA)

T_J = 125°C T_J = 25°C

T_J = −55°C

T_J = 25°C I_DS = 50 A

V_GS = 10 V ID = 50 A

50 175

TJ = 125°C

T_J = 25°C 300

450

500 450

2.0 2.5

1 3 5

0.8

10 100 1M

10 20

T_J = 150°C

5.0

90 190

1.2 2.0

500 VGS = 3.8 V to 10 V

2.0

V_DS = 10 V 350

400

350

250

150

50

4.5

0 0.5 1.5 2.5 4.0

V_GS = 4.5 V

TJ = 25°C

100K

T_J = 85°C 3.4 V

3.2 V 3.0 V 2.8 V 2.6 V

2

0.4

3.5

VGS = 10 V

70 130 170

10K

T_J = 175°C

Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge

V_DS, DRAIN−TO−SOURCE VOLTAGE (V) Q_G, TOTAL GATE CHARGE (nC)

40 30

20 10

100 1K

150 120

60 30

00 2 4 6 8 7

Figure 9. Resistive Switching Time Variation

vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current

RG, GATE RESISTANCE (W) V_SD, SOURCE−TO−DRAIN VOLTAGE (V)

100 10

11 100 10K

0.9

0.8 1.0

0.7 0.6 0.5 0.4 0.3

Figure 11. Safe Operating Area Figure 12. I_PEAK vs. Time in Avalanche

V_DS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s)

1000 10

1 0.10.1

10 100 1000

1 10

C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V)

t, TIME (ns) IS, SOURCE CURRENT (A)

ID, DRAIN CURRENT (A) IPEAK DRAIN CURRENT (A)

V_GS = 0 V T_J = 25°C f = 1 MHz

C_ISS

C_OSS

C_RSS VDS = 20 V

I_D = 50 A T_J = 25°C Q_GS Q_GD

V_GS = 10 V VDS = 32 V

ID = 50 A td(off)

td(on)

t_f t_r

V_GS = 0 V

T_J = 25°C T_J = −55°C

T_J(initial) = 100°C

T_J(initial) = 25°C

0.00001 0.01

R_DS(on) Limit Thermal Limit Package Limit

10 ms

0.5 ms 1 ms 10 ms V_GS≤ 10 V

Single Pulse T_C = 25°C 100

10K

0.0001 35

25 15

5 90

T_J = 125°C

1 10 1 3 5

100

100 1

0.001 100

10 1K

9

TYPICAL CHARACTERISTICS

Figure 13. Thermal Characteristics PULSE TIME (sec)

0.01

0.001 1

0.0001 0.1

0.00001 10

0.000001 0.01

0.1 1 10 100

RqJA(t) (°C/W)

100 1000

Single Pulse 50% Duty Cycle

20%

10%

5%

2%

1%

DEVICE ORDERING INFORMATION

Device Case Marking Package Shipping^†

NVMFS5C406NLT1G 506EZ 5C406L DFN5

(Pb−Free) 1500 / Tape & Reel

NVMFS5C406NLWFT1G 507BA 406LWF DFNW5

(Pb−Free, Wettable Flanks) 1500 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

ISSUE A

DATE 25 AUG 2021 SCALE 2:1

XXXXXX = Specific Device Code A = Assembly Location

Y = Year

W = Work Week

ZZ = Lot Traceability GENERIC MARKING DIAGRAM*

1

XXXXXX AYWZZ 1

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking.

q

q

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

98AON24855H DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 DFN5 5x6, 1.27P (SO−8FL)

DFNW5 5x6 (FULL−CUT SO8FL WF) CASE 507BA

ISSUE A

DATE 03 FEB 2021

XXXXXX = Specific Device Code A = Assembly Location

Y = Year

W = Work Week

ZZ = Lot Traceability GENERIC MARKING DIAGRAM*

XXXXXX AYWZZ 1

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking.

q q

98AON26450H DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 DFNW5 5x6 (FULL−CUT SO8FL WF)

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