MOSFET - Power, Single N-Channel

MOSFET - Power, Single N-Channel

100 V, 65 m W , 13 A

NVTFS070N10MCL

Features

• Small Footprint (3.3 x 3.3 mm) for Compact Design

• ^{Low R}

to Minimize Conduction Losses

• Low Capacitance to Minimize Driver Losses

• NVTFWS070N10MCL − Wettable Flanks Product

• AEC−Q101 Qualified and PPAP Capable

• These Devices are Pb−Free and are RoHS Compliant

Parameter Symbol Value Unit

Drain−to−Source Voltage VDSS 100 V

Gate−to−Source Voltage VGS ±20 V

Continuous Drain Current R_qJC

(Notes 1, 2, 3) Steady State

TC = 25°C I_D 13 A

T_C = 100°C 9.0

Power Dissipation

R_qJC (Notes 1, 2) TC = 25°C P_D 25 W

TC = 100°C 12

Continuous Drain Current R_qJA

(Notes 1, 2, 3) Steady State

TA = 25°C I_D 4.5 A

T_A = 100°C 3.2

Power Dissipation

R_qJA (Notes 1, 2) TA = 25°C P_D 2.9 W

TA = 100°C 1.5

Pulsed Drain Current T_C = 25°C, tp = 10 ms IDM 47 A Operating Junction and Storage Temperature

Range TJ, Tstg −55 to

+175 °C

Single Pulse Drain−to−Source Avalanche

Energy (I_L(pk) = 0.5 A) E_AS 423 mJ

Lead Temperature for Soldering Purposes

(1/8″ from case for 10 s) TL 260 °C

Source Current (Body Diode) I_S 19 A

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)

Parameter Symbol Value Unit

Junction−to−Case − Steady State (Note 2) R_qJC 6.0 °C/W Junction−to−Ambient − Steady State (Note 2) R_qJA 51

1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted.

2. Surface−mounted on FR4 board using a 650 mm², 2 oz. Cu pad.

V_(BR)DSS R_DS(on) MAX I_D MAX 100 V 65 mW @ 10 V

13 A 90 mW @ 4.5 V

N−Channel D (5 − 8)

S (1, 2, 3) G (4)

See detailed ordering, marking and shipping information on page 5 of this data sheet.

ORDERING INFORMATION WDFN8

(m8FL) CASE 511AB

MARKING DIAGRAM XXXXX AYWWG

G

1 1

XXXXX = Specific Device Code A = Assembly Location

Y = Year

WW = Work Week G = Pb−Free Package WDFNW8

(u8FL WF) CASE 515AN

XXXX AYWWG

G

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 100 V

Drain−to−Source Breakdown Voltage

Temperature Coefficient V(BR)DSS/

T_J 67 mV/°C

Zero Gate Voltage Drain Current I_DSS V_GS = 0 V,

V_DS = 100 V T_J = 25°C 1.0

T_J = 125°C 100 mA

Gate−to−Source Leakage Current I_GSS V_DS = 0 V, V_GS = 20 V 100 nA

ON CHARACTERISTICS (Note 4)

Gate Threshold Voltage V_GS(TH) V_GS = V_DS, I_D = 15 mA 1.0 3.0 V

Threshold Temperature Coefficient V_GS(TH)/T_J −5.2 mV/°C

Drain−to−Source On Resistance R_DS(on) V_GS = 10 V I_D = 3 A 54 65

V_GS = 4.5 V I_D = 2 A 72 90 mW

Forward Transconductance g_FS V_DS = 10 V, I_D = 3 A 11 S

CHARGES, CAPACITANCES & GATE RESISTANCE

Input Capacitance C_ISS

VGS = 0 V, f = 1 MHz, VDS = 50 V

305

Output Capacitance C_OSS 135 pF

Reverse Transfer Capacitance C_RSS 1.9

Total Gate Charge Q_G(TOT) V_GS = 4.5 V, V_DS = 50 V; I_D = 2 A 2.7 V_GS = 10 V, V_DS = 50 V; I_D = 3 A 5.5 nC

Threshold Gate Charge Q_G(TH)

V_GS = 10 V, V_DS = 50 V; I_D = 3 A

0.6

Gate−to−Source Charge Q_GS 1.0 nC

Gate−to−Drain Charge QGD 0.6

Plateau Voltage VGP 2.6 V

SWITCHING CHARACTERISTICS (Note 5)

Turn−On Delay Time td(ON)

V_GS = 10 V, V_DS = 50 V, ID = 3 A, RG = 6 W

5.1

Rise Time tr 1.3 ns

Turn−Off Delay Time td(OFF) 12.1

Fall Time tf 2.8

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage VSD V_GS = 0 V, I_S = 3 A, T_J = 25°C 0.84 1.3 V

VGS = 0 V, IS = 3 A, TJ = 125°C 0.72

Reverse Recovery Time t_RR

VGS = 0 V, di/dt = 100 A/ms, I_S = 1 A

19 ns

Reverse Recovery Charge Q_RR 8 nC

Charge Time t_S 9

Discharge Time t_D 10

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

5. Switching characteristics are independent of operating junction temperatures.

TYPICAL CHARACTERISTICS

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics V_DS, DRAIN−TO−SOURCE VOLTAGE (V) V_GS, GATE−TO−SOURCE VOLTAGE (V)

Figure 3. On−Resistance vs. Gate−to−Source

Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage

V_GS, GATE−TO−SOURCE VOLTAGE (V) I_D, DRAIN CURRENT (A)

Figure 5. On−Resistance Variation with

Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage

T_J, JUNCTION TEMPERATURE (°C) V_DS, DRAIN−TO−SOURCE VOLTAGE (V)

ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)

RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE IDSS, LEAKAGE (nA)

V_DS = 10 V

T_J = 125°C TJ = 25°C

TJ = −55°C

T_J = 25°C

ID = 3 A TJ = 25°C

V_GS = 10 V

V_GS = 10 V I_D = 3 A

T_J = 125°C

T_J = 85°C TJ = 150°C V_GS =

3.2 V to10 V

TJ = 175°C

TJ = 25°C 2.6 V

2.4 V 3.2 V

3.0 V

2.2 V 2.8 V

0 1 2 3 4 5

0 2 4 6 8 10 12 14

0 2 4 6 8 10 12 14

0 1 2 3 4 5

0 20 40 60 80 100 120 140 160 180 200

1 2 3 4 5 6 7 8 9 10 20

30 40 50 60 70 80 90 100

1 2 3 4 5

V_GS = 4.5 V

0.5 1 1.5 2 2.5

−50 −25 0 25 50 75 100 125 150 1750.00001 0.0001 0.001 0.01 0.1 1 10

10 20 30 40 50 60 70 80 90 100

Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Total Charge

V_DS, DRAIN−TO−SOURCE VOLTAGE (V) Q_G, TOTAL GATE CHARGE (nC)

Figure 9. Resistive Switching Time Variation

vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current

R_G, GATE RESISTANCE (W) V_SD, SOURCE−TO−DRAIN VOLTAGE (V)

Figure 11. Maximum Rated Forward Biased

Safe Operating Area Figure 12. I_PEAK vs. Time in Avalanche

V_DS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s)

C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V)

t, TIME (ns) IS, SOURCE CURRENT (A)

ID, DRAIN CURRENT(A) IPEAK (A)

V_GS = 0 V T_J = 25°C f = 1 MHz

C_ISS COSS

CRSS

V_DS = 50 V T_J = 25°C I_D = 3 A QGS Q_GD

V_GS = 10 V V_DS = 50 V I_D = 3 A

t_d(off) t_d(on)

t_f t_r

T_J = 125°C

TJ = −55°C

T_J(initial) = 100°C

T_J(initial) = 25°C

RDS(on) Limit Thermal Limit Package Limit

10 ms

0.5 ms 1 ms

10 ms V_GS ≤ 10 V

Single Pulse T_C = 25°C

T_J = 175°C V_GS = 0 V

1 10 100

0 10 20 30 40 50 60 70 80 90 100 0

1 2 3 4 5 6 7 8 9

0 1 2 3 4 5 6

1 10 100

1 10 100 1

10

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 T_J = 85°C

TJ = 25°C

0.1 1 10 100 1000

0.1 1 10 100 1000 0.1

1 10 100

0.00001 0.0001 0.001 0.0

TYPICAL CHARACTERISTICS

Figure 13. Thermal Characteristics PULSE TIME (sec)

1000 10

0.1 0.0001

0.000001 0.01

0.1

R(t) (°C/W)

10 100

100 1

0.01

0.00001 0.001

1

Single Pulse Duty Cycle = 0.5 0.2

0.050.1 0.02 0.01

DEVICE ORDERING INFORMATION

Device Marking Package Shipping^†

NVTFS070N10MCLTAG 70L1 WDFN8

(Pb−Free) 1500 / Tape & Reel

NVTFWS070N10MCLTAG 70W1 WDFN8

(Pb−Free, Wettable Flanks) 1500 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

M 1.40 1.50 q 0 _ −−− ^1.6012 _ ISSUE D

DATE 23 APR 2012 SCALE 2:1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.

1 2 3 4 5 6

TOP VIEW

SIDE VIEW

BOTTOM VIEW D1

E1 q

D

E A B

0.20 C

0.20 C

2X

2X

DIM MIN NOM MILLIMETERS A 0.70 0.75 A1 0.00 −−−

b 0.23 0.30 c 0.15 0.20 D1D 2.95 3.05 D2 1.98 2.11

E

E1 2.95 3.05 E2 1.47 1.60

e 0.65 BSC

G 0.30 0.41 K 0.65 0.80 L 0.30 0.43 L1 0.06 0.13

A 0.10 C

0.10 C

DETAIL A

1 4

8 L1

e/2

8X

G D2 E2

K b

A 0.10 C B 0.05 C

L

DETAIL A

A1

6Xe c

4X

C

SEATING PLANE 1

5

MAX0.80 0.05 0.40 0.25 3.15 2.24 3.15 1.73

0.51 0.95 0.56 0.20

M

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

0.65 0.42

0.75 2.30

3.46

PACKAGE 8X

0.055 0.059 0 _ −−− ^0.06312 _

0.028 0.030

0.000 −−−

0.009 0.012 0.006 0.008 0.116 0.120 0.078 0.083 0.116 0.120 0.058 0.063 0.026 BSC 0.012 0.016 0.026 0.032 0.012 0.017 0.002 0.005

0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068

0.020 0.037 0.022 0.008 MIN NOM

INCHES 7 MAX

8

PITCH

3.60 0.57

0.47

OUTLINE

DIMENSION: MILLIMETERS 3.30 BSC

3.30 BSC

0.130 BSC

0.130 BSC

2.37

0.66^4X

GENERIC MARKING DIAGRAM*

XXXXX = Specific Device Code A = Assembly Location

Y = Year

WW = Work Week G = Pb−Free Package

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “ G”, may or may not be present.

XXXXX AYWWG

G 1

E3 0.23 0.30 0.40 0.009 0.012 0.016

E3

4X

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

98AON30561E DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 WDFN8 3.3X3.3, 0.65P

WDFNW8 3.3x3.3, 0.65P (Full−Cut m8FL WF) CASE 515AN

ISSUE O

DATE 25 AUG 2020

XXXX = Specific Device Code A = Assembly Location Y = Year

WW = Work Week G = Pb−Free Package

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking.

GENERIC MARKING DIAGRAM*

XXXX AYWWG

G (Note: Microdot may be in either location) 98AON24556H

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 WDFNW8 3.3x3.3, 0.65P (Full−Cut m8FL WF)

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