第 4 章 集合演算プロセッサ 41
5.5 最後に
この論文では3種類のメモリ一体型プロセッサの概要を示した．これらのプロセッサはCPUや GPUの苦手な処理を，出来るだけ広範囲にカバーする事を目的としている．従って，それぞれの プロセッサは同じ「情報を検出」する処理であってもその役割は全く異なる．今後ポストムーア社 会，データが飛躍的に増え続ける社会を迎えるにあたり，必要な情報を効率よく探し出す技術は 益々重要になる．これまでのCPUやGPU一辺倒の分散型情報処理から，メモリ一体型プロセッ サやその他の情報処理効率の良いプロセッサを利用した分業型情報処理が，今後の情報処理の主 流になるものと考える．
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研究業績
学術論文
(1) Katsumi Inoue, and Cong-Kha Pham, “The Memorism Processor: Towards a Memory-Based Artificially Intelligence Complementing the von Neumann Architecture,” SICE Journal of Control, Measurement, and System Integration, vol.10, no.6, pp.544-550, Nov. 2017.
(2) Katsumi Inoue, Trong-Thuc Hoang, and Cong-Kha Pham,“Frequent Items Counter Based on Binary Decoders,” IEICE Electronics Express, vol. no.20, pp.1-12, Oct. 2018.
(3) Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, and Cong-Kha Pham, “An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Cre-ation,” IEEE Access. vol. 6, pp. 16046-16059, Mar. 2018.
(4) Xuan-Thuan Nguyen,Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, and Cong-Kha Pham, “An Efficient I/O Architecture for RAM-Based Content-Addressable Memory on FPGA,” IEEE Transactions on Circuits and Systems II: Express Briefs vol. 66, no. 3, 2019.
国際学会発表
(1) Takahiro Hosaka, Trong-Thuc Hoang, Van-Phuc Hoang, Duc-Hung Le, Katsumi Inoue, and Cong-Kha Pham, “Live Demonstration: Real-Time Auto-Exposure Histogram Equalization Video-System using Frequent Items Counter,” in Proceedings of 2019 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-2, May. 2019.
(2) Xuan-Thuan Nguyen, Trong-Thuc Hoang, Katsumi Inoue, Ngoc-Tu Bui, Van-Phuc Hoang, and Cong-Kha Pham, “A 1.2-V 90-MHz Bitmap Index Creation Accelerator with 0.27-nW Standby Power on 65-nm Silicon-On-Thin-Box (SOTB) CMOS,” in Proceedings of 2019 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-5, May. 2019.
(3) Katsumi Inoue, Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, and Cong-Kha Pham, “VLSI Design of Frequent Items Counting Using Binary Decoders Applied to 8-bit per Item Case-study,” in Proceedings of 2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME). pp. 161-165, 2018.
(4) Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, and Cong-Kha Pham, “A 219µW 1D-to-2D-Based Priority Encoder on 65-nm SOTB CMOS,” in Pro-ceedings of 2018 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-5, 2018.
(5) Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, Nhu-Quynh Truong, Duc-Hung Le, Katsumi Inoue, and Cong-Kha Pham, “FPGA-based frequent items counting using matrix of equality comparators,” in Proceedings of 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 285-289, 2017.
(6) Xuan-Thuan Nguyen, Hong-Thu Nguyen, Katsumi Inoue, Osamu Shimojo, and Cong-Kha Pham, “Highly parallel bitmap-based regular expression matching for text analytics,” in Proceedings of 2017 IEEE International Symposium on Circuits and Systems (ISCAS), pp.
2667-2671, 2017.
(7) Xuan-Thuan Nguyen, Hong-Thu Nguyen, Trong-Thuc Hoang, Katsumi Inoue, Osamu Shi-mojo, Toshio Murayama, Kenji Tominaga, and Cong-Kha Pham,“An efficient FPGA-based database processor for fast database analytics,” in Proceedings of 2016 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-5, 2016.
(8) Duc-Hung Le, Katsumi Inoue, and Cong-Kha Pham,“Design of a parallel CAM-based multi-match search system using 0.18-μm CMOS process,” in Proceedings of 2014 IEEE Fifth International Conference on Communications and Electronics (ICCE), pp. 336-340, 2014.
(9) Duc-Hung Le, Tran-Bao-Thuong Cao, Katsumi Inoue, and Cong-Kha Pham, “A CAM-based Information Detection Hardware System for fast exact pattern matching,” in Proceedings of 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 848-852, 2013.
(10) Duc-Hung Le, Katsumi Inoue, and Cong-Kha Pham,“Design a fast CAM-based information detection system on FPGA and 0.18μm ASIC technology,” in Proceedings of 2013 IEEE International Conference of Electron Devices and Solid-state Circuits Conference Paper, pp.
1-4, 2013.
(11) Duc-Hung Le, Tran-Bao-Thuong Cao, Katsumi Inoue, and Cong-Kha Pham,“A fast CAM-based Watermarking extraction on FPGA,” in Proceedingsof 2013 International Conference on IC Design & Technology (ICICDT), pp. 203-207, 2013.
(12) Duc-Hung Le, Tran Bao Thuong Cao,Katsumi Inoue, and Cong-Kha Pham,“A fast CAM-based image matching system on FPGA,” in Proceedings of 2013 IEEE International Sym-posium on Circuits and Systems (ISCAS2013), pp.1797-1801, 2013.
(13) Duc-Hung Le, Masahiro Sowa, Katsumi Inoue, and Cong-Kha Pham,“A fully-parallel infor-mation detection hardware system employing Content Addressable Memory,” in Proceedings 2012 Fourth International Conference on Communications and Electronics (ICCE), pp. 447-452, 2012.
(14) Duc-Hung Le, Katsumi Inoue, and Cong-Kha Pham,“A novel CAM-based Information De-tection Hardware System on FPGA,” in Proceedings PRIME 2012 8th Conference on Ph.D.
Research in Microelectronics & Electronics, pp. 1-4, 2012.
国内研究会発表
(1) 井上 克己,範 公可,“メモリズムプロセッサによる人工知能の課題解決,”電子情報通信学会技 術研究報告，信学技報118(10), pp. 17-22, 2018年4月19日.
(2) 井上 克己,小高 雅則, 範 公可,“ノイマン型コンピュータの弱点を補完するメモリ型プロセッ サ,”自動計測制御学会 SSI2016, 2016年12月7日.
(3) 井上 克己, Nguyen Xuan-Thuan, 範 公可,“ビッグデータの検索や解析に最適なデータベース プロセッサ(DBP),” 電子情報通信学会ソサイエティ大会講演論文集2015年 エレクトロニク ス(2), 2015年8月25日.
(4) 井上 克己, 範 公可,“超高速なデータ検索を実現するデータベースプロセッサー(DBP),” 電 子情報通信学会技術研究報告, 信学技報 114(13), pp. 91-96, 2014年4月17日.
(5) 井上 克己,レ ドゥクフン, 曽和 将容, 範公可,”集合演算プロセッサー(SOP),“電子情報通信 学会技術研究報告,信学技報 113(236), pp. 35-40, 2013年10月7日.
特許
(1) 井上 克己，“情報検索機能を備えたメモリ，その利用方法，装置，情報処理方法,”中国特許, 2019年8月18日．
(2) 井上 克己，“情報マッチング装置及びその方法,”日本国特許，第6516775号，2019年4月 26日．
(3) 井上 克己，“データ比較演算プロセッサ及びそれを用いた演算方法,”日本国特許, 第6393852 号, 2018年8月31日．
(4) 井上 克己，“情報検索機能を備えたメモリ，その利用方法，装置，情報処理方法,”日本国特 許, 第6229024号, 2017年10月20日．
(5) 井上 克己，“情報絞り込み検出機能を備えたメモリ，このメモリを用いた情報検出方法,”イ スラエル国特許,番号221454, 2017年7月31日．
(6) 井上 克己，“情報絞り込み検出機能を備えたメモリ，このメモリを用いた情報検出方法,”カ ナダ国特許, 第2790009号, 2017年1月17日．
(7) 井上 克己，“情報検索機能を備えたメモリ，その利用方法，装置，情報処理方法,”米国特許, US9627065B2, 2017年4月18日．
(8) 井上 克己，“集合演算機能を備えたメモリ及びこれを用いた集合演算処理方法,”日本国特許, 第6014120号, 2016年9月30日．
(9) 井上 克己，“情報絞り込み検出機能を備えたメモリ,このメモリを用いた情報検出方法,”日本 国特許, 第5992073号, 2016年8月26日．
(10) 井上 克己，“情報検索機能を備えたメモリ，その利用方法，装置，情報処理方法,”日本国特 許, 第5981666号, 2016年8月5日．
(11) 井上 克己，“情報絞り込み検出機能を備えたメモリ，このメモリを用いた情報検出方法,”米 国特許, US9275734B2, 2016年3月1日．
(12) 井上 克己，“情報絞り込み検出機能を備えたメモリ，このメモリを用いた情報検出方法,”日 本国特許,第5763616号, 2015年6月19日．
(13) 井上 克己，“情報絞り込み検出機能を備えたメモリ，その使用方法,このメモリを含む装置,”
台湾国特許, 発明第1, 446192号, 2014年7月20日．
(14) 井上 克己，“情報絞り込み検出機能を備えたメモリ，その使用方法,このメモリを含む装置,”
日本国特許, 第4588114号, 2010年9月17日．