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第 7 章 結論

7.2 今後の課題

今後取り組むべき課題として,次の4点が挙げられる.

≤初期視差計算が不要なステレオマッチング回路の実現

 提案した2種類のステレオマッチング回路は,いずれも回路での処理とは別に初期視差を 算出するフェーズを設けており,かつ回路での処理と同等の時間をその処理に要している.更 なる高速化やハードウェア化の容易さを考慮すると,今後は回路の処理だけでステレオマッ チングを実現する必要がある.

≤ハードウェア指向のCENの提案

 ハードウェア化を考慮した自動構築法の検討として,回路規模の縮小と高速化,メモリの 削減,パイプライン処理の3点を実現するための制約条件について述べた.これらの他,今 後はゲート遅延や消費電力等の制約条件を評価関数に取り入れ,よりハードウェア化向きの 回路の自動構築法を提案する.

≤FPGAボード上への実装と検証

 超解像処理回路のハードウェア化として,Verilog-HDLを用いて自動構築した超解像処理 回路の設計とシミュレーションまでを行った.今後は設計した回路をFPGAボード上に実装 して動作させ,シミュレーション結果との比較,検討を行う必要がある.

≤HDL自動生成による,回路自動構築からハードウェア化までの自動化

 現状は最適化された回路構造を人手によってHDLで記述している.今後,回路構造をHDL として生成させることによって回路構築からハードウェア化までを自動化することができる.

謝辞

博士課程後期進学の後押しをして頂き,本研究を進めるにあたり終始多大なるご指導ご助言,豊 かな研究環境を賜りました長尾智晴先生に深く感謝致します.また,本論文をまとめるにあたり貴 重なご指導,ご助言を頂きました田村直良先生,森辰則先生,岡嶋克典先生,富井尚志先生に感謝 致します.

そして,博士号取得を志すきっかけを頂きました國分泰雄先生,貴重なご意見を頂きました長尾 研究室の皆様と先に卒業された先輩や同期の皆様,博士課程後期進学を許可して頂きました人事本 部の皆様,博士号取得を応援して下さったSPT42の皆様に感謝の意を表します.

最後に,家族や友人をはじめ,温かく見守ってくれた方々に感謝します.ありがとうございま した.

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