Dimmable Power Factor Corrected LED Driver NCL30486

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Corrected LED Driver NCL30486

The NCL30486 is a power factor corrected flyback controller targeting isolated constant current LED drivers. The controller operates in a quasi−resonant mode to provide high efficiency. Thanks to a novel control method, the device is able to tightly regulate a constant LED current from the primary side. This removes the need for secondary side feedback circuitry, its biasing and for an optocoupler.

The device is highly integrated with a minimum number of external components. A robust suite of safety protection is built in to simplify the design. This device is specifically intended for very compact space efficient designs and supports analog and digital dimming with two dedicated dimming inputs control ideal for Smart LED Lighting applications.

Features

•

High Voltage Startup

•

Quasi−resonant Peak Current−mode Control Operation

•

Primary Side Feedback

•

CC / CV Accurate Control Vin up to 320 V rms

•

Tight LED Constant Current Regulation of ±2% Typical

•

Digital Power Factor Correction

•

Analog and Digital Dimming

•

Cycle by Cycle Peak Current Limit

•

Wide Operating V_CC Range

•

−40 to + 125°C

•

Robust Protection Features

♦ Brown−Out

♦ OVP on VCC

♦ Constant Voltage / LED Open Circuit Protection

♦ Winding Short Circuit Protection

♦ Secondary Diode Short Protection

♦ Output Short Circuit Protection

♦ Thermal Shutdown

♦ Line over Voltage Protection

•

This is a Pb−Free Device Typical Applications

•

Integral LED Bulbs

•

LED Power Driver Supplies

•

LED Light Engines

SOIC−9 CASE 751BP

See detailed ordering and shipping information on page 27 of this data sheet.

ORDERING INFORMATION MARKING

DIAGRAM www.onsemi.com

1 9

L30486 = Specific Device Code XX = Version

A = Assembly Location

L = Wafer Lot

YW = Assembly Start Week G = Pb−Free Package

L30486XX ALYWX

G 1

9

1

2

3

4

5

8

6 7 10

ZCD COMP

CS

GND DRV

VCC HV

PDIM ADIM

PIN CONNECTIONS

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. .

Aux.

NCL30486

1 2 3 4 5

8

6 7 10

VADIM

PWM signal

Figure 1. Typical Application Schematic for NCL30486

9

PIN FUNCTION DESCRIPTION NCL30486

Pin N5 Pin Name Function Pin Description

1 ADIM Analog dimming This pin is used for analog control of the output current. Applying a voltage varying between VDIM(EN) and VDIM100 will dim the output current from 0% to 100%.

2 COMP OTA output for CV loop This pin receives a compensation network to stabilize the constant voltage loop 3 ZCD Zero crossing Detection

V_aux sensing This pin connects to the auxiliary winding and is used to detect the core reset event.

This pin also senses the auxiliary winding voltage for accurate output voltage control 4 CS Current sense This pin monitors the primary peak current.

5 GND − The controller ground

6 DRV Driver output The driver’s output to an external MOSFET

7 VCC Supplies the controller This pin is connected to an external auxiliary voltage.

8 PDIM PWM dimming This pin is used for PWM dimming control. An optocoupler can be connected directly to the pin if the PWM control signal is from the secondary side

9 NC creepage

10 HV High Voltage sensing This pin connects after the diode bridge to provide the startup current and internal high voltage sensing function.

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INTERNAL CIRCUIT ARCHITECTURE

Figure 2. Internal Circuit Architecture NCL30486

Leading Edge Blanking

Power factor and Constant−current control Zero crossing detection Logic

(ZCD blanking, Time−Out,…) Aux . Winding Short Circuit Prot . Constant Voltage

Control

Valley Selection Frequency foldback VCV

VREFXVHVdiv

Max. Peak Current Limit COMP

CS

CS Short Protection Winding / Output diode

SCP

Maximum on−time

Driver and Clamp Line DRV

feed−forward

Q_drv VHVdiv

Aux_SCP Slow_OVP

Fast_OVP

Slow_OVP

Ipk_max

STOP

WOD_SCP

CS_short

Brown−Out HV Line OVP

VHVdiv

BO_NOK

VHVdiv

STOP

VCC Management Fault

Management

Thermal Shutdown

VCC

VCC OVP UVLO

OFF

VCC_OVP Fast_OVP

Aux_SCP

STOP

CS_short

GND

Q_drv S

R Q Q VDIMA dc_DIM

HV Startup

Analog ADIM Dimming

PWM PDIM Dimming dc_DIM

VDIMA

Standby

Enable Enable

ZCD

Standby

CS_reset VREFX

Enable

L_OVP L_OVP

dimCV_mode

dimCV_mode dimCV_mode

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MAXIMUM RATINGS TABLE

Symbol Rating Value Unit

VCC(MAX)

I_CC(MAX) Maximum Power Supply voltage, VCC pin, continuous voltage

Maximum current for VCC pin −0.3 to 30

Internally limited V mA V_DRV(MAX)

I_DRV(MAX) Maximum driver pin voltage, DRV pin, continuous voltage

Maximum current for DRV pin −0.3, V_DRV (Note 1)

−300, +500 V mA V_HV(MAX)

IHV(MAX)

Maximum voltage on HV pin

Maximum current for HV pin (dc current self−limited if operated within the allowed range) −0.3, +700

±20 V

mA V_MAX

I_MAX Maximum voltage on low power pins (except pins DRV and VCC)

Current range for low power pins (except pins DRV and VCC) −0.3, 5.5 (Note 2)

−2, +5 V

mA

R_θJ−A Thermal Resistance Junction−to−Air 210 °C/W

T_J(MAX) Maximum Junction Temperature 150 °C

Operating Temperature Range −40 to +125 °C

Storage Temperature Range −60 to +150 °C

ESD Capability, HBM model except HV pin (Note 3) 4 kV

ESD Capability, HBM model HV pin 1.5 kV

ESD Capability, CDM model (Note 3) 1 kV

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. VDRV is the DRV clamp voltage VDRV(high) when VCC is higher than VDRV(high). VDRV is VCC otherwise.

2. This level is low enough to guarantee not to exceed the internal ESD diode and 5.5 V ZENER diode. More positive and negative voltages can be applied if the pin current stays within the −2 mA / 5 mA range.

3. This device series contains ESD protection and exceeds the following tests: Human Body Model 4000 V per Mil−Std−883, Method 3015.

Charged Device Model 1000 V per JEDEC Standard JESD22−C101D.

4. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.

ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T_J = 25°C, VCC = 12 V, V_ZCD = 0 V, V_CS = 0 V) For min/max values T_J = −40°C to +125°C, Max T_J = 150°C, V_CC = 12 V)

Parameter Test Condition Symbol Min Typ Max Unit

HIGH VOLTAGE SECTION

High voltage current source V_CC = V_CC(on) – 200 mV I_HV(start2) 3.9 5.1 6.2 mA

High voltage current source V_CC = 0 V I_HV(start1) − 300 − mA

V_CC level for I_HV(start1) to I_HV(start2) transition V_CC(TH) − 0.8 − V

Minimum startup voltage VCC = 0 V VHV(MIN) − 17 − V

HV source leakage current V_HV = 450 V I_HV(leak) − 4.5 10 mA

Maximum input voltage (rms) for correct operation of

the PFC loop VHV(OL) 320 − − V rms

SUPPLY SECTION Supply Voltage Startup Threshold

Minimum Operating Voltage Hysteresis V_CC(on) – V_CC(off) Internal logic reset

VCC increasing V_CC decreasing V_CC decreasing

VCC(on)

V_CC(off) V_CC(HYS) VCC(reset)

9.316 7.64

10.218

−5

10.720

−6 V

Over Voltage Protection

VCC OVP threshold V_CC(OVP) 25 26.5 28 V

V_CC(off) noise filter (Note 5)

V_CC(reset)noise filter (Note 5) t_VCC(off)

t_VCC(reset) −

− 5

20 −

− ms

Supply Current Device Disabled/Fault

Device Enabled/No output load on pin 5 Device Switching (F_sw = 65 kHz) Device switching (F_sw = 700 Hz)

V_CC > V_CC(off) Fsw = 65 kHz

C_DRV = 470 pF, F_sw = 65 kHz V_COMPv 0.9 V

I_CC1 ICC2

I_CC3 I_CC4

1.2–

−−

1.353.0 3.51.7

1.63.5 1.884.0

mA

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ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values TJ = 25°C, VCC = 12 V, VZCD = 0 V, VCS = 0 V) For min/max values T_J = −40°C to +125°C, Max TJ = 150°C, VCC = 12 V) (continued)

CURRENT SENSE

Maximum Internal current limit VILIM 1.33 1.40 1.47 V

Leading Edge Blanking Duration for V_ILIM t_LEB 283 345 407 ns

Propagation delay from current detection to gate

off−state tILIM − 100 150 ns

Maximum on−time (option 1) ton(MAX) 29 39 49 ms

Maximum on−time (option 2) t_on(MAX) 16 20 24 ms

Threshold for immediate fault protection activation

(140% of V_ILIM) V_CS(stop) 1.9 2.0 2.1 V

Leading Edge Blanking Duration for V_CS(stop) t_BCS − 170 − ns

Current source for CS to GND short detection I_CS(short) 400 500 600 mA

Current sense threshold for CS to GND short

detection V_CS rising V_CS(low) 20 60 90 mV

GATE DRIVE Drive Resistance DRV Sink

DRV Source R_SNK

R_SRC −

− 13

30 −

− W Drive current capability

DRV Sink (Note GBD)

DRV Source (Note GBD) ISNK

I_SRC −

− 500

300 −

− mA

Rise Time (10% to 90%) C_DRV= 470 pF t_r – 30 − ns

Fall Time (90 %to 10%) C_DRV= 470 pF t_f – 20 − ns

DRV Low Voltage VCC = VCC(off)+0.2 V

C_DRV= 470 pF, R_DRV= 33 kW VDRV(low) 8 – − V

DRV High Voltage VCC = VCC(MAX)

C_DRV= 470 pF, R_DRV= 33 kW VDRV(high) 10 12 14 V ZERO VOLTAGE DETECTION CIRCUIT

Upper ZCD threshold voltage V_ZCD rising VZCD(rising) − 90 150 mV

Lower ZCD threshold voltage VZCD falling VZCD(falling) 35 55 − mV

Threshold to force V_REFX maximum during startup V_ZCD(start) − 0.7 − V

ZCD hysteresis VZCD(HYS) 15 − − mV

Propagation Delay from valley detection to DRV high

(no t_LEB4) V_ZCD decreasing t_ZCD(DEM) − − 150 ns

Additional delay from valley lockout output to DRV

latch set (prog option) t_LEB4 125 250 375 ns

Equivalent time constant for ZCD input (GBD) t_PAR − 20 − ns

Blanking delay after on−time (option 1) VREFX > 0.35 V tZCD(blank1) 1.1 1.5 1.9 ms Blanking delay after on−time (option 2) V_REFX > 0.35 V tZCD(blank1) 0.75 1.0 1.25 ms Blanking Delay at light load (option 1) V_REFX < 0.25 V tZCD(blank2) 0.6 0.8 1.0 ms Blanking Delay at light load (option 2) V_REFX < 0.25 V tZCD(blank2) 0.45 0.6 0.75 ms

Timeout after last DEMAG transition t_TIMO 5 6.5 8 ms

Pulling−down resistor VZCD = VZCD(falling) RZCD(pd) − 200 − kW

ZCD pin current source for forcing CV mode when

minimum dimming V_ADIM = 0.5 V I_ZCDdim 145 170 195 mA

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CONSTANT CURRENT CONTROL

Reference Voltage Tj = 25°C − 85°C VREF/3 327.9 334.2 341.2 mV

Reference Voltage T_j = −40°C to 125°C V_REF/3 324 334.2 346 mV

10% Reference Voltage T_j = 25°C − 85°C V_REF10/3 30 33.33 36.66 mV

10% Reference Voltage T_j = −40°C to 125°C V_REF10/3 27.33 33.33 39.33 mV

5% Reference Voltage T_j = 25°C − 85°C V_REF05/3 14.17 17 19.17 mV

5% Reference Voltage Tj = −40°C to 125°C VREF05/3 13.34 17 20 mV

Current sense lower threshold for detection of the

leakage inductance reset time V_CS falling V_CS(low) 20 50 100 mV

Blanking time for leakage inductance reset detection t_CS(low) − 120 − ns

POWER FACTOR CORRECTION

Clamping value for V_REF(PFC) T_J = 0°C to 125°C VREF(PFC)CLP 2.06 2.2 2.34 V

Line range detector for PFC loop V_HV increases V_HL(PFC) − 240 − Vdc

Line range detector for PFC loop V_HV decreases V_LL(PFC) − 230 − Vdc

CONSTANT VOLTAGE SECTION

Internal voltage reference for constant voltage

regulation VREF(CV) 3.41 3.52 3.63 V

CV Error amplifier Gain GEA 40 50 60 mS

Error amplifier current capability V_REFX= V_REF (no dimming) I_EA − ±60 − mA

COMP pin lower clamp voltage VCV(clampL) − 0.6 − V

COMP pin higher clamp voltage T_J = 0°C to 125°C V_CV(clampH) 4.05 4.12 4.25 V

COMP pin higher clamp voltage T_J = −40°C to 125°C V_CV(clampH) 4.01 4.12 4.25 V Internal ZCD voltage below which the CV OTA is

boosted V_REF(CV)* 85% V_boost(CV) 2.796 2.975 3.154 V

Threshold for releasing the CV boost V_REF(CV)* 90% Vboost(CV)RST 2.96 3.15 3.34 V Internal ZCD voltage below which the CV OTA is

boosted (opt.2) V_REF(CV)* 80% V_boost(CV)2 2.632 2.8 2.968 V

Error amplifier current capability during boost phase I_EAboost − ±140 − mA

ZCD OVP 1^st level (slow OVP) option 1 VREF(CV) * 115% VOVP1 3.783 4.025 4.267 V ZCD OVP 1^st level (slow OVP) option 2 V_REF(CV)* 120% V_OVP1 3.948 4.2 4.452 V ZCD voltage at which slow OVP is exit (option 1) VREF(CV) * 105% VOVP1rst − 3.675 − V ZCD voltage at which slow OVP is exit (option 2) V_REF(CV)* 110% V_OVP1rst − 3.85 − V

Switching period during slow OVP T_sw(OVP1) − 1.5 − ms

ZCD fast OVP option 2 V_ref(CV)* 130% + 150 mV V_OVP2 − 4.7 − V

ZCD fast OVP option 1 V_ref(CV)* 125% + 150 mV V_OVP2 4.253 4.525 4.797 V

Number of switching cycles before fast OVP

confirmation TOVP2_CNT − 4 −

Duration for disabling DRV pulses during ZCD fast

OVP Trecovery − 4 − s

COMP pin internal pullup resistor (prog option) R_pullup − 15 − kW

LINE FEED FORWARD

VHV to ICS(offset) conversion ratio KLFF 0.189 0.21 0.231 mA/V

Offset current maximum value V_HV > (450 V or 500 V) Ioffset(MAX) 76 95 114 mA

Line feed−forward current DRV high, VHV = 200 V IFF 35 40 45 mA

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VALLEY LOCKOUT SECTION

Threshold for line range detection VHV increasing (1^st to 2^nd valley transition for V_REFX > 80% V_REF) (prog. option: 1^st to 3^rd valley transition)

VHV increases VHL 228 240 252 V

Threshold for line range detection VHV decreasing (2^nd to 1^st valley transition for V_REFX > 80% V_REF) (prog. option: 3^rd to 1^st valley transition)

VHV decreases VLL 218 230 242 V

Blanking time for line range detection tHL(blank) 15 25 35 ms

Valley thresholds

1^st to 2^nd valley transition at LL and 2^nd to 3^rd valley HL, VREF decr. (prog. option: 3^rd to 4^th valley HL) 2^nd to 1^st valley transition at LL and 3^rd to 2^nd valley HL, V_REF incr. (prog. option: 4^th to 3^rd valley HL) 2^nd to 3^rd valley transition at LL and 3^rd to 4^th valley HL, V_REF decr. (prog. option: 4^th to 5^th valley HL) 3^rd to 2^nd valley transition at LL and 4^th to 3^rd valley HL, VREF incr. (prog. option: 5^th to 4^th valley HL) 3^rd to 4^th valley transition at LL and 4^th to 5^th valley HL, V_REF decr. (prog. option: 5^th to 6^th valley HL) 4^th to 3^th valley transition at LL and 5^th to 4^th valley HL, V_REF incr. (prog. option: 6^th to 5^th valley HL) 4^th to 5^th valley transition at LL and 5^th to 6^th valley HL, VREF decr. (prog. option: 6^th to 7^th valley HL) 5^th to 4^th valley transition at LL and 6^th to 5^th valley HL, V_REF incr. (prog. option: 7^th to 6^th valley HL)

V_REF decreases V_REF increases VREF decreases V_REF increases V_REF decreases VREF increases V_REF decreases V_REF increases

V_{VLY1−2/2−3} V_{VLY2−1/3−2} VVLY2−3/3−4

V_{VLY3−2/4−3} V_{VLY3−4/4−5} VVLY4−3/5−4

V_{VLY4−5/5−6} V_{VLY5−4/6−5}

−

0.80 0.90 0.65 0.75 0.50 0.60 0.35 0.45

−

− V

V_REF value at which the FF mode is activated V_REF decreases V_FFstart − 0.25 − V V_REF value at which the FF mode is removed V_REF increases V_FFstop − 0.35 − V FREQUENCY FOLDBACK

Added dead time VREFX = 0.25 V tFF1LL 0.8 1.0 1.2 ms

Added dead time V_REFX = 0.08 V t_FFchg − 40 − ms

Dead−time clamp ( option 1) VREFX < 3 mV tFFend1 − 675 − ms

Dead−time clamp ( option 2) V_REFX < 11.2 mV t_FFend2 − 250 − ms

DIMMING SECTION

DIM pin voltage for zero output current (OFF voltage) V_ADIM(EN) 0.475 0.5 0.525 V

ADIM pin voltage for 1% reference voltage V_ADIM(MIN) 0.668 0.7 0.732 V

Minimum dimming level (option 1) KDIM(MIN)1 − 0 − %

Minimum dimming level (option 2) K_DIM(MIN)2 − 1 − %

Minimum dimming level (option 3) KDIM(MIN)3 − 5 − %

Minimum dimming level (option 4) K_DIM(MIN)4 − 8 − %

ADIM pin voltage for maximum output current

(V_REFX = 1 V) V_ADIM100 − 3.0 3.1 V

Dimming range VADIM(range) − 2.3 − V

Clamping voltage for DIM pin V_ADIM(CLP) − 6.8 − V

Dimming pin pull−up current source IADIM(pullup)1 8 10 12 mA

Current Comparator threshold for PDIM IPDIM rising IPDIM(THR) 60 70 80 mA

Current Comparator threshold for PDIM I_PDIM falling I_PDIM(THD) 131 153 175 mA

Cascode current limit for PDIM IPDIM(LIM) − 1080 − mA

PDIM pin voltage V_PDIM − 3 − V

Maximum period of the PWM dimming signal − 6 − ms

Minimum on−time for PWM signal applied on PDIM − 8 − ms

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FAULT PROTECTION

Thermal Shutdown (Note 5) Device switching (FSW

around 65 kHz) TSHDN 130 150 170 °C

Thermal Shutdown Hysteresis TSHDN(HYS) − 20 – °C

Threshold voltage for output short circuit or aux.

winding short circuit detection V_ZCD(short) 0.6 0.65 0.7 V

Short circuit detection Timer V_ZCD < V_ZCD(short) t_OVLD 70 90 110 ms

Auto−recovery Timer t_recovery 3 4 5 s

Line OVP threshold V_HV increasing V_HV(OVP) 457 469 485 Vdc

HV pin voltage at which Line OVP is reset V_HV decreasing V_HV(OVP)RST 430 443 465 Vdc

Blanking time for line OVP reset TLOVP(blank) 15 25 35 ms

BROWN−OUT AND LINE SENSING

Brown−Out ON level (IC start pulsing) VHV increasing VHVBO(on) 101.5 108 114.5 Vdc Brown−Out ON level (IC start pulsing) option 2 V_HV increasing V_HVBO(on)2 129.7 138 146.3 Vdc

Brown−Out OFF level (IC stops pulsing) V_HV decreasing V_HVBO(off) 92 98 104 Vdc

Brown−Out OFF level (IC stops pulsing) option 2 V_HV decreasing V_HVBO(off)2 121 129 137 Vdc HV pin voltage above which the sampling of ZCD is

enabled low line V_HVdecreasing, low line V_sampENLL − 55 − V

HV pin voltage above which the sampling of ZCD is

enabled highline V_HVdecreasing, highline V_sampENHL − 105 − V

ZCD sampling enable comparator hysteresis V_HV increasing V_sampHYS − 5 − V

BO comparators delay t_BO(delay) − 30 − ms

Brown−Out blanking time t_BO(blank) 15 25 35 ms

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

5. Guaranteed by design.

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TYPICAL CHARACTERISTICS

Figure 3. I_HV(start2) vs. Temperature Figure 4. I_HV(start1) vs. Temperature

Figure 5. V_HV(OL) vs. Temperature Figure 6. V_CC(on) vs. Temperature

Figure 7. V_CC(off) vs. Temperature Figure 8. V_CC(OVP) vs. Temperature

4,5 4,6 4,7 4,8 4,9 5 5,1 5,2 5,3 5,4

−50 −25 0 25 50 75 100 125

IHV(start2) (mA)

TEMPERATURE (°C)

349 351 353 355 357 359 361

−50 −25 0 25 50 75 100 125

VHV(OL) (V rms)

284 289 294 299 304 309

−50 −25 0 25 50 75 100 125

IHV(start1) (mA)

TEMPERATURE (°C)

18,14 18,19 18,24 18,29 18,34

−50 −25 0 25 50 75 100 125

VCC(on) (V)

10,11 10,13 10,15 10,17 10,19 10,21 10,23 10,25

−50 −25 0 25 50 75 100 125

VCC(off) (V)

26,66 26,71 26,76 26,81 26,86 26,91 26,96

−50 −25 0 25 50 75 100 125

VCC(OVP) (V)

TEMPERATURE (°C) TEMPERATURE (°C)

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TYPICAL CHARACTERISTICS (continued)

Figure 9. I_CC1 vs. Temperature Figure 10. I_CC4 vs. Temperature

Figure 11. V_ILIM vs. Temperature Figure 12. V_CS(low)F vs. Temperature

Figure 13. V_CS(stop) vs. Temperature Figure 14. t_on(MAX)2 vs. Temperature

1,29 1,31 1,33 1,35 1,37 1,39 1,41

−50 −25 0 25 50 75 100 125

ICC1 (mA)

1,62 1,63 1,64 1,65 1,66 1,67 1,68 1,69 1,7

−50 −25 0 25 50 75 100 125

ICC4 (mA)

1.386 1.388 1.390 1.392 1.394 1.396 1.398 1.400 1.402 1.404

−50 −25 0 25 50 75 100 125

VILIM (V)

50 50,5 51 51,5 52 52,5 53 53,5 54

−50 −25 0 25 50 75 100 125

VCS(low)F (mV)

1,94 1,96 1,98 2 2,02 2,04 2,06

−50 −25 0 25 50 75 100 125

VCS(stop) (V)

19,84 19,89 19,94 19,99 20,04 20,09 20,14 20,19 20,24

−50 −25 0 25 50 75 100 125

ton(MAX)2 (ms)

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Figure 15. t_LEB vs. Temperature Figure 16. t_BCS vs. Temperature

Figure 17. t_ILIM vs. Temperature Figure 18. R_SNK vs. Temperature

Figure 19. R_SRC vs. Temperature Figure 20. t_r vs. Temperature

334 339 344 349 354 359

−50 −25 0 25 50 75 100 125 172

173 174 175 176 177 178 179 180

−50 −25 0 25 50 75 100 125

tBCS (ns)

50 60 70 80 90 100 110 120

−50 −25 0 25 50 75 100 125

tILIM (ns)

3,5 4,5 5,5 6,5 7,5 8,5 9,5 10,5

−50 −25 0 25 50 75 100 125

RSNK (W)

5,5 7,5 9,5 11,5 13,5 15,5

−50 −25 0 25 50 75 100 125

RSRC (W)

20 22 24 26 28 30 32 34

−50 −25 0 25 50 75 100 125

tr (ns)

tLEB (ns)

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Figure 21. t_f vs. Temperature Figure 22. VZCD(rising) vs. Temperature

Figure 23. VZCD(falling) vs. Temperature Figure 24. V_ZCD(short) vs. Temperature

Figure 25. t_ZCD(dem) vs. Temperature Figure 26. tZCD(blank1)OPN1 vs. Temperature

12,5 13,5 14,5 15,5 16,5 17,5 18,5 19,5 20,5 21,5

−50 −25 0 25 50 75 100 125

tF (ns)

79 79,5 80 80,5 81 81,5 82 82,5 83

−50 −25 0 25 50 75 100 125

VZCD(rising) (mV)

49,5 50,5 51,5 52,5 53,5 54,5

−50 −25 0 25 50 75 100 125

VZCD(falling) (mV)

0,658 0,66 0,662 0,664 0,666 0,668 0,67 0,672

−50 −25 0 25 50 75 100 125

VZCD(short) (V)

76 81 86 91 96 101 106 111 116

−50 −25 0 25 50 75 100 125

tZCD(DEM) (ns)

1,555 1,565 1,575 1,585 1,595 1,605

−50 −25 0 25 50 75 100 125

tZCD(blank1)OPN1 (ms)

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Figure 27. tZCD(blank1)OPN2 vs. Temperature Figure 28. tZCD(blank2)OPN1 vs. Temperature

Figure 29. tZCD(blank2)OPN2 vs. Temperature Figure 30. t_TIMO vs. Temperature

Figure 31. V_REF/3 vs. Temperature Figure 32. V_REF10/3 vs. Temperature

1,042 1,047 1,052 1,057 1,062 1,067 1,072

−50 −25 0 25 50 75 100 125

0,836 0,841 0,846 0,851 0,856 0,861

−50 −25 0 25 50 75 100 125

0,564 0,569 0,574 0,579 0,584

−50 −25 0 25 50 75 100 125

6,72 6,77 6,82 6,87 6,92

−50 −25 0 25 50 75 100 125

tTIMO (ms)

331,8 332,3 332,8 333,3 333,8 334,3 334,8 335,3 335,8 336,3 336,8

−50 −25 0 25 50 75 100 125

VREF/3 (mV)

32,6 33,1 33,6 34,1 34,6

−50 −25 0 25 50 75 100 125

VREF10/3 (mV)

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Figure 33. V_REF5/3 vs. Temperature Figure 34. V_REF(CV) vs. Temperature

Figure 35. V_CV(clampH) vs. Temperature Figure 36. V_OVP1 vs. Temperature

Figure 37. V_OVP2 vs. Temperature Figure 38. K_LFF vs. Temperature

16,3 16,5 16,7 16,9 17,1 17,3 17,5 17,7

−50 −25 0 25 50 75 100 125

VREF5/3 (mV)

3,475 3,485 3,495 3,505 3,515 3,525 3,535 3,545

−50 −25 0 25 50 75 100 125

VREF(CV) (V)

4,08 4,09 4,1 4,11 4,12 4,13 4,14 4,15

−50 −25 0 25 50 75 100 125

VCV(clampH) (V)

3,995 4,005 4,015 4,025 4,035 4,045 4,055 4,065 4,075

−50 −25 0 25 50 75 100 125

VOVP1 (V)

4,49 4,5 4,51 4,52 4,53 4,54

−50 −25 0 25 50 75 100 125

VOVP2 (V)

0,2005 0,2015 0,2025 0,2035 0,2045 0,2055 0,2065 0,2075 0,2085 0,2095

−50 −25 0 25 50 75 100 125

KLFF (mA/V)

(15)

Figure 39. Ioffset(MAX) vs. Temperature Figure 40. I_FF vs. Temperature

Figure 41. t_FF1LL vs. Temperature Figure 42. VREF(PFC)CLP vs. Temperature

Figure 43. V_ADIM(EN) vs. Temperature Figure 44. V_ADIM(MIN) vs. Temperature

96 97 98 99 100 101 102 103 104

−50 −25 0 25 50 75 100 125

Ioffset(MAX) (mA)

40,1 40,3 40,5 40,7 40,9 41,1 41,3 41,5 41,7

−50 −25 0 25 50 75 100 125

IFF (mA)

1,0305 1,0315 1,0325 1,0335 1,0345 1,0355 1,0365 1,0375 1,0385 1,0395

−50 −25 0 25 50 75 100 125

tFF1LL (ms)

2,168 2,173 2,178 2,183 2,188 2,193 2,198 2,203 2,208

−50 −25 0 25 50 75 100 125

VREF(PFC)CLP (V)

0,4975 0,4985 0,4995 0,5005 0,5015 0,5025 0,5035 0,5045 0,5055

−50 −25 0 25 50 75 100 125

VADIM(EN) (V)

0,694 0,696 0,698 0,7 0,702 0,704 0,706 0,708

−50 −25 0 25 50 75 100 125

VADIM(MIN) (V)