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onsemi and       and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/

or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.

— N-Channel QFET ® FRFET ® MO SFE T

FQB10N50CF

N-Channel QFET ^® FRFET ^® MOSFET

500 V, 10 A, 610 m

Features

• 10 A, 500 V, R_DS(on) = 610 mΩ (Max.) @ V_GS = 10 V, I_D = 5 A

• Low gate charge ( Typ. 45 nC)

• Low Crss ( Typ. 17.5 pF)

• 100% avalanche tested

• Fast recovery body diode

Description

This N-Channel enhancement mode power MOSFET is pro- duced using ON Semiconductor’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, active power factor correction (PFC), and elec- tronic lamp ballasts.

MOSFET Maximum Ratings

Thermal Characteristics

Symbol Parameter FQB10N50CFTM-WS Unit

V_DSS Drain to Source Voltage 500 V

V_GSS Gate to Source Voltage ±30 V

I_D Drain Current - Continuous (T_C = 25^oC) - Continuous (T_C = 100^oC)

10 A

6.35

I_DM Drain Current - Pulsed (Note 1) 40 A

E_AS Single Pulsed Avalanche Energy (Note 2) 825 mJ

I_AR Avalanche Current (Note 1) 10 A

E_AR Repetitive Avalanche Energy (Note 1) 14.3 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) 2.0 V/ns

P_D Power Dissipation (T_C = 25^oC) 143 W

- Derate above 25^oC 1.14 W/^oC

T_J, T_STG Operating and Storage Temperature Range -55 to +150 ^oC

T_L Maximum Lead Temperature for Soldering Purpose,

1/8” from Case for 5 Seconds 300 ^oC

Symbol Parameter FQB10N50CFTM-WS Unit

R_JC Thermal Resistance, Junction to Case, Max 0.87

oC/W R_JA Thermal Resistance, Junction to Ambient (minimum pad of 2 oz copper), Max. 62.5

Thermal Resistance, Junction to Ambient (1 in² pad of 2 oz copper), Max. 40 G S

D

D²-PAK ^G

S D

— N-Channel QFET ® FRFET ® MO SFE T Package Marking and Ordering Information

Electrical Characteristics

Off Characteristics

On Characteristics

Dynamic Characteristics

Switching Characteristics

Drain-Source Diode Characteristics

Device Marking Device Package Reel Size Tape Width Quantity

FQB10N50CF FQB10N50CFTM-WS D2-PAK 330mm 24mm 800

Symbol Parameter Test Conditions Min. Typ. Max. Unit

BV_DSS Drain to Source Breakdown Voltage I_D = 250A, V_GS = 0V, T_J = 25^oC 500 - - V

BV_DSS / T_J

Breakdown Voltage Temperature

Coefficient I_D = 250A, Referenced to 25^oC - 0.5 - V/^oC

I_DSS Zero Gate Voltage Drain Current V_DS = 500V , V_GS = 0V - - 10

V_DS = 400V, T_C = 125^oC - - 100 A

I_GSS Gate to Body Leakage Current V_GS = ±30V, V_DS = 0V - - ±100 nA

V_GS(th) Gate Threshold Voltage V_GS = V_DS, I_D = 250A 2.0 - 4.0 V

R_DS(on) Static Drain to Source On Resistance V_GS = 10V, I_D = 5A - 0.51 0.61 

g_FS Forward Transconductance V_DS = 20V, I_D = 5A - 105 - S

C_iss Input Capacitance

V_DS = 25V, V_GS = 0V f = 1MHz

- 1660 2210 pF

C_oss Output Capacitance - 182 240 pF

C_rss Reverse Transfer Capacitance - 17.5 26 pF

Q_g(tot) Total Gate Charge at 10V

V_DS = 400V, I_D = 10A V_GS = 10V

(Note 4)

- 45 60 nC

Q_gs Gate to Source Gate Charge - 8 - nC

Q_gd Gate to Drain “Miller” Charge - 19 - nC

t_d(on) Turn-On Delay Time

V_DD = 250V, I_D = 10A R_G = 25

(Note 4)

- 25 60 ns

t_r Turn-On Rise Time - 47 105 ns

t_d(off) Turn-Off Delay Time - 138 285 ns

t_f Turn-Off Fall Time - 55 120 ns

I_S Maximum Continuous Drain to Source Diode Forward Current - - 10 A

I_SM Maximum Pulsed Drain to Source Diode Forward Current - - 40 A

V_SD Drain to Source Diode Forward Voltage V_GS = 0V, I_SD = 10A - - 1.4 V

t_rr Reverse Recovery Time V_GS = 0V, I_SD = 10A dI_F/dt = 100A/s

- 91 - ns

Q_rr Reverse Recovery Charge - 220 - nC

Notes:

1: Repetitive Rating: Pulse width limited by maximum junction temperature 2: L = 16.5mH, I_AS = 10A, V_DD = 50V, R_G = 25, Starting T_J = 25°C 3: I_SD 10A, di/dt 200A/s, V_DD BV_DSS, Starting T_J = 25°C

4: Essentially Independent of Operating Temperature Typical Characteristics

www.onsemi.com 2

— N-Channel QFET ® FRFET ® MO SFE T Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

1 10

1 10

30 0.8

*Notes:

1. 250s Pulse Test 2. TC = 25^oC VGS = 15.0 V

10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 V

ID,Drain Current[A]

VDS,Drain-Source Voltage[V]

30

2 3 4 5 6 7 8

0.1 1 10

-55^oC 150^oC

*Notes:

1. VDS = 20V 2. 250s Pulse Test 25^oC

ID,Drain Current[A]

VGS,Gate-Source Voltage[V]

50

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage Drain Current and Gate Voltage Variation vs. Source Current

and Temperature

0.0 0.5 1.0 1.5

0.1 1 10 100

*Notes:

1. V_GS = 0V 2. 250s Pulse Test 150^oC

IS, Reverse Drain Current [A]

V_SD, Body Diode Forward Voltage [V]

25^oC

0 5 10 15 20 25 30

0.2 0.4 0.6 0.8 1.0 1.2

*Note: TJ = 25^oC VGS = 20V VGS = 10V

RDS(ON)[], Drain-Source On-Resistance

ID, Drain Current [A]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

0.1 1 10

0 500 1000 1500 2000 2500 3000 3500

C_oss C_iss

Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd

Crss = Cgd

*Note:

1. V_GS = 0V 2. f = 1MHz

C_rss

Capacitances [pF]

V_DS, Drain-Source Voltage [V]

30 00 10 20 30 40 50

2 4 6 8 10

*Note: ID = 10A VDS = 100V

VDS = 250V VDS = 400V

VGS, Gate-Source Voltage [V]

Q_g, Total Gate Charge [nC]

— N-Channel QFET ® FRFET ® MO SFE T Typical Performance Characteristics

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs. Temperature vs. Temperature

-100 -50 0 50 100 150

0.90 0.95 1.00 1.05 1.10

*Notes:

1. VGS = 0V 2. I_D = 250A BVDSS, [Normalized] Drain-Source Breakdown Voltage

TJ, Junction Temperature [^oC] ^{-100 -50 0 50 100 150 200}

0.0 0.5 1.0 1.5 2.0 2.5 3.0

*Notes:

1. V_GS = 10V 2. ID = 5A RDS(on), [Normalized] Drain-Source On-Resistance

TJ, Junction Temperature [^oC]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

vs. Case Temperature

1 10 100

0.01 0.1 1 10 100

50s 100s

1ms 10ms

ID, Drain Current [A]

VDS, Drain-Source Voltage [V]

Operation in This Area is Limited by R DS(on)

*Notes:

1. TC = 25^oC 2. TJ = 150^oC 3. Single Pulse

600 DC

25 50 75 100 125 150

0 2 4 6 8 10 12

ID, Drain Current [A]

T_C, Case Temperature [^oC]

Figure 11. Transient Thermal Response Curve

10^-5 10^-4 10^-3 10^-2 10^-1 10⁰ 10¹

1E-3 0.01 0.1 1

0.01 0.1 0.2

0.05 0.02

*Notes:

1. ZJC(t) = 0.87^oC/W Max.

2. Duty Factor, D= t1/t2 3. TJM - TC = PDM * ZJC(t) 0.5

Single pulse

Thermal Response [ZJC]

Rectangular Pulse Duration [sec]

t1

PDM

t2

ZJC(t), Thermal Response [oC/W]

t₁, Square Wave Pulse Duration [sec]

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— N-Channel QFET ® FRFET ® MO SFE T

Figure 12. Gate Charge Test Circuit & Waveform

Figure 13. Resistive Switching Test Circuit & Waveforms

Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms V

V

10%

90%

t_d(on) t_r

t_on t_off

t_d(off) t_f

V

10V

V

R

DUT R

V

V

V

10%

90%

t_d(on) t_r

t_on t_off

t_d(off) t_f

V

10V

V

R

DUT R

V

V

Charge V

10V

Q

Q

Q

3mA

V

DUT

V

300nF 50KΩ 200nF 12V

Same Type as DUT

Charge V

10V

Q

Q

Q

3mA

V

DUT

V

300nF 50KΩ 200nF 12V

Same Type as DUT

E

= ---- L I

2

1 --- BV

- V

BV

V

V

BV

t _p

V

I

V

(t) I

(t)

Time

10V DUT

R

L

I

t _p

E

= ---- L I

2 E

= ---- 1 L I

2 ---- 1

2

1 --- BV

- V

BV

V

V

BV

t _p

V

I

V

(t) I

(t)

Time

10V DUT

R

LL

I

I

t _p

V

V

I_G = const.

— N-Channel QFET ® FRFET ® MO SFE T

Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT

V

+

_

Driver R

Same Type as DUT

V

• dv/dt controlled by R

• I

controlled by pulse period

V

L

I

V

10V ( Driver )

I

( DUT )

V

( DUT )

V

Body Diode Forward Voltage Drop

V

I

, Body Diode Forward Current

Body Diode Reverse Current I

Body Diode Recovery dv/dt di/dt D = Gate Pulse Width

Gate Pulse Period --- DUT

V

+

_

Driver R

Same Type as DUT

V

• dv/dt controlled by R

• I

controlled by pulse period

V

LL

I

V

10V ( Driver )

I

( DUT )

V

( DUT )

V

Body Diode Forward Voltage Drop

V

I

, Body Diode Forward Current

Body Diode Reverse Current I

Body Diode Recovery dv/dt di/dt D = Gate Pulse Width

Gate Pulse Period --- D = Gate Pulse Width

Gate Pulse Period ---

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— N-Channel QFET ® FRFET ® MO SFE T Mechanical Dimensions

Dimension in Millimeters

TO-263 2L (D ² PAK)

Figure 16. 2LD,TO263, Surface Mount

Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms and conditions, specif-ically the warranty therein, which covers ON Semiconductor products.

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ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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