Maintaining spectral purity – Phase Noise and Low Jitter reference

As the drive to increase data rates; whilst maintaining the same spectral bandwidth, continues unabated results in ever increasing complex modulation schemes. In the past schemes, such as Quadrature Phase Shift Keying (QPSK) was at the forefront of digital modulation world now they are a confined to the history books. The latest digital protocols such 256 Quadrature Amplitude Modulation (QAM) have such small distances between vector positions, the control requirements needed to ensure adequate Error Vector Measurement (EVM) performance dictates that the phase noise, of the system clock or LO be greater than -120 dBc/Hz. The same requirements are needed for low noise systems, such as Global Positioning by Satellite (GPS), where the circuit is trying to detect very low signals. Using a XTAL, as described in 2.3.12, has great phase noise, , performance, but is impractical to use to test circuit parameters such as EVM as it is not phase locked to the test system. A few commonly used approaches are significantly flawed but are used none the less. These approaches result in a significantly degraded phase noise performance.

1) Digital Pin – A digital pin is used, as shown in Figure 15, to drive the reference clock, from a digital pattern. If the edge placement of the digital pin were accurate to a few picoseconds then the phase jitter of the pin would be sufficient.

However, this is extremely unlikely in lower cost Mixed Signal testers where edge placement is usually specified to nanoseconds, which would result in a degraded phase noise performance due to the clock.

Figure 16 –System overview of LTX MX RF tester

2) AWG – An AWG can also be used to produce these signals, although more commonly as a sinewave than a square wave. In general, most high speed AWG’s do not come with a specified phase noise performance, therefore cannot be relied upon to generate low phase noise clocks.

3) RF generator – Although RF generators can be used down to the MHz region, the best phase noise performance is exhibited at the higher frequencies, for a commonly used RF generator, at 20 MHz the phase noise specification is -116 dBc/Hz whereas at 1 GHz, the same generator has a phase noise specification of -126 dBc/Hz. If the requirement is a phase noise of -120 dBc/Hz then clearly using a source with a specified value of -116 dBc/Hz will not suffice.

To overcome this issue we can use high performance digital on-board circuitry to improve the phase noise of the RF generator to produce a significantly better phase noise clock that would be otherwise not be possible using the test system in its normal configuration to produce the required frequencies needed.

Using the RF subsystem to generate the Local Oscillator (LO) is to the DUT is a good choice as it is phase locked 10 MHz reference, Figure 16, that drives the whole test system. As such, the measured signals of any Transmitter or Receiver will be synchronised with the input signals, therefore allowing to measure complex waveforms such as 256 QAM, and thus calculations such as EVM are possible without complex windowing techniques.

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26 Peter Sarson - December 2018

The phase noise generated by a DUT is simply a function of the XTAL oscillator circuitry that would drive the device, Figure 14, which can usually be modelled by a simple inverter circuit. The major phase noise contribution is where the inverter is switching states, as defined in 2.3.12. Therefore, the quicker the signal passes through this switching region, the better the phase noise performance of the XTAL oscillator will be. This can be expressed mathematically simply as the rate of change of the signal, equation (1b). One misconception that is common is that the XTAL input voltage has to go from 0  VDD. This is not true and actually reduces the rate of change of voltage, equation (1b), if produced, as the signal takes longer to get to and from VDD. As long as the voltage swing of the reference clock is greater than the switch points of the XTAL oscillator the DUT will function as expected.

∝ (1b)

A technology that has an exceptional rate of change performance and high frequency switching characteristics is the Emitter Coupled Logic (ECL). If this technologies performance could somehow be extracted and used with a loadboard it could be possible to generate a superior phase noise signal than with just the tester alone. It is possible with the RF subsystem of most testers to produce frequencies up to 6 GHz, if it was possible to both divide this frequency down and produce a square wave with an excellent rate of change, it could be possible to generate a superior phase noise signal.

Using the MC100EL33 ECL divider from OnSemi, it is possible to divide down signals at frequencies of up to 3.8 GHz, with a clock-to-clock jitter of 1 ps and rise and fall times of 225ps. By daisy chaining either three or four of these devices together, it is possible to generate the frequencies that are usually required for a XTAL, between 10 – 40 MHz, with exceptional phase noise properties. However, ECL has strange voltage levels in that they switch between 3.3 and 4 V i.e. a 0.7 V voltage swing that are generally not useful. However, if the DC component is filtered off with AC coupling, it will be possible to generate a 0.7 Vpk-pk signal centred on 0V with exceptional phase noise properties. If the LO requires a DC offset, it is possible to use one of the testers DC instruments, with a lot of filtering, to shift the generated reference clock to the required voltage offset.

Using a real world GPS device as an example that was recently put into production, the reference clock required a 10 MHz reference that would be supplied by a Temperature Controlled Crystal Oscillator (TCXO) in the application. The phase noise spec of the device was -86.5 dBc/Hz at 1.590 GHz at 100 kHz offset and -116.2 dBc/Hz at 1.590 GHz at 1 MHz offset. By using the ECL divider circuity, Appendix 4, with four divide by 4 dividers and using the RF generator with a frequency of 2.56 GHz, a pure 10 MHz signal was produced. This resulted in the ability to measure the phase noise contribution of device repeatedly, Figure 17 & Figure 18, rather than measuring the random noise added to the device by the test system that results in poor repeatability and non-correlating results.

Figure 17 –Relatability histogram of phase noise of a GPS receiver at 1.59GHz at 100 kHz offset

Figure 18 –Relatability histogram of phase noise of a GPS receiver at 1.59GHz at 1 MHz offset

ANALOGUE MIXED SIGNAL TEST DEVELOPMENT

28 Peter Sarson - December 2018