Introduction

The development of semiconductor technologies has resulted in highly integrated, more complex VLSI systems. System design is complicated, time consuming, and expensive. But, the market is more demanding, requiring a shorter life cycle and time-to-market for new products, lower costs, lower power consumption, and higher throughput. New design methods are needed to deal with such complex systems and meet demands. Hardware and software codesign is emerging as a promising approach to deal with these challenges.

The codesign approach involves the concurrent design of hardware and software, which is tightly coupled throughout the design process. One of the goals of codesign is to shorten the time-to-market, low cost, and achieve better designs and products, while reducing the effort and cost of designing a product to meet

Recently, hardware/software codesign has moved to a higher level of abstraction through the platform-based and the reuse of IP in embedded systems. Digital system design has abstraction levels that reflect the design at different degrees of detail. From the highest to the lowest abstraction level, these are the system, platform-based, IP-based, RTL, gate and transistor level. The system level is the highest level, and consists of a single system with a few components, including processors, memory, DSP chips, custom hardware or IP components, and SoC(system-on-a-chip). The design of a complex system is easer at a higher abstraction level than at a lower abstraction level. [4-1], [4-2].

System-level codesign methodology is applicable at the system level. The codesign process starts with the system specifications. Then, the designers select an algorithm and architecture by refinement or optimization, based on simulations and evaluations, and then designs the hardware and software separately, in parallel, with interaction and feedback between the two as the design progresses.

Finally, there are a number of refinement or optimization steps leading to the final design and implementation.

One of the important aspects of this approach is to find the best system architecture, including the right partition between the hardware and software modules, and the best hardware modules. In the process, the designer makes design decisions, which must be based on quantitative simulations and evaluations of the results. However, these design decisions are often inefficient, sub-optimal, or occur too late in the design process. Decisions involving the algorithm and architecture or hardware and software for performing a function affect system performance, chip area, and power consumption. Often, various algorithms and architectures are available for the same a function or an application, but their performance and complexity differ markedly.

The hardware and software implementation can have different results for the same algorithm. These decisions and tradeoffs in the hardware and software or algorithm and architecture often occur too late in the design process to make

In this chapter, we describe efficient feedback between algorithm and architecture design, which involves tradeoffs that can be effectively analyzed at the pre-implementation level before decisions must be made. We used a target system architecture template to reduce design decisions. The architecture template-based design is necessary for designing systems to handle the complexity of applications to reduce development costs, to enable reuse, and to achieve the required design goals [4-13], [4-14].

In our codesign methodology, we first searched a bottleneck in an MPEG-4 encoder. We became to know that the major bottleneck module was the motion estimation module, and therefore focused on this module to optimize and remove the bottleneck, then improve the encoder system performance.

We investigated the computational complexity and quality of motion estimation algorithms and the simplicity of hardware implementation. Then, we chose and implemented the best algorithm. To obtain hardware optimization, we used a parallel PE array. We were able to make tradeoffs and optimize the design using information based on evaluations of different constraints placed on the encoder and different applications.

This chapter is organized as follows. Section 2 summarizes previous work related to the codesign methodology. Section 3 describes the proposed target system architecture platform. Section 4 describes our codesign procedure. Section 5 presents the hardware and software implementation results for the MPEG-4 encoder and the motion estimation algorithms investigated, and then summarizes the architecture implemented and hardware architecture results. The conclusions are presented in Section 6.

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Codesign is often defined as the integrated design of systems implemented using both hardware and software components. Hardware and software codesign involves the cooperative design of hardware and software modules, considering

various types of components. Some functions are implemented as hardware, while others are implemented in software. One of the goals of codesign is to shorten the time-to-market, while reducing the design effort and cost of the final product.

Recently, there has been growing interest in codesign for several reasons. First, the increasing complexity, size, integration, and diversity of application demands advanced design methods for both hardware and software. This has been accompanied by advances in enabling technologies, such as CAD tools, and new design environments and methodologies. Moreover, the market requires decreased costs for designing and testing hardware/software systems.

Hardware/software codesign differs from conventional approaches in that it continuously relates the hardware and software design cycles. A decision made during hardware design significantly affects software design. As a result, a number of research groups have started to research new technologies and methodologies involved in the design of cooperative hardware/software systems.