マルチコンテキストデバイスを用いた動的適応型ハードウェアの提案
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(5) jdpSQ+@7{wdZt}Ãw¬2h £Bp}XZq6Y rus2@3@_íÃ2vKh{W´8pZGÑ Á Multicontext A A. A. Multicotext reconfigurable block. n qh4o-½8. Configuration data. Aj. 1:. tÄÃ2h p ] ] v #rq ³{(k XaYcdu#vusExSa(«Zb6Ã2d}hÃ-p"hjg4pub2t#½8w¾@sI¿Wt+ ÎWvÏcw6Ðe/I§ð6Ñ0]10 2s Y t xy ³autZ´ ¶2w·6 ¸6X^Y $adgÍQg+½8¾¿+upa®wk G0HgJ+LUM-N6O$PRgTZVUdSq8rWÈKÉepéÊ8Ë6s0ta´ dz^É@XSY|{(}Id1zZÉ@]~cYDG6HgJ+LUMw (5 «Wt1 (6Bp (I]4jWt 0 %Kh0-Wta´U³ Ä]ZY dgÈ8Éjp}®w+` ]gqWÒÂakU0¿u§ º6dgq-r c p"ws^´. 2002 10 DRP(Dynamically. NEC Reconfigurable. Processor)[1]. DRP. 2.1 ¡8¢¤£¦¥§ ¶¨6aÊ8Ë-s0tDG2H}J+LKM@pÖqUr2s6tcZ8U o ½gp n ]©-sc´SaUU+dª"«IXÄY Wj Y ¬ Ï+§ ¬ ZN0O PÖRgTZV--Ä0»ZQ¨íp©ÿ®TE:2t 2 Ww éYW³ } ]15w® }`20«+u6pu¯gu°w»Ks t ¨í]%l$-u}` 8]-tc7@½U¾P w ¿8upSÁ JIstc´ X±`6d ] ²%$(BpI Y³$#´wd ] v@ q0r ³gut^´e6g»K ¨íd1 µT@: ]07 P Zd¯ °jXKYI ¶Z·M8OE¸}7{d¹034º(»e]uv(Y `c±'$³a@t^´ d(o-½W@dgÅ2¶2y#¼jXZYI½wO4½ ¿(À6Á _Ä ¾ G+M+À8Á2NO PDRZTUV -tc^Y^±('Bd1zcÉBXU½0O ½ ¾ G+M@]^²J$}«8c´ i+k^Y n X8º§^αÂpQ_bId6oZ· M8OK DY`A_:W`+0t^cYcºe§}Îcp Ã6s^¬8£+Y d6v6xé« 2. 1. Multicontext. reconfigurable block[5][6]. 1. Configuration data. Fixed region context [7] reconfigurable device. WASMII[5]. 1. Partial reconfiguration. Partinal context switch. A A1, A2,...An. A. A. Aj. Multicontext reconfigurable device. [7]. Aj. A. Aj. Ak. Ak. A. • Aj. A. •. Aj. • Aj. A. A. −60−.
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(29) °Y±² \Yc «/}³Y ´<µ< t¶ ¡ NEC º5»<¼ ²¹ ½¾ NEC ¿<ÀY¿tºÁ ÂTÃ#¦7Ä «%Å Æ·c¸70¹t Ç ¶ ¢eÉ#Ê<Ëe¸) É`Ì7Í<)ÎeÏ µ «Ñж7Ò Ó#Ô0ÕÇÖ¨0Èm ¢ × Ø Ù Ú Ö ¦ ÅÆ Ç¨È ÛÝÜßÞáà [1] M.Motomura:”A Dynamically Reconfigurable Processor Architecture,” Microprocessor Forum, Oct. 2002. [2] A.Alsolaim, J.Becker, M.Glesner, J.Starzyk: “Architecture and APplication of a Dynamically Reconfigurable Hardware Array for Future Mobile Communication Systems,” Proc. of FCCM, pp.205-214, (2000). [3] G.J.M.Smit, P.J.M.Havinga, L.T.Smit, P.M.Heysters: “Dynamic Reconfiguration in Mobile Systems,” Proc. of FPL2002, pp.162-170, (2002). [4] T. Fujii, et.al.,: A Dynamically Reconfigurable Logic Engine with a Multi-Context/ Multi-Mode UnifiedCell Architecture, Proc. Intl. Solid-State Circuits Conf., pp. 360–361 (1999). [5] X.-P. Ling, H. Amano, “WASMII: A Data Driven Computer on a Virtual Hardware” Proc. FCCM, pp. 33–42, 1993. [6] S. Trimberger, D. Carberry, A. Johnson and J. Wong “A Time-Multiplexed FPGA” Proc. FCCM pp.22-28, (1997). [7] N.Kaneko, H.Amano, “A General Hardware Design Model for Multicontext FPGAs,” Proc. of FPL, pp.1037-1047, 2002.. −64−.
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