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JAIST Repository: FPGAを用いたオーディオ電子透かしアルゴリズムの実装に関する研究 [課題研究報告書]

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Japan Advanced Institute of Science and Technology JAIST Repository https://dspace.jaist.ac.jp/ Title FPGAを用いたオーディオ電子透かしアルゴリズムの実 装に関する研究 [課題研究報告書] Author(s) 趙, 旭陽 Citation Issue Date 2017-03

Type Thesis or Dissertation Text version author

URL http://hdl.handle.net/10119/14153 Rights

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Study on implementation of audio watermark

algorithm using FPGA

Zhao Xuyang (1510033) School of Information Science,

Japan Advanced Institute of Science and Technology

February , 2017

Keywords: audio watermark, wavelet transform, power consumption,

FPGA.

1

Introduction

In recent years, with the rapid development of multimedia technology and computer network technology, It is extremely easy to process and distribute multimedia (text, audio, image, video, etc.), anyone can collect electronic information on the network. However, this feature does not promote the protection of copyright of electronic information. Digital watermarking technology attracts attention for protecting copyright of electronic infor-mation. The digital watermarking technique is a technique of embedding information of an author in the contents of electronic information so as not to be noticed by humans.

A digital watermark is used to prevent illegal distribution problems of the network. A digital watermark monitoring system of a network places a detection circuit of digital watermark in a device (route, switch, etc.) of a network, and monitors digital contents transmitted via a network. However, it involves placing a digital watermark detection circuit. Power consumption also increases.

In this research, we investigate the algorithm of audio watermarking, se-lect algorism suitable for FPGA (Field Programmable Gate Array), realize

Copyright c⃝ 2017 by Zhao Xuyang

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the detection circuit of audio watermark with hardware with low power consumption circuit.

2

Algorithm

The audio watermarking technology is a technique of embedding author information into digital contents by modifying the digital contents to such an extent that they can not be perceived. Presently, the technique of em-bedding digital watermark into audio is roughly divided into a method of embedding in the frequency domain and a method of embedding in the spatial domain. Not all audio watermark algorithms are suitable for hard-ware implementation. It is necessary to consider the algorithm considering the characteristics of the hardware.

An algorithm for embedding in the frequency domain is a method of converting the original audio to the frequency domain, changing the value of the frequency coefficient, and embedding the watermark. The algorithm [1] is a typical frequency domain algorithm.In the embedding process, the original audio is transformed into the Haar discrete wavelet of level 8, the value of the low frequency coefficient of level 8 is changed, the watermark is embedded, and then the inverse discrete wavelet transform is performed to generate the audio in which the watermark is embedded. In the detection process, the embedded audio is transformed into the level 8 Haar discrete wavelet transform, and the watermark is detected from the low frequency coefficient of the level 8.

An appropriate algorithm[1] is chosen considering the characteristics of the hardware

3

Hardware implementation

In the detection process of the algorithm[1], level 8 Haar Wavelet transfor-mation is performed. There is multiplication while converting. However, it is possible to avoid multiplication by improving the algorithm. During the Haar discrete wavelet transform of level 8, the calculation result of the previous level was used for each level operation. It is necessary to perform

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255 times addition and 255 times subtraction and 510 times multiplica-tion. We can derive the relationship between the low frequency coefficient of level 8 and the data in which the watermark is embedded. Low frequency coefficients of level 8 can be calculated directly from the watermarked data. The hardware implementation of the algorithm is discussed, and the multiplication in the algorithm is avoided

4

Evaluation Experiments

In order to evaluate the power consumption of software and hardware, measure detection time and detection power. In the evaluation of the detection time, the software time is 4.0us. The hardware time is 10.0us. In the detection of power evaluation, the software power consumption is 51.25w, the hardware power is divided into two parts, 50.11w and 50.16w. In summary, The power consumption of hardware is 2 times of software. In hardware, in the data transmission process consumes a lot of energy.

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