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Collision detection hardware in virtual reality environment

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Japan Advanced Institute of Science and Technology

JAIST Repository

https://dspace.jaist.ac.jp/

Title 仮想現実環境における衝突検出ハードウェアに関する

研究

Author(s) 松本, 健太郎

Citation

Issue Date 2005‑03

Type Thesis or Dissertation Text version author

URL http://hdl.handle.net/10119/1921 Rights

Description Supervisor:井口 寧, 情報科学研究科, 修士

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Collision detection hardware in virtual reality environment

Kentaro Matsumoto (310106) School of Information Science,

Japan Advanced Institute of Science and Technology February 10, 2005

Keywords: collision detection, triangle-triangle intersection, polygon, FPGA, virtual reality.

Virtual reality is practical use with speedup of computers in recent years and it has come to be used in the industrial field. Application ranges are many. such as remote operation of robot, computer game, a medical simu- lation, are various. collision detection of box or sphere pair was researched by many researcher. but, collision detection of polygon pair in virtual reality environment was researched by few researcher. Reason is compu- tational cost by collision detection of many polygon. computation cost reduced by bounding volume. Many researchers are reducing computa- tional cost using bounding volume hierarchies. However, making bounding volume hierarchies takes many time. It is difficult collision detection of frequently deformable object. Therefore, we use boundary volume of little computational cost. but, it has many computational cost. Therefore, I research the intersection detection hardware of a triangular polygon.

1 approach

1.1 Improvement in throughput

Implementation of high-speed throughput by pipelining

Implementation of high-speed by cache memory

Copyright c2005 by Kentaro Matsumoto

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2 Result

intersection detection hardware of triangular polygon was described using VHDL. I have designed for the hardware which assumed FPGA on PCI- board (Virtex-II Pro XC2VP100 made in Xilinx corp).

2.1 Performance of hardware

By 32 steps of pipelining, critical path is 9ns and maximum operating frequency is 111MHz.

My hardware compared to software approaches is 79 times the pro- cessing speed.

As compared with the processing speed of the bounding volume pro- cessing hardware using the visibility check function of GPU (graphics processing unit). My hardware was high-speed in less than the 800 polygon pair.

3 conclusion

The processing time of the triangular polygon intersection detection which becomes a bottleneck in a virtual reality environment was accelerated by designing hardware special.

2

参照

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