DC-DC Converters Feedback

(1)

DC-DC Converters Feedback

and Control

(2)

Agenda

Feedback generalities

Conditions for stability

Poles and zeros

Phase margin and quality coefficient

Undershoot and crossover frequency

Compensating the converter

Compensating with a TL431

Watch the optocoupler!

Compensating a DCM flyback

Compensating a CCM flyback

Simulation and bench results

Conclusion

(3)

Agenda

Feedback generalities

Poles and zeros

Conclusion

(4)

What is Feedback?

A target is assigned to one or several state-variables, e.g. V_out

= 12 V.

A circuitry monitors V_out deviations related to V_in, I_out, T° etc.

If V_out deviates from its target, an error is created and fed-back to the power stage for action.

The action is a change in the control variable: duty-cycle (VM), peak current (CM) or the switching frequency.

Input voltage

V_in DC-DC Output voltage V_out

control

action

Compensating for the converter shortcomings!

V_out R_th

V_th Input voltage

V_in

(5)

The Feedback Implementation

V_out is permanently compared to a reference voltage V_ref.

The reference voltage V_ref is precise and stable over temperature.

The error, , is amplified and sent to the control input.

The power stage reacts to reduce ε as much as it can.

ref out

V V

ε = −α

+-

+ -

V_in

V_out

R_upper

R_lower Error amplifier - G

V_ref Modulator - G_PWM

d

Power stage - H

V_p

α

+-

+ -

V_in

V_out

R_upper

R_lower Error amplifier - G

V_ref Modulator - G_PWM

d

Power stage - H

V_p

α

Control variable

(6)

Agenda

Conditions for stability

Poles and zeros

Conclusion

(7)

Positive or Negative Feedback?

V_in(s) +

H(s)

V_out(s)

−

Do we want to build an oscillator?

( ) _{( )} ( )

( ) ( ) ( )

0

lim 1

in

out in

V s

V s H s V s

G s H s

→

⎡ ⎤

= ⎢⎢⎣ + ⎥⎥⎦

To sustain self-oscillations, as V_in(s) goes to zero, quotient must go infinite

= 1 Sign is neg for:

ϕ= -180°

ε

( )( ) ( ) ( ) ( )

1

out in

V s H s

V s = H s G s

+ Open-loop gain T(s)

G(s)

The « Plant »

Error voltage

(8)

1 10 100 1k 10k 100k frequency in hertz

-180 -90.0 0 90.0 180

2122

Conditions for Oscillations

when the open-loop gain equals 1 (0 dB) – cross over point

total rotation is -360°: -180° for H(s) and -180° for G(s)

¾ we have self-sustaining oscillating conditions

Loop gain |H(s)|

Loop phase argH(s)

-180° 0 dB

Gain is 1 at f_c

ϕ = -180°

Total phase delay at f_c: -180° H(s) power stage -180° G(s) opamp

total = -360°

(9)

The Need for Phase Margin

we need phasephase margin when T(s) = 0 dB

we need gaingain margin when arg T(s) = -360°

gain margin

Phase margin:

The margin before the loop phase rotation arg T(s)

reaches -360° at T(s) = 0 dB

Gain margin:

The margin before the loop gain T(s) reaches 0 dB at a freq. where arg T(s) = -360°

Crossover frequency f_c T(s)= 0 dB

phase margin gain

phase

10 100 1k 10k 100k

-80.0 -40.0 0 40.0 80.0

vdboutin db(volts)

-180 -90.0 0 90.0 180

ph_voutin degreesPlot1 2

1

0°

0 dB

arg T(s)

= -360°

T(s)

(10)

Agenda

Poles and zeros

Conclusion

(11)

Poles and Zeros

A plant (power stage) loop gain is defined by:

( ) ( ) ( )

H s N s

= D s

solving for N(s) = 0, the roots are called the zeroszeros

solving for D(s) = 0, the roots are called the polespoles

( ) (

⁵

)(

³⁰

)

1

s k s k

H s s k

+ +

= +

numerator denominator

1

2

1

5 30 1

z z p

s k

= −

1

2

1

5 796

2

30 4.77 2

1 159 2

z

p

f k Hz

f k kHz

f k Hz

π π π

= =

Two zeros

One pole

(12)

Poles and Zeros

A pole lags the phase by -45°at its cutoff frequency

0

( ) 1 1

out in

V s

V s sRC s

ω

= =

+ +

R2 1k

C1 10nF V1

AC = 1

Vin Vout

0

1 ω = RC

-90°delay for f = ∞

-60.0 -40.0 -20.0 0 20.0

0

1

10 100 1k 10k 100k 1Meg 10Meg

-80.0 -60.0 -40.0 -20.0 0

2

-45°at cutoff

Cutoff frequency -3 dB

-1 slope

-20 dB/decade

|V_out(s)|

argV_out(s)

(13)

Poles and Zeros

A zero boosts the phase by +45°at its cutoff frequency

0

( ) 1 s G s ^{= +}ω

0 10.0 20.0 30.0 40.0

vdb2in db(volts)Plot1

0

1

10 100 1k 10k 100k

frequency in hertz 10.0

30.0 50.0 70.0 90.0

ph_v2in degreesPlot2

2 0

10.0 20.0 30.0 40.0

vdb2in db(volts)Plot1

0

1

10 100 1k 10k 100k

30.0 50.0 70.0 90.0

ph_v2in degreesPlot2

2

10 100 1k 10k 100k 1Meg 10Meg

frequency in hertz -60.0

-40.0 -20.0 0 20.0

vdboutin db(volts)plot1

0

1

10 100 1k 10k 100k 1Meg 10Meg

30.0 50.0 70.0 90.0

ph_voutin degreesplot2

2

10 100 1k 10k 100k 1Meg 10Meg

-40.0 -20.0 0 20.0

vdboutin db(volts)plot1

0

1

10 100 1k 10k 100k 1Meg 10Meg

30.0 50.0 70.0 90.0

ph_voutin degreesplot2

2

0

1 ω = RC

0

( ) ( ) 1

1

out in

s

V s sRC

V s sRC s

ω ω

= =

+ +

The general form of a zero:

R2 1k C1

10nF

V1 AC = 1

Vin Vout

+1 slope

+20 dB/decade

+45° at cutoff

+45°at cutoff +1 slope

+20 dB/decade

0° 0°

90° 90°

|V_out(s)|

argV_out(s)

|V_out(s)|

argV_out(s)

(14)

The Right Half-Plane Zero

In a CCM boost, I_out is delivered during the off time: Iout = Id = IL(¹−D)

T_sw

D₀T_sw I_d(t)

t I_L(t)

Vin

L

I_d0

T_sw

D₁T_sw I_d(t)

t I_L(t)

dˆ

I_L1

Vin

L

I_d1 I_L0

If D brutally increases, D' reduces and I_out drops!

What matters is the inductor current slew-rate

Occurs in flybacks, buck-boost, Cuk etc.

( )

d VL t dt

(15)

The Right-Half-Plane-Zero

With a RHPZ we have a boost in gain but a lag in phase!

-40.0 -20.0 0 20.0 40.0

vdbout in db(volts)Plot1

1

1 10 100 1k 10k 100k 1Meg

frequency in hertz -180

-90.0 0 90.0 180

ph_vout in degreesPlot2

2

|V_out(s)|

argV_out(s)

-90°

+1 slope +20 dB/decade

0

( ) 1 s G s ^{= +}ω

LHPZ

RHPZ

0

( ) 1 s G s ^{= −}ω

(16)

Agenda

Poles and zeros

Phase margin and quality coefficient

Conclusion

(17)

How much Margin? The RLC Filter

let us study an RLC low-pass filter, a 2^nd order system

2 3

R1 {R}

1

L1 {L}

C1 {C}

Vout

parameters f0=235k L=10u

C=1/(4*3.14159^2*f0^2*L) w0=({L}*{C})^-0.5

Q=10

R=1/((({C}/(4*{L}))^0.5)*2*{Q})

Vin

( ) ₂ ¹

T s 1

LCs RCs

= + +

( ) ₂ ₂

2 2

1 1

2 1 1

r r r r

T s s s s s

ζ Q

ω ω ω ω

= =

+ + + +

1

r LC

ω =

4 R C

ζ = L 1

Q 2

= ζ

zeta ω_r resonant freq.

ζ damping factor Q quality coeff.

(18)

The RLC Response to an Input Step

changing Q affects the transient response

200m 600m 1.00 1.40 1.80

vout#6, vout#5, vout#4, vout#3, vout in voltsPlot1 7891011

Q = 0.1

Q = 0.5 Q = 0.707 Q = 1

Q = 5

Fast response and no overshoot!

Q < 0.5 over damping Q = 0.5 critical damping Q > 0.5 under damping

Overshoot = 65%

Asymptotically stable

(19)

Where is the Analogy with T(s)?

in the vicinity of the crossover point, T(s) combines:

one pole at the origin, ω₀ and one high frequency pole, ω₂

9 Link the closed-loop response to the open-loop phase margin:

( )

0 2

1 1 T s

s s

ω ω

= ⎛ ⎞⎛ ⎞

⎜ ⎟⎜ + ⎟

⎝ ⎠

gain

phase

10 100 1k 10k 100k

-80.0 -40.0 0 40.0 80.0

vdboutin db(volts)

-180 -90.0 0 90.0 180

ph_voutin degrees

2

1

0° 0 dB

-2 -1

( )( ) ²

0 2 0

1

1 1

T s

s s

T s

ω ω ω

+ = + +

( )( ) ²

2

1

1 1

r r

T s

s s

T s

ω ω Q

+ = + +

(OL)

(CL)

Link open-loop ϕ_m with closed-loop Q

Close the loop

T(s)

(20)

Closed-Loop Q Versus Open-Loop ϕ

_m

a Q factor of 0.5 (critical response) implies a ϕ_m of 76°

a 45° ϕ_m corresponds to a Q of 1.2: oscillatory response!

0 25 50 75 100

0 2.5 5 7.5 10

1 tan+ ( )φ ²

( )

¹⁴

tan( )φ

φ 360 2⋅π

⋅

0.5

76°

Q

ϕ_m

(21)

Summary on the Design Criteria

compensate the open-loop gain for a phase margin of 70°

make sure the open-loop gain margin is better than 15 dB

never accept a phase margin lower than 45° in worst case

300u 900u 1.50m 2.10m 2.70m

time in seconds 4.88

4.94 5.00 5.06 5.12

vout2#a,vout2,vout2#b,vout2#d in voltsPlot2 2315

PM = 10°

PM = 25° PM = 45°

PM = 76°

(

out^, c^, out

)

f C f ΔI

( )

f PM

(22)

Agenda

Poles and zeros

Undershoot and crossover frequency

Conclusion

(23)

1 10 100 1k 10k 100k 1Meg frequency in hertz

-60.0 -40.0 -20.0 0 20.0

vdbout in db(volts)plot1

2

A DC-DC conv. combines an inductor and a capacitor

As f is swept, different elements dominate Z_out,OL

DC-DC Output Impedance

Z_out(dBΩ)

f (Hz)

R_Lf

L_out

C_out

R_esr

4 1

Lout 100u

2

Rlf 10m

3

Resr 1m

Cout 1000uF

I1 AC = 1

Vout

A buck equivalent circuit

f₀

To avoid stability issues, f_c >> f₀

2 2 0

0

1 ^lf

lf

Z R

R Z

⎛ ⎞

+ ⎜ ⎟

⎝ ⎠

Crossover region

( )

^|| ¹

out out Lf esr

out

Z sL R R

sC

⎛ ⎞

= + ⎜ + ⎟

⎝ ⎠

Open-loop model

(24)

Closing the Loop…

At the crossover frequency Z_out,CL

≈

Z_out,OL

1 10 100 1k 10k 100k

-50.0 0 50.0 100

vdbout#b,vdbout, vdberr in db(volts)Plot1

2

3 5

|Z_out,CL|

|Z_out,OL|

|T(s)|

f

_c

|Z_out,CL|≈| Z_out,OL|

(25)

Calculating the Output Impedance

the closed-loop output impedance is dominated by C_out

( ) ( )

,

1 2 2 cos

1 1 1

2 1 2

out CL

c out c out m

Z ^≈ π f C +T s ^≈ π f C ₋ ϕ

20 40 60 80

0 1 2

1( )

1+T f_c

ϕ_m°

Z_out improves Z_out

degrades

Open-loop phase margin affects the closed-loop output

impedance

(26)

An Example with a Buck

Let’s assume an output capacitor of 1 mF

The spec states a 80 mV undershoot for a 2 A step

How to select the crossover frequency?

2

out out

c out

V I

π f C Δ ≈ Δ

2

out c

out out

f I

V C π

≈ Δ Δ

2 4

80 1 2

fc kHz

m m π

≈ =

× ×

@ 4 1 40

2 4 1

Cout

Z kHz m

k m

= π = Ω

× ×

Select a 1000-µF capacitor featuring less than a 40-mΩ ESR

(27)

Setting the Right Crossover Frequency

Compensate the converter for a 4 kHz f_c

10 100 1k 10k 100k

-40.0 0 40.0 80.0

vdberr in db(volts)

-180 -90.0 0 90.0 180

ph_verr in degreesPlot1 4

3

4 kHz

ϕ_m = 70°

Compensated open-loop gain Buck operated in voltage-mode

gain phase

f_c

(28)

Step Load the Output

Vout

16

C5 1mF

R10

11 1m Vin 10

3

L1 100u

5

Rupper 10k

Rlower 10k

6 1

X2

AMPSIMP V2

2.5 Verr

vout vout

7

rLf 10m

GAIN

12

X1 GAIN K = 0.5

X3 PWMVM L = 100u Fs = 100k

d

a c

PWM switch VM p

8

R7 {R3}

C3 {C3}

13

R2 {R2}

C1 {C1}

C2 {C2}

I1

G(s) H(s)

PWM gain

the load varies

from 100 mA to 2.1 A

(29)

Measure the Obtained Undershoot

1.61m 2.42m 3.23m 4.05m 4.86m

time in seconds 4.92

4.94 4.96 4.98 5.00

vout in voltsPlot1

5

70 mV

( )

2 2 co 0

s 4

m

m I

V ϕ

Δ Δ

≈ −

40 2 70

V m 1.14 mV

Δ ≈ × =

(30)

Agenda

Poles and zeros

Compensating the converter

Conclusion

(31)

How do we Stabilize the Converter?

1. Select the crossover frequency f_c(assume 4 kHz)

2. Provide a high dc gain for a low static error and good input rejection 3. Shoot for a 70° phase margin at f_c

4. Evaluate the needed phase boost at f_cto meet (3) 5. Shape the G(s) path to comply with 1, 2 and 3

( ) ( )

, ( )

, 1

sc OL sc CL

A s

= T s +

|H(s)| @ f_c

ArgH(s) @ f_c

Open-loop Bode plot of the power stage, H(s)

Phase Gain

10 100 1k 10k 100k

-90.0 0 90.0 180

ph_voutin degrees

-40.0 -20.0 0 20.0 40.0

vdboutin db(volts)Plot1

1

(32)

First, Provide Mid-Band Gain at Crossover

1. Adjust G(s) to boost the gain by +21 dB at crossover

¾ Create the so-called mid-band gain

|H(s)|= -21 dB ArgH(s)= -175° Phase

Gain

10 100 1k 10k 100k

-90.0 0 90.0 180

ph_voutin degrees

-40.0 -20.0 0 20.0 40.0

vdboutin db(volts)Plot1

Tailor G(s) to exhibit a gain of +21 dB@ f_c.

0 dB@f_c

Push the gain up.

4 kHz

(33)

100m 1 10 100 1k 10k 100k frequency in hertz

-360 -180 0 180 360

p in unknown

-60.0 -30.0 0 30.0 60.0

vdbout in db(volts)Plot1

8 10

Second, Provide High Gain in DC

2. An integrator provides a high dc gain but rotates by -270°

¾ This is the origin pole

1 2

C1 100n

4

R1 10k

E1 1k

V1 AC = 1

Vout

60 dB

-20 dB per decade slope -1

-180°by inverting op amp

-90°by pole

at the origin -270°

(34)

-160 -120 -80.0 -40.0 0

ph_vout#a in degreesPlot1

18

-360 -270 -180 -90.0 0

p in unknownPlot3 11

10 100 1k 10k 100k

-270 -180 -90.0 0

p in unknownPlot2

1

Third, Evaluate the Phase Boost at f

_c

arg H(s) arg G(s)

arg H(s)G(s)

Phase boost at f_c

arg H(s) at 4 kHz

ϕ_m

( )

argH f_c −270° + BOOST −ϕ_m = −360°

( )

arg 90 70 175 90 155

m c

BOOST =ϕ − H f − ° = ° + − = °

-175°

+155°

-113°

ϕ_m = 70°

arg H(s)

arg G(s)

+

(35)

How do We Boost the Phase at f

_c

?

The phase boost is created by combining zeros and poles

( ) ¹

1

z

p

j G j

j ω ω ω

ω ω

⎛ ⎞

⎜ + ⎟

⎝ ⎠

= ⎛ ⎞

⎜ + ⎟

⎜ ⎟

⎝ ⎠

( ) ¹

1

arg arg

1

z

p

j G j boost

j ω ω ω

ω ω

⎛ ⎞

⎜ + ⎟

⎝ ⎠

= =

⎛ ⎞

⎜ + ⎟

⎜ ⎟

⎝ ⎠

( )

1 1

arg _c arctan ^c arctan ^c

z p

f f

G f f f

⎛ ⎞

= ⎜⎝ ⎟⎠− ⎜⎜⎝ ⎟⎟⎠

Assume 1 zero placed at 705 Hz, 1 pole at 22 kHz and a 4-kHz crossover frequency:

( )

⁴ ⁴

arg 4 arctan arctan 80 10.3 70

705 22

k k

G kHz

k

⎛ ⎞ ⎛ ⎞

= ⎜⎝ ⎟⎠ − ⎜⎝ ⎟⎠ = − ≈ °

If poles and zeros are coincident, no phase boost!

(36)

10 100 1k 10k 100k frequency in hertz

-360 -180 0 180 360

p in unknown

-40.0 -20.0 0 20.0 40.0

vdbout in db(volts)plot1

33

32

How do We Boost the Phase at f

_c

?

Type 2

Phase boost at f_c=71°

Gain at f_c= 21 dB

f_z= 705 Hz f_p= 22 kHz

4 kHz

G_{100 Hz}= 38 dB

Gain

|G(s)|

Phase Arg G(s) -270°

(37)

How do We Boost the Phase at f

_c

?

The type 1 configuration

No phase boost, pure integral term

Permanent phase lag of -270°

Ok if argH(f_c) < -45° for a ϕ_m ^{of 45}°

( ) ( )

( ) 1 1

0

1 1

out in

V s

G s V s sR C s ω

= = =

1

1 1

1

p R C

ω =

1 2

C1 10n

4

R1 10k

E1 10k

V1 AC = 1

Vout

Type 1

1 pole at the origin

(38)

How do We Boost the Phase at f

_c

?

Phase boost up to 90°

Ok if argH(f_c) < -90°

( ) ( )

2 1

1 2

1 1 2 2

1 2

1 1 G s sR C

sR C C sR C C

C C

= − +

⎛ ⎡ ⎤⎞

+ ⎜⎜⎝ + ⎢⎣ + ⎥⎦⎟⎟⎠

1 1

1

po R C

ω =

1 pole at the origin 1 zero

1 pole

1

2 2

1

p R C

ω = ₁

2 1

1

z R C

ω =

If C₂ << C₁

1 2

C1 2nF

3

R1 10k

4

E1 10k

V1 AC = 1

Vout R2

116k C2

62pF

(39)

How do We Boost the Phase at f

_c

?

Phase boost up to 180°

Ok if argH(fc) < -180°

Type 3

1 pole at the origin 2 zeros

2 poles

If C₂ << C₁ and R₃ << R₁

1 2

C1 11nF

3

R1 10k

4

E1 10k

V1 AC = 1

Vout R2

20k C2 350pF

5

R3 321 C3

22nF

( )

(³ ¹ ³ )

2 1

3 3 1 2

1 1 2 2

1 2

1 1

( ) 1

1

sC R R G s sR C

C C sR C

sR C C sR

C C

+ +

= − +

⎛ ⎞ +

+ ⎜⎝ + + ⎟⎠

1

2 1

1

z R C

ω = ₂

1 3

1

z R C

ω =

1 1

1

po R C

ω =

1

3 3

1

p R C

ω = ₂

2 2

1

p R C

ω =

(40)

Finally, We Test the Open-Loop Gain

5. Given the necessary boost of 155°, we select a type-3 amplifier 6. A SPICE simulation can give us the whole picture!

Vout

16

C5 1mF

R10

11 1m Vin 10

3

L1 100u

5

Rupper 10k

Rlower 10k

6 1

X2

AMPSIMP V2

2.5 Verr

vout

7

rLf 10m

GAIN

2 12

X1 GAIN K = 0.5

X3 PWMVM L = 100u Fs = 100k

d

a c

PWM switch VM p

vout

8

R7 {R3}

C3 {C3}

13

R2 {R2}

C1 {C1}

C2 {C2}

R11 1

LoL 1kH

9

CoL 1kF

Vstim AC = 1

Type 3 Buck stage

1 pole at the origin 2 zeros at 500 Hz 2 poles at 50 kHz

(41)

Finally, We Test the Open-Loop Gain

An ac simulation gives us the open-loop Bode plot

10 100 1k 10k 100k

-180 0 180 360

p in unknown

-80.0 -40.0 0 40.0 80.0

vdberr in db(volts)plot1

15

14

ϕ_m = 70° f_c = 4 kHz Gain

T(s)

Phase Arg T(s)

(42)

Agenda

Poles and zeros

Compensating with a TL431

Conclusion

(43)

Type 2 with a TL431

Litterature examples use op amps to close the loop.

Reality differs as the TL431 is widely implemented.

How to convert a type 2 to a TL431 circuit?

2.5V K

A

R

TL431A

K

A R

R A

A shunt regulator! K

(44)

X1 TL431A

RLED

Czero

Rupper

Rlower L1

2.2u D2

MBR20100CT

C2 1mF

C3 100uF Rbias

Vout

fast lane

slow lane FB

Rpullup

Vdd

FB signal

Gnd

FB

Rpulldown

FB signal

Gnd Vcc solution A

solution B

Type 2 with a TL431

A TL431 implements a two-loop configuration

(45)

Adding a Pole for a Type 2 Circuit

The pole is a simple capacitor on the collector

Rpullup

Vdd FB

Cpole Rpulldown

Vdd FB

Cpole

( ) 1 1

( ) CTR

( ) 1

upper zero pullup

FB

out upper zero pullup pole LED

sR C R

V s

G s V s sR C sR C R

⎛ + ⎞⎛ ⎞

= = −⎜⎜⎝ ⎟⎜⎟⎜⎠⎝ + ⎟⎟⎠

1

po 2

upper zero

f ⁼ πR C

1

z 2

upper zero

f ⁼ πR C

1

p 2

pullup pole

f ⁼ πR C

pullup CTR

LED

G R

= R

Mid-band gain High frequency pole Low frequency zero

Pole at the origin

Or on the emitter

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The Type 2 Final Implementation

The LED resistor fixes the mid-band gain

3

Rupper

Rlower

2

X1 TL431

1

RLED

Czero

Vout

U2B

U2A

Cpole

Rpullup Vdd

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What TL431?

The TL431 is available under several grades

TL431AI, 2.495 V, ± 2.2% T_A = -25 °C to +85 °C

TL431AC, 2.495 V, ± 1.6% T_A = -25 °C to +85 °C

TL431BI, 2.495 V, ± 0.8% T_A = -25 °C to +85 °C

• BV = 37 V, I_K,max = 100 mA and I_K,min = 1 mA

The TLV431 can regulate to a lower output

TLV431A, 1.24 V, ± 2% T_A = -25 °C to +85 °C

TLV431B, 1.24 V, ± 1% T_A = -25 °C to +85 °C

• BV = 18 V, I_K,max = 20 mA and I_K,min = 100 µA

NCP100 down to 0.9 V

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Agenda

Poles and zeros

Watch the optocoupler!

Conclusion