NVMFS6B03NL Power MOSFET

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NVMFS6B03NL Power MOSFET

100 V, 4 m W , 145 A, Single N−Channel

Features

• Small Footprint (5x6 mm) for Compact Design

• ^{Low R}

DS(on)

to Minimize Conduction Losses

• ^{Low Q}

G

and Capacitance to Minimize Driver Losses

• NVMFS6B03NLWF − Wettable Flank Option for Enhanced Optical Inspection

• AEC−Q101 Qualified and PPAP Capable

• These Devices are Pb−Free and are RoHS Compliant

MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)

Parameter Symbol Value Unit

Drain−to−Source Voltage V_DSS 100 V

Gate−to−Source Voltage V_GS ±16 V

Continuous Drain Current R_q_JC

(Notes 1, 3) Steady State

T_C = 25°C I_D 145 A

T_C = 100°C 102

Power Dissipation R_q_JC (Note 1)

T_C = 25°C P_D 198 W

T_C = 100°C 99

Continuous Drain Current R_q_JA

(Notes 1, 2, 3) Steady State

T_A = 25°C I_D 20 A

T_A = 100°C 14

Power Dissipation R_q_JA (Notes 1 & 2)

T_A = 25°C P_D 3.9 W

T_A = 100°C 2.0

Pulsed Drain Current T_A = 25°C, t_p= 10 ms I_DM 520 A Operating Junction and Storage Temperature T_J, T_stg − 55 to

+ 175 °C

Source Current (Body Diode) I_S 160 A

Single Pulse Drain−to−Source Avalanche Energy (I_L(pk) = 60 A)

E_AS 180 mJ

Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)

T_L 260 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Case − Steady State R_qJC 0.76 °C/W Junction−to−Ambient − Steady State (Note 2) R_q_JA 38

1. The entire application environment impacts the thermal resistance values shown,

MARKING DIAGRAM www.onsemi.com

XXXXXX = 6B03NL (NVMFS6B03NL) or XXXXXX = 6B03LW (NVMFS6B03NLWF) A = Assembly Location

Y = Year

W = Work Week ZZ = Lot Traceability

XXXXXX AYWZZ V_(BR)DSS R_DS(ON) MAX I_D MAX

100 V

4 mW @ 10 V

145 A

G (4)

S (1,2,3) N−CHANNEL MOSFET

D (5,6)

S S S G

D

D D

D DFN5

(SO−8FL) CASE 488AA

STYLE 1

1

See detailed ordering, marking and shipping information on page 5 of this data sheet.

ORDERING INFORMATION 6 mW @ 4.5 V

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Parameter Symbol Test Condition Min Typ Max Unit OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V_(BR)DSS V_GS = 0 V, I_D = 250 mA 100 V Drain−to−Source Breakdown Voltage

Temperature Coefficient

V_(BR)DSS/ T_J

40.9 mV/°C

Zero Gate Voltage Drain Current I_DSS V_GS = 0 V, V_DS = 80 V

T_J = 25°C 25

mA

T_J = 125°C 250

Gate−to−Source Leakage Current I_GSS V_DS = 0 V, V_GS = 16 V 100 nA

ON CHARACTERISTICS (Note 4)

Gate Threshold Voltage V_GS(TH) V_GS = V_DS, I_D = 250 mA 1.0 3.0 V

Threshold Temperature Coefficient V_GS(TH)/T_J −6.4 mV/°C

Drain−to−Source On Resistance R_DS(on) V_GS = 10 V I_D = 20 A 3.3 4.0

mW

V_GS = 4.5 V 4.8 6.0

CHARGES AND CAPACITANCES

Input Capacitance C_ISS

V_GS = 0 V, f = 1 MHz, V_DS = 25 V

5320

Output Capacitance C_OSS 1850 pF

Reverse Transfer Capacitance C_RSS 110

Total Gate Charge Q_G(TOT)

V_GS = 10 V, V_DS = 50 V; I_D = 50 A

70.7

nC

Threshold Gate Charge Q_G(TH) 9.4

Gate−to−Source Charge Q_GS 17.3

Gate−to−Drain Charge Q_GD 7.4

Plateau Voltage V_GP 3.3 V

SWITCHING CHARACTERISTICS (Note 5)

Turn−On Delay Time t_d(ON)

V_GS = 4.5 V, V_DS = 50 V, I_D = 50 A, R_G = 2.5 W

19.9

ns

Rise Time t_r 181.7

Turn−Off Delay Time t_d(OFF) 28.7

Fall Time t_f 152.4

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage V_SD V_GS = 0 V,

I_S = 50 A

T_J = 25°C 0.81 1.2

V T_J = 125°C 0.7

Reverse Recovery Time t_RR

V_GS = 0 V, dIS/dt = 100 A/ms, I_S = 25 A

64.7

Charge Time t_a 33.4 ns

Discharge Time t_b 31.8

Reverse Recovery Charge Q_RR 99 nC

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

5. Switching characteristics are independent of operating junction temperatures.

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TYPICAL CHARACTERISTICS

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics V_DS, DRAIN−TO−SOURCE VOLTAGE (V) V_GS, GATE−TO−SOURCE VOLTAGE (V)

3.0 1.0

0 0 20 100

5 4

2 1

0

Figure 3. On−Resistance vs. Gate−to−Source Voltage

Figure 4. On−Resistance vs. Drain Current and Gate Voltage

V_GS, GATE VOLTAGE (V) I_D, DRAIN CURRENT (A)

9

6 7 10

5 3

0 6

70 50 30 3.0

3.5 6.0

2.0

0.8 1.2

ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)

, NORMALIZED DRAIN−TO− SOURCE RESISTANCE IDSS, LEAKAGE (nA)

3.4 V 3.2 V

V_DS = 10 V

T_J = 25°C

T_J = 125°C T_J = −55°C

4

I_D = 50 A T_J = 25°C

V_GS = 4.5 V T_J = 25°C

V_GS = 10 V

I_D = 50 A V_GS = 10 V

T_J = 85°C T_J = 125°C

3

2 8

1.0 1.4 1.6 10

120

10 3.8 V

2.0

0 40 100 80 140

20 120

12

2.0 2.2 60 80

2.5 5.0 2.5

3.6 V V_GS =

10 V to 4 V

40 140

60

130 150

90 110

0.5 1.5

4 8

4.0 4.5 5.5

1.8

T_J = 150°C 160

3.0 V

2.4

1.E+02 1.E+03 1.E+04 1.E+05

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Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge

V_DS, DRAIN−TO−SOURCE VOLTAGE (V) Q_g, TOTAL GATE CHARGE (nC)

100 10

0 1E+0

Figure 9. Resistive Switching Time Variation vs. Gate Resistance

Figure 10. Diode Forward Voltage vs. Current

R_G, GATE RESISTANCE (W) V_SD, SOURCE−TO−DRAIN VOLTAGE (V)

100 10

1 10 100 1000

0.9 0.8 0.7 0.6 0.4

0.3 1 10

C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V)

t, TIME (ns) IS, SOURCE CURRENT (A)

V_GS = 0 V T_J = 25°C f = 1 MHz C_iss C_oss

C_rss

Q_T

V_DS = 50 V I_D = 50 A V_GS = 4.5 V

t_d(on) t_r t_f

T_J = −55°C 1E+1

1E+2

0 1 6

0 8 24 48 72

T_J = 25°C V_DS = 50 V I_D = 50 A

100

32 1E+3

1E+4

3 4 5

2

Q_gs

Q_gd

t_d(off)

56

0.5

16 40 64

1.0 1.1

20 30 40 50 60 70 80 90

10

7 8 9

T_J = 25°C T_J = 125°C

Figure 11. Maximum Rated Forward Biased Safe Operating Area

V_DS, DRAIN−TO−SOURCE VOLTAGE (V) 100 10

1 0.1

0.01 0.1 1 10 100 1000

ID, DRAIN CURRENT (A)

V_GS≤ 10 V Single Pulse T_C = 25°C

R_DS(on) Limit Thermal Limit Package Limit

500 ms

1 ms 10 ms

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TYPICAL CHARACTERISTICS

Figure 12. G_FS vs. I_D I_D, DRAIN CURRENT (A)

120 80

20 0 0 20 60 80 100 140

PULSE TIME (sec) 0.01

0.001 1 10

0.0001

0.00001 0.1

0.000001 0.001

0.01 0.1 1 10 100 GFS, SMALL−SIGNAL FORWARD TRANSFER CONDUCTANCE (S)R(t) (°C/W)

100 1000

50% Duty Cycle 20%

10%

5%

2%

1%

Single Pulse NVMFS6B03NL, 650 mm², 2 oz, Cu Single Layer Pad

Figure 13. I_PEAK vs. T_AV T_AV, TIME IN AVALANCHE (sec)

10E−3 1E−3

0.1E−3 1 10 100

IPEAK, DRAIN CURRENT (A)

Figure 14. Thermal Response

40 60 100 140

40 120

100°C 25°C

DEVICE ORDERING INFORMATION

Device Marking Package Shipping^†

NVMFS6B03NLT1G 6B03NL DFN5

(Pb−Free)

1500 / Tape & Reel

NVMFS6B03NLWFT1G 6B03LW DFN5

(Pb−Free, Wettable Flanks)

1500 / Tape & Reel

NVMFS6B03NLT3G 6B03NL DFN5

(Pb−Free)

5000 / Tape & Reel

NVMFS6B03NLWFT3G 6B03LW DFN5

(Pb−Free, Wettable Flanks)

5000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

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M 3.00 3.40 q 0 _ −−− ^3.80¹²_ DFN5 5x6, 1.27P

(SO−8FL) CASE 488AA

ISSUE N

DATE 25 JUN 2018 SCALE 2:1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.

XXXXXX = Specific Device Code A = Assembly Location

Y = Year

W = Work Week

ZZ = Lot Traceability

1 2 3 4

TOP VIEW

SIDE VIEW

BOTTOM VIEW D1

E1 q

D

E 2

2 B A

0.20 C

2 X

DIM MIN NOM MILLIMETERS A 0.90 1.00 A1 0.00 −−−

b 0.33 0.41 c 0.23 0.28

D 5.15

D1 4.70 4.90 D2 3.80 4.00

E 6.15

E1 5.70 5.90 E2 3.45 3.65

e 1.27 BSC

G 0.51 0.575 K 1.20 1.35 L 0.51 0.575

L1 0.125 REF

A 0.10 C

0.10 C

DETAIL A

1 4

L1 e/2

8X

G D2 E2

K b

A 0.10 C B 0.05 c

L

DETAIL A c A1

4 X

C

SEATING PLANE

GENERIC MARKING DIAGRAM*

1

XXXXXX AYWZZ 1

MAX 1.10 0.05 0.51 0.33 5.10 4.20 6.10 3.85 0.71 1.50 0.71

STYLE 1:

PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN

M

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

1.270

2X

0.750 1.000 0.905

4.530 1.530

4.560 0.495

3.200

1.330

0.965

2X 2X

4X 4X PIN 5

(EXPOSED PAD)

STYLE 2:

PIN 1. ANODE 2. ANODE 3. ANODE 4. NO CONNECT 5. CATHODE

5.00 5.30

6.00 6.30

PITCH

DIMENSIONS: MILLIMETERS

1

RECOMMENDED e

2X

0.475

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking.

98AON14036D DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 DFN5 5x6, 1.27P (SO−8FL)

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products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may

NVMFS6B03NL Power MOSFET