二硫化モリブデン薄膜の新規成長プロセスとキャリ ア輸送特性

九州大学学術情報リポジトリ

Kyushu University Institutional Repository

二硫化モリブデン薄膜の新規成長プロセスとキャリ ア輸送特性

許, 時耐

https://doi.org/10.15017/1806980

出版情報：Kyushu University, 2016, 博士（工学）, 課程博士 バージョン：

権利関係：Fulltext available.

A novel growth process and transport properties of MoS

thin films

Sinae Heo

Kyushu University 2017

Table of contents

Chapter 1 Introduction...1

1.1 Architecture in electronics...1

1.2 Two-dimensional materials...2

1.2.1 Graphene...2

1.2.2 Transition metal dichalcogenide (TMDC)...3

1.3 Problems...5

1.3.1 Growth process...6

1.3.2 Transistor performance...8

1.4 Purposes and Strategies...9

1.4.1 Establishment of a novel growth process...10

1.4.2 Understanding between physical properties and transistor operation...12

1.5 Organization...12

References...14

Chapter 2 A novel growth process...20

2.1 MoO

deposition by thermal evaporator...21

2.2 First annealing for MoO

crystallization...24

2.3 Sulfurization...25

2.3.1 Experimental set up...25

2.3.2 Results and discussion...26

2.4 Post-annealing...30

2.5 Surface morphology...32

2.6 Conclusion...37

References...38

Chapter 3 Field effect transistor (FET) application of MoS

thin films...40

3.1 Principle of FET...40

3.1.1 Operation...40

3.1.2 Typical structures...44

3.2 Fabrication of FET with grown MoS

thin films...46

3.2.1 Structure...46

3.2.2 Problems in FET operation...49

3.3 Physical properties of MoS

thin films annealed with covering plate...54

3.3.1 Compositions...54

3.3.2 Crystallinities...58

3.4 FET Performances depending on post-annealing temperature...63

3.5 Suggestions for further work...67

3.6 Conclusion...70

References...71

Chapter 4 Summary and conclusion...76

Abbreviation………...78

Acknowledgment...80

1

Chapter 1 Introduction

1.1 Architecture in electronics

The modern electronics was birth from invention of transistor by John Bardeen, Walter Brattain and William Shockley at Bell Labs in December, 1947. The planar transistor is shown in Fig. 1.1(a). Since their invention, efforts for miniaturizing and improving their performance have been made continuously. This lead to the micro and nanoelectronics with silicon based integrated circuits, which contributed to the emergence of personal computer. Moreover, the number of transistors on a chip has doubled roughly every 18months (Moore’s law). However, silicon based planar transistors reached size and performance limitation because of short-channel effect. To solve this problem, FinFET (Fin Field Effect Transistor) was suggested as a structure of next generation for miniaturization and high performance. The distinguishing characteristic of the FinFET is that the conducting channel is wrapped by a thin silicon

"fin", which forms the body of the device as shown in Fig. 1.1(b). The thickness of the

fin (measured in the direction from source to drain) determines the effective channel

length of the device. The wrap-around gate structure provides a better electrical control

over the channel. It helps in reducing the leakage current and overcoming other

short-channel effects. However, rough surface of Si-channel in FinFET caused

degradation of device performance. Therefore, to overcome the current performance

limitations in silicon based transistors, alternatives are strongly required.

2

Figure 1.1. (a) Initial planner channel (b) ultrathin channel layer.

1.2 Two-dimensional materials

Two-dimensional (2D) materials, which have atomically thin thickness and flat surface, are strong candidates for avoiding limitations of miniaturization and device performance. The typical 2D materials will be introduced in next two sections in detail.

1.2.1 Graphene

Graphene is a thin layer of pure carbon; it is a single, tightly packed layer of

carbon atoms that are bonded together in a hexagonal honeycomb lattice. The graphene

was discovered in 2004 by the University of Manchester, Prof Andre Geim and Prof

Kostya Novoselov. This sparked a global explosion in graphene research. The

experimental isolation of single-layer graphene achieved access to a large amount of

interesting physics. Outstanding properties of graphene like ultimate tensile strength,

3

thin and light properties, flexibility and high conductivity allow various applications such as energy, membranes, composites and coatings. Moreover, graphene exhibits ambipolar field effect,

the quantum Hall effect at room temperature

and a high carrier mobility of up to 100000 cm

/V∙s at 240 K.

These properties generated huge interests in the possible implementation of graphene in countless devices. However, the lack of a band gap in the pristine material limits applications in electronics such as logic and display electronics. For example, graphene transistor showed poor on/off ratio due to the absence of a band gap.

To use graphene in electronics, many efforts have been made to open a band gap in graphene by employing graphene-CdTe quantum dot hybrid nanostructures, sandwich structures with Bi

Te

and nanostructuring.

However, problems from small band gap remains until now. Therefore, other 2D materials were considered instead of graphene.

1.2.2 Transition metal dichalcogenide (TMDC)

TMDCs are 2D materials, which have atomically thin thickness and flat surface.

One layer is composed of chacogen (X) – transition metal (M) – chacogen (X), giving

the stoichiometric MX

.

While the intralayer bonds are covalent, the interlayer bonds

between two MX

slabs are typically van der Waals bonds. The weak van der Waals

bonds enable to exfoliate 1-monolayer (1L) of TMDCs by mechanical exfoliation. In

addition, TMDC offers physical properties of wide range with the formula MX

, where

M is a transition metal element from group IV (Ti, Zr, Hf and so on), group V (for

instance V, Nb or Ta) or group VI (Mo, W and so on), and X is a chalcogen (S, Se or

4

Te). Several TMDC materials are listed in Table 1.1.

The considerable attention about TMDC materials, which are structurally stable and have band gap, were started from finding of unique properties of MoS

. In addition, MoS

is the most promising TMDC material as its elemental constituents are abundant, nontoxic, and amenable for easy mono/few layer(s) synthesis when compared to their analogous selenides and tellurides.

Because of these properties, MoS

has been a subject of great interests for several decades. Numerous worldwide studies have researched how to apply this promising material in next-generation electronic and optoelectronic devices such as resonators,

phototransistors,

chemical sensors,

Table 1.1. Electronic properties of several TMDC materials.

-S

-Se

-Te

Nb

Metal;

superconducting

Metal;

superconducting

Metal

Ta

Metal;

superconducting

Metal;

superconducting

Metal

Mo

Semiconducting 1L: 1.8 eV Bulk: 1.2 eV

Semiconducting 1L: 1.5 eV Bulk: 1.1 eV

Semiconducting 1L: 1.1 eV Bulk: 1.0 eV

W

Semiconducting 1L: 2.1 eV 1L: 1.9 eV Bulk: 1.4 eV

Semiconducting 1L: 1.7 eV Bulk: 1.2 eV

Semiconducting

1L: 1.1 eV

5

photodetectors,

amplifiers,

and batteries.

Specially, controllable valley polarization of MoS

layered material suggests its potential in valleytronic devices.

In addition, band gap of MoS

layered structure varies from 1.2 eV for indirect bandgap to 1.8 eV for direct bandgap. The tunable band gap, which indicate indirect band gap of 1.2 eV.

This unique property opens the possibility of incredible developments in optoelectronic devices. Furthermore, MoS

exhibits a high mobility of 30-60 cm

/V∙s

comparable to that of graphene nanoribbon.

These unique features make numerous important advancement in future semiconductor devices.

Since MoS

transistor has become an important issue in electronic and optoelectronic devices evolution, additional technique and knowledge is necessary for apply MoS

as realistic devices.

1.3 Problems

2D materials have been studied for decades. But, nanotechnology using TMDC

materials is a relatively new and exciting area with many promising applications in

nanoelectronics and optoelectronics. In particular, MoS

has been used to demonstrate

transistors with high on/off ratios and integrated circuits with logic operation, as well as

chemical and gas sensors. Although MoS

has considerable potential, the development

of emerging devices is still in embryonic stage. To realize applicable MoS

transistor in

actual industry, reliable production is essential for translating their new electronic and

optical properties into applications. Therefore, the patterning technique as well as high

quality of MoS

is needed. In addition, technique of thickness control is required to

apply unique property of MoS

, which is controllable band gap by tuning thickness of

6

MoS

. However, these requirements are not satisfied yet. The details of problems will be described in next two sections.

1.3.1 Growth process

Various attempts to form MoS

thin films with a few monolayers have been conducted. For instance, mechanical exfoliation,

intercalation assisted exfoliation,

liquid exfoliation,

physical vapor deposition,

chemical vapor deposition (CVD)

, hydrothermal synthesis,

and the thermolysis of a single precursor containing Mo and S

were reported. Among these many approaches, mechanical exfoliation,

and CVD

are widely employed for MoS

thin films.

Since Geim and Novoselov who were belonging to University of Manchester, UK won a Nobel Prize in Physics for isolating 1-carbon atom thick graphene sheets in 2004, mechanical exfoliation has been expanded to other 2D materials like MoS

, which have weak van der Waals bonds. This method produces single-crystal flakes of high purity and cleanliness those are suitable for fundamental characterization and for fabrication of individual devices. But, this method is not scalable and does not allow systematic control of flake thickness and size. Furthermore, physical properties of MoS

easily changed by procedure of mechanical exfoliation revealed that mechanical exfoliation is not suitable for actual application. Meanwhile, CVD process, which was initially invented for polymer coating, has been applied to growth of 2D materials. Schematic illustration of conventional CVD process for MoS

thin films is shown in Figure 1.2.

Sublimated sulfur atoms (S) and molybdenum trioxide atoms (MoO

) are reacted and

transferred by carrier gas. Then, MoS

thin films are grown directly on substrates. The

7

reaction between MoO

and S is given in equation (1.1).

2MoO

+ 7S → 2MoS

+ 3SO

(1.1) A possible stepwise process for the reaction of MoO

with S is given in equations (1.2) and (1.3).

MoO

+

S → MoO

+

SO

(1.2) MoO

+

S → MoS

+

S

(1.3) This method has merit for high reproducibility. However, thickness and location control are impossible because MoS

thin films are grown directly on substrates.

Although these methods are available for fundamental studies, neither can

realize the thickness control and location control, which are required for practical

applications. Therefore, there is a need to establish a novel process for thickness and

location control.

8

1.3.2 Transistor performance

To improve MoS

-based FET performance, various researches like contact engineering,

dielectric formation

and doping

have been carried out. The low transistor performance is sometimes originated from high contact resistance. For example, low work function metal scandium (Sc) as contact metal realized a low contact resistance and high carrier injection n-type MoS

-based FET.

Although many metals were attempted as metal contact for low resistance, to date, no appropriate contact metal can form ohmic contact with MoS

, resulting in the formation of Schottky barrier at MoS

-metal interface.

Meanwhile, formation of gate dielectric material with high dielectric constant (k), which is called as high-k, is also important to achieve high-performance MoS

-based FETs.

Generally, considering the uniformity and controllable thickness of the material to deposit, atomic layer deposition (ALD) technique is used.

ALD technique is an effective method to deposit high-k gate dielectric. Dubey

et al. fabricated the MoS

FET with a high-k Al

O

dielectric. Then, mobilities of

6.0-16.1 cm

/Vs were obtained.

As another approach to achieve high-performance

MoS

-based FETs, appropriate doping is effective. For example, n-type doping using

polyethyleneimine (PEI) molecules on multi-layer MoS

-based FET decreased contact

resistance.

In addition, doping of cesium carbonate (Cs

CO

) resulted in stable n-type

doping and largely enhance the electron concentration in monolayer MoS

. However,

these methods are difficult and complicated for realistic application. The most effective

and important thing for transistor operation is quality of MoS

. If grown MoS

has poor

quality, additional treatments for improvement of device performance is useless.

9

Therefore, relation between transistor operation and physical properties should be understood.

As mentioned in section 1.3.1, thickness and location control are necessary for MoS

actual application. Therefore, a large number of processes have been developed for thickness and location control of MoS

. In addition, transistor performance has been investigated with a developed process. Park et al. reported position controllable process with desired thickness using ceramic shadow mask in 2014.

They introduced ceramic mask during CVD process for patterning. Grown single-layer MoS

with ceramic mask showed clearly patterned MoS

. This study was worth in fact that patterned MoS

is grown. Furthermore, uniformly patterned MoS

over entire substrate was working as transistor channels. But, use of expensive ceramic mask, which is necessary for patterning, limited actual application. Meanwhile, another process using seed to control position was established by Han et al.

The transistor, which is fabricated with grown MoS

from MoO

seed, showed the mobilities ranging from 8.2 cm

/V∙s to 11.4 cm

/V∙s. These values were comparable to that of exfoliated MoS

.

However, position of MoS

was not well controlled because MoS

was grown larger than seed with various shape. Thus, fabrication of patterned MoS

transistor is still challenging.

1.4 Purposes and Strategies

The purpose of this study is to achieve MoS

FET with a location controllable

novel method. For this purpose, two strategies are considered. These strategies are

10

discussed in Sec. 1.4.1 and Sec. 1.4.2.

1.4.1 Establishment of a novel growth process

To achieve patterned MoS

, a novel growth process is considered.

Conventional CVD process has used MoO

powder and S powder as precursors. These precursors are evaporated by heating and react as vapor to vapor phase. The MoS

is grown directly on substrate through vapor to vapor reaction. Therefore, it is difficult to control thickness and location.

My approach is to use MoO

thin films as a precursor. MoO

thin films react with S of vapor phase, which is evaporated by heating. It means that MoO

thin films and S react as solid to vapor phase. Furthermore, MoO

thin films having layered structure maybe helpful for development of 2D materials. Structure of MoO

and MoS

is shown in Figure 1.3. The concept of my approach is shown in Figure 1.4. The MoO

Figure 1.3. Layered structure of (a) MoO₃ and (b) MoS₂.

11

Figure 1.4. Concept of a novel growth process using MoO₃ thin films as a precursor.

thin films will be deposited from MoO

powder with shadow mask. This patterned MoO

thin films enable to grow patterned MoS

thin films.

The use of MoO

thin films has advantages in possibility of thickness and position control because MoO

decides MoS

thickness and position. For example, MoS

film formed from MoO

film with thickness of 3 nm may have thickness of 3 nm.

In addition, pre-patterned MoO

thin films by shadow mask probably produce patterned MoS

.

Previously, the method using MoO

sulfurization was reported by Lin et al. in 2012.

This method is composed of MoO

deposition, reduction of MoO

with an Ar-H

mixture (flow rate 4:1) and sulfurization. Although, this method used MoO

thin films as a precursor, no relation between MoO

thin films and resultant thickness of MoS

showed. In addition, MoO

thickness below 2.2 nm caused isolated domains of MoS

. Thus, MoS

thickness was not controlled by changing MoO

thin films thickness.

Although MoO

thin films have potential for thickness and position control,

detailed study of MoS

growth using MoO

thin films was not conducted. Therefore, a

novel growth process using MoO

thin films has to be explored by careful

understanding of MoS

growth.

12

1.4.2 Understanding between physical properties and transistor operation

To obtain high performance transistor, various factors like contact resistance, insulator and film quality should be considered. Among these parameters, which affect to transistor performance, quality of film has to be investigated at first because physical properties of film like composition and crystallinity have a decisive effect to determine transistor properties such as transistor types, mobility and on/off ratio. Furthermore, because transistor performance is very sensitive on quality of channel layers, grown thin films must be well investigated for MoS

transistor operation.

Thus, as a second strategy, physical properties of grown thin films at various conditions are investigated instead of studying contact resistance, insulator or doping.

Then, transistor performances fabricated from several thin films are explored. The extracted effect of compositions and crystallinities on transistor performance may help to obtain high performance MoS

through accurate understanding between physical properties of grown thin films and transistor performance.

1.5 Organization

This dissertation includes four chapters. Chapter 1 describes general introduction including background, problems, purposes and strategies for this work.

Chapter 2 introduces a novel growth process with detailed explanation of respective

steps. Chapter 3 indicates FET performance, which is fabricated with grown thin films

by a novel growth process. In addition, relation between physical properties and

13

transistor performance of grown thin films is demonstrated. Finally, chapter 4

summarizes this dissertation.

14

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Chapter 2 A novel growth process

A novel growth process is established using MoO

thin films as a precursor.

The process consists of four steps: MoO

thermal evaporation, first annealing for crystallization, sulfurization and post-annealing. The main advantage of this process is originated from the first MoO

deposition step. The use of metal shadow mask at first deposition step enabled us to pattern MoS

thin films. In addition, changeable initial thickness of MoO

thin films proposes possibility of MoS

thickness control with high

Figure 2.1. Growth scheme of the MoS₂ film.

21

uniformity. The crystalline structures, surface morphologies and chemical states at each step were characterized by X-ray diffraction (XRD), atomic force microscopy (AFM), Raman spectroscopy, and X-ray photoelectron spectroscopy (XPS). Based on these characterizations and a careful optimization of the growth conditions, we successfully established a novel growth process. The established growth process is outlined in Figure 2.1. In this chapter, the each process is explained.

2.1 MoO

deposition by thermal evaporator

Before starting the experiments, substrate was considered. The substrate for experiment should be useful for device fabrication. In addition, commercialized substrate is needed because rare substrate interrupts progress of experiment. Over several decades, silicon dioxide (SiO

), which is a typical inorganic gate insulator, has been intensively studied for application in TFTs because Si/SiO

can be easily used as bottom gate and insulator. Consequently, it has been successfully commercialized in devices. Therefore, Si/SiO

was used as substrate in this study. MoO

powders, which were purchased from sigma-aldrich, were used as sources. 3 nm MoO

thin films were deposited by thermal evaporator with rate of 0.1 Å/s for 5 minutes on Si/SiO

substrate.

As-deposited MoO

thin films showed flat surface as shown in Figure 2.2(a). The

crystallinity of as-deposited thin films was characterized by XRD. The substrate peak

was detected at 32.8 ° as shown in Figure 2.2(b). No diffraction peak was observed in

deposited thin films, indicating amorphous.

22

Figure 2.2. (a) AFM image and (b) XRD result measured in as-deposited MoO₃ thin films.

As a next step, to investigate composition of as-deposited MoO

thin films, X-ray photoelectron spectroscopy (XPS) was measured. Take-off angles (TOA) were changed to control the detection depth in a sample. It makes possible to explore distribution of compositions. In order to survey compositions depending on change of depth in deposited MoO

thin films, Mo 3d and O 1s spectra were measured at TOA of 25 ° (surface sensitive angle) and 55 ° (bulk sensitive angle). The results are shown in Figure 2.3. The peaks were observed at 232.7 eV for 3d

, 235.7 eV for 3d

in Mo 3d spectrum of TOA=25 ° and at 232.6 eV, 235.7 eV in Mo 3d spectrum of TOA=55 °.

These peaks are originated from MoO

.

To analyze composition more carefully, O 1s

spectra were also characterized as shown in Figures 2.3(c) and (d). The peaks in O 1s

spectra showed 2 peaks at 531 eV, 532.8 eV in TOA = 25 ° and 531.1 eV, 533.1 eV at

TOA = 55 °. These peaks were assigned to O-Mo bond and O-Si bond attributed from

MoO

and SiO

, respectively.

Amount of Mo and O are judged with rate of 1:2.3 and

1:2.7 (Mo:O) at surface sensitive angle and bulk sensitive angle, respectively. This

explained that deposited MoO

thin films have nonstoichiometric composition.

23

Furthermore, a large amount of O-deficiency was observed in surface compared with bottom side. Thus, deposited MoO

thin films were characterized by XRD and XPS to investigate crystallinity and composition. The results demonstrated that amorphous MoO

thin films were grown with a large amount of O-deficiency.

However, MoS

thin films sulfureted from amorphous MoO

was amorphous as shown in Figure 2.4(a) and (b), labeled as ‘without’. To obtain crystalline MoO

of layered structure, which may be helpful for growing crystalline MoS

, first annealing was carried out. In addition, O-deficiency should be avoided during the first-annealing.

Figure 2.3. XPS spectra showing chemical states of Mo and O in deposited thin films from MoO₃ powder.

Chemical states of Mo at (a) surface sensitive angle (b) bulk sensitive angle and chemical states of O at (c) surface sensitive angle (d) bulk sensitive angle.

24

2.2 First annealing for MoO

crystallization

The first annealing was carried out under the oxygen atmosphere to obtain crystalline thin films with suppression of O-deficiency. The first annealing temperature (T

) was varied from 300 °C to 400 °C. The crystallinities of annealed MoO

thin films were investigated by XRD. The films annealed at 300 °C showed no diffraction peak, while a T

above 350 °C yielded periodic peaks that appeared at 12.6 °, 25.6 ° and 38.8 °, which are assigned to the (020), (040) and (060) planes,

respectively, as shown in Figure 2.4(a). These experimental results demonstrated that the first annealing above 350 °C is effective for crystallization of MoO

. Then, the annealed films moved to sulfurization step for formation of crystalline MoS

.

Figure 2.4. XRD patterns of the (a) MoO₃ thin films and (b) resultant MoS₂ thin films. The annealing temperature (T_FA) ranged from 300 °C to 400 °C. The weak and broad peak around 14.1 ° is evidence of

the MoS₂ film growth.

25

2.3 Sulfurization

2.3.1 Experimental set up

The MoO

thin films with and without first annealing needed sulfurization process for growing MoS

thin films. In the sulfurization step, to promote the reaction between MoO

thin films and S of vapor phase, sulfurization temperature (T

) should preferably be as high as possible. But desorption of MoO

thin films was observed above 500 °C. Therefore, T

was fixed at 500 °C.

On the other hand, S powders were sublimated around 113 °C. Because sublimation temperature was quite different between MoO

and S, generally, two furnaces are used for sulfurization of MoO

and S as shown in Figure 2.5(a). However, temperature control was difficult because too high temperature caused too fast sublimation. In addition, large distance between furnaces leads to adsorption of S to quartz tube before S atoms reach to MoO

.

Therefore, original CVD set up was designed as seen in Figure 2.5(b). In

original CVD set up, temperature was increased to 500 °C at left side. After reaching

temperature to 500 °C, Furnace was slid to left side. Then, S powders were explosively

sublimated and reacted with MoO

. Thus, sulfurization step was carried out with

original CVD set up.

26

Figure 2.5. (a) General CVD set up and (b) original CVD set up for sulfurization.

2.3.2 Results and discussion

MoO

thin films were sulfurated with original CVD set up as mentioned above in Sec.2.3.1. XRD patterns of the sulfurated thin films are shown in Figure 2.4(b). No diffraction peak was observed in samples annealed at T

below 350 °C. Meanwhile, a diffraction peak was detected at samples annealed above 350 °C. The peak at 14.1 ° was assigned as the (002) plane of MoS

.

Furthermore, the crystallinity of MoS

thin films depended on the crystallinity of MoO

thin films. Thus, the crystalline MoO

precursor film was needed to produce the crystalline MoS

films. Because the most intensive diffraction peak was produced, T

was optimized at 400 °C for the following process.

Sulfurated thin films were also characterized by Raman spectroscopy to

27

Figure 2.6. Raman spectra obtained from the sulfurated films, showing E¹_2g and A_1g modes to prove the formation of MoS₂.

confirm the formation of MoS

. Figure 2.6 shows Raman spectra, in which two peaks around 381 cm

and 406 cm

can be seen. These are the in-plane vibrational E

mode and the out-of-plane vibrational A

mode, respectively.

These peaks provide clear evidence of MoS

formation. Here, Raman peaks were observed even in films annealed at a T

of 300 °C, although no XRD peak was observed, indicating that a T

of 300 °C produced MoS

, but the structure was amorphous.

Figure 2.7. XPS spectra of (a) Mo 3d and (b) S 2p obtained from MoS₂ bulk crystal.

28

The composition of sulfurated films was investigated by XPS. For accurate analysis, bulk MoS

crystal was measured with XPS at first. The results of XPS at bulk MoS

crystal are shown in Figure 2.7(a) and (b). The observed peaks at 226.30 eV, 229.12 eV, 232.28 eV are assigned to S 2s, Mo 3d

, Mo 3d

.

The S 2p spectrum showed peaks at 161.83 eV for S 2p

and 163 eV for S 2p

.

Figure 2.8. XPS spectra of (a) Mo 3d, (b) S 2p measured at TOA=25 ° and(c) Mo 3d, (d) S 2p at TOA=55 ° obtained from sulfurated thin films.

29

The chemical states of the sulfurated films at T

= 400 °C were examined by XPS. Figure 2.8(a) and (b) show Mo 3d and S 2p core spectra measured at TOA = 25 °, respectively. The observed peaks were calibrated with the C 1s line (284.6 eV). The Mo 3d spectrum can be divided into two components, namely, 228.75 eV for Mo 3d

and 231.95 eV for Mo 3d

. Another peak at 226.47 eV is from the S 2s core level. These spectra proved that molybdenum atoms were in the Mo

oxidation state to form MoS

. Here, we need to take into account the fact that MoS

also yields a similar state and it is hard to distinguish the origin of peaks because both states appear at the same bonding energies.

A consistent tendency can be seen in the S 2p spectra in Figure 2.8(b). The spectra at 161.93 and 163.05 eV can be attributed to the S 2p

and S 2p

states of MoS

and MoS

. However, a careful analysis revealed that additional peaks appeared in higher bonding energy range at 163.69 eV and 164.96 eV. The respective peaks can be assigned to the S 2p

and S 2p

states of MoS

, providing clear evidence of MoS

formation.

In the viewpoint of the charge state, MoS

has a charge state of Mo

(S

)

(S

)

.

It means that the S 2p spectrum have two doublets from S

and S

.

The higher binding energy may be attributed to bridging S

ligands. The doublets with the lower energy might be attributed to terminal S

and/or S

. Because different kinds of sulfur ligands have similar binding energies in XPS, it is not possible to quantify the ratio of these sulfur ligands.

Therefore, the ratio of MoS

in grown thin film cannot be estimated.

Figure 2.8(c) and (d) show Mo 3d and S 2p spectrum measured at TOA = 55 °.

The results were similar with spectra measured at TOA = 25 °, explaining presence of

MoS

in grown thin films. The area of observed peaks at higher binding energy, which

are originated from MoS

, was decreased compared with those of TOA = 25 °,

30

demonstrating MoS

existed mainly in surface of thin films.

Based on these results, we concluded that the sulfurization process produced mixed films of MoS

and MoS

. Therefore, post-annealing was needed to obtain MoS

thin films without MoS

.

2.4 Post-annealing

Sulfurated thin films were post-annealed in an Ar atmosphere. The higher post-annealing temperature (T

) than T

of 500 °C was needed to obtain a single component MoS

thin film. However, T

of 700 °C led to desorption of thin films.

Therefore, sulfurated thin films were post-annealed at 600 °C. After the post-annealing, XPS was measured to explore that MoS

is removed or not.

Figures 2.9(a) and (b) show Mo 3d and S 2p spectra measured at surface sensitive TOA = 25 °. In Figure 2.9(a), the XPS spectra obtained from Mo 3d fitted similarly to that in Figure 2.8(a). The observed peaks at 226.35eV, 229.16 eV, 232.28 eV were assigned to S 2s, Mo 3d

, Mo 3d

, respectively. Meanwhile, those from S 2p in Figure 2.9(b) were obviously affected by the post-annealing; the spectra were well fitted by just a single component peak with binding energies of 161.96 eV for S 2p

and 163.17 eV for S 2p

, which reveal that MoS

was formed. No peak from MoS

was detected in the post-annealed thin films.

Figure 2.9(c) and (d) show Mo 3d and S 2p spectra measured at TOA = 55 °.

The peaks are detected at 226.40 eV for S 2s, 229.16 eV for Mo 3d

and 232.22 eV for

31

Figure 2.9. XPS spectra of (a) Mo 3d, (b) S 2p measured at TOA=25 ° and(c) Mo 3d, (d) S 2p at TOA=55 ° obtained after the post-annealing

Mo 3d

. The S 2p spectrum showed clear 2 peaks, which are attributed from a single

component. The observed 2 peaks at 161.83 eV and 163 eV explained that a single

component MoS

is grown. Thus, the XPS spectra measured at TOA = 25 ° and 55 °

explained that MoS

was removed over the all films by post-annealing. These results

demonstrated that MoS

thin films were successfully grown from the MoO

precursors

with a four-step CVD method.

32

2.5 Surface morphology

To establish a novel process for MoS

growth, various properties should be considered. The crystallinities and compositions were previously investigated by XRD and XPS, respectively. However, surface morphologies were not surveyed although surface morphology is important in device fabrication. Therefore, grown thin films were characterized by AFM for investigating surface morphology of MoS

thin films.

Figure 2.10 shows an AFM image of grown MoS

thin films on the Si/SiO

substrates. An AFM image indicated a discontinuous structure with large numbers of cracks. To investigate step, which caused large numbers of cracks, we checked surface morphology of annealed MoO

thin films.

The surface morphology of MoO

thin films annealed at 400 °C for 2 hours is shown in Figure 2.11(a). The result indicated similar surface morphology with grown MoS

thin films, showing large number of crack. This demonstrates that surface morphology of grown MoS

thin films depends on surface morphology of MoO

thin films. To improve surface morphology, the as-deposited MoO

films were annealed at

Figure 2.10. AFM image of the MoS₂ thin films grown on Si/SiO₂.

33

Figure 2.11. AFM image of the MoO₃ thin films after first annealing at (a) 400 °C (b) 350 °C and (c) 325 °C for 2 hours on Si/SiO₂.

34

lower T

than 400 °C. Figures 2.11(b) and (c) indicate surface morphologies of MoO

thin films, which were annealed at 350 °C and 325 °C for 2 hours. The small holes were obtained in MoO

thin films annealed at 350 °C, indicating a discontinuous structure.

Meanwhile, MoO

thin films annealed at 325 °C revealed continuous MoO

thin films.

Thus, MoS

thin films at T

= 325 °C satisfied the requirement of smooth morphology.

Therefore, we conclude that the T

of 325 °C is more appropriate than T

of 400 °C for growing MoS

in terms of surface morphology.

However, here, we should consider crystallinity as well as surface morphology of grown MoS

because crystallinity is also important factor to obtain high performance transistor. Furthermore, as mentioned in Sec. 2.3, because low first annealing temperature caused low crystallinity MoS

thin films, crystallinity at T

= 325 °C should be investigated. For example, the MoS

sample at T

= 350 °C showed lower crystallinity than sample at T

= 400 °C as shown in Figure 2.5. Moreover, T

= 300 °C caused amorphous MoS

thin films. Therefore, the crystallinities of MoO

and MoS

at T

= 325 °C are investigated by XRD. As shown in Figure 2.12(a),

MoO

thin films was crystallized at T

= 325 °C. However, crystallinity of MoO

at

T

= 325 °C was much lower than those of at T

= 400 °C. In addition, grown MoS

thin films from MoO

at T

= 325 °C indicated decreased crystallinity compared with

those at T

= 400 °C as shown in Figure 2.12(b). It means that grown thin films at T

of 325 °C is not appropriate as channel layers in terms of crystallinity although smooth

surface was obtained.

35

Figure 2.12. XRD results of (a)MoO₃ thin films at T_FA = 325 °C, 400 °C and (b)subsequently grown MoS₂.

Thus, two requirements of smooth surface morphology and high crystallinity were not satisfied by changing first annealing temperature. Therefore, to satisfy two requirements at same time, additional method was considered to improve crystallinity of grown MoS

thin films. At this time, first annealing temperature was kept at T

= 325 °C, which shows smooth surface morphology.

Because cracks are caused by difference of thermal expansion coefficient, the

problem is expected as difference of thermal expansion coefficient between substrate

and MoO

. As a method to improve the crystallinity with fixed T

of 325 °C, change of

substrate was considered. Among a large number of substrates, sapphire substrate has

closer thermal expansion coefficient (4.5×10

/K) with that of MoO

(9×10

/K) than

SiO

(5×10

/K). Moreover, c-plane sapphire substrate shares some symmetry with the

MoS

structure.

It has been shown previously that under similar conditions, the use of

an sapphire substrate led to significantly better quality of MoS

.

Therefore, sapphire

substrate with an atomically flat surface was explored instead of Si/SiO

substrate.

36

Figure 2.13. (a) XRD patterns of the MoS₂ films grown on the Si/SiO₂ (black line) and sapphire (red line) substrates. The inset shows rocking curves on the respective substrates.

Figure 2.13(a) showed XRD results, which were measured in grown MoS

thin films on Si/SiO

and c-plan sapphire substrates. The weak diffraction peak at 13.9 ° observed on the Si/SiO

substrate was much larger than on the sapphire. Furthermore, grown MoS

thin films on sapphire substrate showed sharp peak in the rocking curve with a full-width at half-maximum (FWHM) of 0.11 °. This is clear proof of a high orientation along the c-axis as indicated in Figure 2.13(a) inset; two-dimensional MoS

atomic layers were parallel to the sapphire substrate. Meanwhile, the rocking curve obtained from the Si/SiO

substrate showed no signal. I suggest the film on the Si/SiO

substrate had a polycrystalline and/or amorphous structure with a marginal c-axis orientation.

These results explain that sapphire substrate improved the crystallinity of the MoS

films. In addition, the AFM image in Figure 2.13(b) shows the surface morphology of a

MoS

film grown on a sapphire substrate. The resultant film had a continuous and flat

structure with root-mean-square surface roughness of 0.3 nm. Such a continuous and

37

flat surface was observed over the complete substrate. The inset is a photograph of thus prepared MoS

film. The method ensures full coverage of the centimeter-square surface.

2.6 Conclusion

In conclusion, a multi-step CVD process was established for growing highly oriented MoS

films. The first step consisting of MoO

thermal evaporation was essential for obtaining controllability and uniformity of the thickness, and for location control of MoS

. The second step, consisting of thermal annealing in oxygen, produced crystalline MoO

thin films with a layered structure, which were strongly required for the subsequent third step of sulfurization. Although the films after the sulfurization process consisted of a polycrystalline and amorphous mixture of MoS

and MoS

, the fourth step, namely the post-annealing in Ar, yielded single-component layered MoS

films. Other important requirements are smooth surface morphology and high

crystallinity for high performance transistor, which will discuss in next chapter. For

these purposes, first annealing temperature and substrate are carefully investigated. A

continuous structure, flat surface, excellent thickness uniformity and high c-axis

orientation of the MoS

films were achieved on a centimeter square c-plan sapphire

substrate. Importantly, I would like to emphasize that position-selective film growth is

available by using shadow masks in the first deposition process. This advantage opens

the possibility of producing functional devices with simple techniques.

38

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40

Chapter 3 Field effect transistor (FET) application of MoS ₂ thin films

MoS

transistors were fabricated with thin films grown by a multi-step CVD process. I found that the MoS

transistor properties were greatly affected by the post-annealing temperature (T

). The films worked as ambipolar transistors below T

=1000 °C. Meanwhile, the transistor operation transited from ambipolar to n-type transport at a T

of 1000 °C. X-ray photoelectron spectroscopy (XPS) measurements revealed that the films annealed below 1000 °C had sulfur-rich compositions (S/Mo > 2).

The excess S atoms were reduced by elevating the annealing temperature to produce almost stoichiometric composition (S/Mo = 2) at 1000 °C. These results indicate that excess sulfurs are responsible for the ambipolar operation by acting as acceptors that generate holes. Moreover, the high-temperature annealing at 1000 °C had another distinct effect, i.e., it improved the crystallinity of the MoS

films. The electron mobility consequently reached 0.20±0.12 cm

/V∙s.

3.1 Principle of FET

3.1.1 Operation

General thin film transistor consists of semiconductor layer and three

electrodes (source, drain and gate). One of the three electrodes is separated from the

41

semiconductor by a thin gate-insulator (gate electrode). The semiconductor between the source and the drain below the gate electrode forms the channel, defined by the channel width (W) and the channel length (L). The source to drain current flows via a conducting channel. At this time, kind of charge carriers, which flow between source and drain, is determined by material (P-type or N-type semiconductor). In P-type material, electric charges are carried mainly in the form of electron deficiencies called holes. In N-type material, the charge carriers are primarily electrons. This flowing current is controlled by electric field that is produced when a voltage is applied between the gate and source terminals. The schematic illustration of the N-type transistor is shown in Figure 3.1.

The operation of an N-type transistor can be described as follows. For example, n-type material, the minimum gate to source voltage differential, which is needed to create a conducting path, is defined as threshold voltage (V

). When gate-source voltage (V

) ≤ V

, current nearly not flows through source to drain. In this region,

"off" current is extracted, which needs for calculation of on/off ratio.

When V

is higher than V

with positive voltage drain-source voltage (V

), electrons from source region enter the channel and reach the drain. If V

is increased, current flowing through the channel is increased. In this region, plot of drain-source current (I

) versus V

is a straight line as shown in Figure 3.1(a). Here, the slope of I

versus V

line is the conductance of the channel. To control applied V

changes its n-type charge concentration. Therefore, change of V

affects to conductance, which extracts from the slope of I

versus V

line. In this region, drain current in given by the following equation.

I

= ((W∙C

∙μ)/2L) (V

-V

)

(3.1)

42

Here, C

is the capacitance of the gate insulator per unit area.

The above explanation is applicable in small values of V

. However, for a given V

> V

, if V

is increased, resistance is increased. Therefore, curve of I

versus V

starts to roll over.

At values of V

= V

- V

, width of the channel approaches zero near the drain (channel is pinched off) as shown in Figure 3.1(b). The current through the channel remains constant at the value reached when V

= V

- V

. So when the channel is pinched off, I

only depends on V

. The saturated current at certain V

is used as "on" current for extraction of on/off ratio.

In summary, a FET can operate in three regions.

1) Cut-off region in which no channel exists (V

≤ V

for N-type) and I

= 0 for any V

.

2) Linear region in which the channel is formed and not pinched off (V

> V

and V

≤ V

- V

for N-type) and FET behaves as a "voltage-controlled" resistor as shown in Figure 3.1(a).

3) Saturation region in which the channel is pinched off (V

> V

and V

> V

- V

for N-type) and I

does not change with V

as shown in Figure 3.1(b).