Designed for general−purpose amplifiers and switching applications, where the mounting surface of the device is required to be electrically isolated from the heatsink or chassis.

(1)

MJF6668 (PNP)

Complementary Power Darlingtons

For Isolated Package Applications

Designed for general−purpose amplifiers and switching applications, where the mounting surface of the device is required to be electrically isolated from the heatsink or chassis.

Features

• Isolated Overmold Package

• Electrically Similar to the Popular 2N6388, 2N6668, TIP102, and TIP107

• No Isolating Washers Required, Reduced System Cost

• High DC Current Gain

• High Isolation Voltage

• UL Recognized at 3500 VRMS: File #E69369

• These Devices are Pb−Free and are RoHS Compliant*

MAXIMUM RATINGS

Rating Symbol Value Unit

Collector−Emitter Voltage V_CEO 100 Vdc

Collector−Base Voltage V_CB 100 Vdc

Emitter−Base Voltage V_EB 5.0 Vdc

RMS Isolation Voltage (Note 1) (t = 0.3 sec, R.H. ≤ 30%, T_A = 25_C) Per Figure 14

V_ISOL

4500 V

Collector Current − Continuous I_C 10 Adc

Collector Current − Peak (Note 2) I_CM 15 Adc

Base Current − Continuous I_B 1.0 Adc

Total Power Dissipation (Note 3)

@ T_C = 25_C Derate above 25_C

P_D

40 0.31

W W/_C Total Power Dissipation

@ T_A = 25_C Derate above 25_C

P_D

2.0 0.016

W W/_C Operating and Storage Temperature Range T_J, T_stg –65 to +150 _C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Proper strike and creepage distance must be provided.

2. Pulse Test: Pulse Width = 5.0 ms, Duty Cycle ≤ 10%.

3. Measurement made with thermocouple contacting the bottom insulated surface (in a location beneath the die), the devices mounted on a heatsink with thermal grease and a mounting torque of ≥ 6 in. lbs.

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

THERMAL CHARACTERISTICS

ÎÎÎÎÎÎÎÎÎÎÎÎÎ

Characteristic ^ÎÎÎ

ÎÎÎ

Symbol^ÎÎÎ

ÎÎÎ

Max^ÎÎÎ

ÎÎÎ

Unit

Thermal Resistance, Junction−to−Case (Note 4) ÎÎÎ ÎÎÎ

R_q_JCÎÎÎ

ÎÎÎ

4.0ÎÎÎ

ÎÎÎ

_C/W

Thermal Resistance, Junction−to−Ambient

ÎÎÎ

R_qJA

ÎÎÎ

62.5

ÎÎÎ

_C/W

Lead Temperature for Soldering Purposes

ÎÎÎ

T_L

ÎÎÎ

260

ÎÎÎ

_C 4. Measurement made with thermocouple contacting the bottom insulated

surface (in a location beneath the die), the devices mounted on a heatsink with thermal grease and a mounting torque of ≥ 6 in. lbs.

Device Package Shipping

ORDERING INFORMATION TO−220 FULLPACK

CASE 221D STYLE 2 UL RECOGNIZED

3 1

COMPLEMENTARY SILICON POWER DARLINGTONS

10 AMPERES 100 VOLTS, 40 WATTS

2

http://onsemi.com

MJF6668G 50 Units/Rail

MJF6388G TO−220 FULLPACK (Pb−Free)

50 Units/Rail MJF6xy8 = Specific Device

Code x = 3 or 6 y = 6 or 8

G = Pb−Free Package

A = Assembly Location

Y = Year

WW = Work Week

MARKING DIAGRAM

TO−220 FULLPACK (Pb−Free)

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

COLLECTOR 2 BASE

1

EMITTER 3 COLLECTOR 2

BASE 1

EMITTER 3

MJF6388 (NPN) MJF6668 (PNP)

MJF6xy8G AYWW

(2)

ELECTRICAL CHARACTERISTICS (T_C= 25_C unless otherwise noted)

Characteristic Symbol Min Max Unit

OFF CHARACTERISTICS

Collector−Emitter Sustaining Voltage (Note 5) (I_C = 30 mAdc, I_B = 0)

V_CEO(sus)

100 −

Vdc Collector Cutoff Current

(V_CE = 80 Vdc, I_B = 0)

I_CEO

− 10 mAdc

Collector Cutoff Current

(V_CE = 100 Vdc, V_EB(off) = 1.5 Vdc)

(V_CE = 100 Vdc, V_EB(off) = 1.5 Vdc, T_C= 125_C)

I_CEX

−

10

3.0 mAdc

mAdc Collector Cutoff Current

(V_CB = 100 Vdc, I_E = 0)

I_CBO

− 10 mAdc

Emitter Cutoff Current (V_BE = 5.0 Vdc, I_C = 0)

I_EBO

− 2.0

mAdc ON CHARACTERISTICS (Note 5)

DC Current Gain

(I_C = 3.0 Adc, V_CE = 4.0 Vdc) (I_C = 5.0 Adc, V_CE = 3.0 Vdc) (I_C = 8.0 Adc, V_CE = 4.0 Vdc) (I_C = 10 Adc, V_CE = 3.0 Vdc)

h_FE

3000 1000 200 100

15000

−

Collector−Emitter Saturation Voltage (I_C = 3.0 Adc, I_B = 6.0 mAdc) (I_C = 5.0 Adc, I_B = 0.01 Adc) (I_C = 8.0 Adc, I_B = 80 mAdc) (I_C = 10 Adc, I_B = 0.1 Adc)

V_CE(sat)

−

2.0 2.0 2.5 3.0

Vdc

Base−Emitter Saturation Voltage (I_C = 5.0 Adc, I_B = 0.01 Adc) (I_C = 10 Adc, I_B = 0.1 Adc)

V_BE(sat)

−

2.8 4.5

Vdc

Base−Emitter On Voltage (I_C = 8.0 Adc, V_CE = 4.0 Vdc)

V_BE(on)

− 2.5

Vdc DYNAMIC CHARACTERISTICS

Small−Signal Current Gain

(I_C = 1.0 Adc, V_CE = 5.0 Vdc, f_test = 1.0 MHz)

|h_fe|

20 −

− Output Capacitance

(V_CB = 10 Vdc, I_E = 0, f = 1.0 MHz) MJF6388

MJF6668

C_ob

−

200 300

pF

Insulation Capacitance

(Collector−to−External Heatsink)

C_c−hs

− 3.0 Typ

pF Small−Signal Current Gain

(I_C = 1.0 Adc, V_CE = 5.0 Vdc, f = 1.0 kHz)

h_fe

1000 −

− 5. Pulse Test: Pulse Width ≤300ms, Duty Cycle ≤2.0%.

BASE

EMITTER COLLECTOR

≈8 k ≈120 BASE

EMITTER COLLECTOR

≈ 8 k ≈ 120 NPN MJF6388

PNP MJF6668

(3)

0.3

Figure 2. Switching Times Test Circuit

V_CC = 30 V I_C/I_B = 250 I_B1 = I_B2 T_J = 25°C

0.1 0.5 2 5 10

5

I_C, COLLECTOR CURRENT (AMPS)

t, TIME (s)μ 1

0.2 0.1 7

Figure 3. Typical Switching Times t_s

0.3 3

0.2 1

0.07 0.7

V_CC = 30 V I_C/I_B = 250 I_B1 = I_B2 T_J = 25°C

0.1 0.3 0.5 0.7 2 5 10

5

I_C, COLLECTOR CURRENT (AMPS)

t, TIME (s)μ

1

0.2 0.1 7 3

0.2 1

10

0.7

3 7

NPN MJF6388

PNP MJF6668

V_CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 4. Maximum Forward Bias

Safe Operating Area 1

20

0.3

30 CURRENT LIMIT

SECONDARY BREAKDOWN LIMIT THERMAL LIMIT @ T_C = 25°C (SINGLE PULSE)

I C, COLLECTOR CURRENT (AMPS)

0.02 2 3 50

3

0.05

10 0.03

T_J = 150°C dc 1ms

5 ms

100 ms

2 5

0.1

5 20 100

0.5 2

10

0.2 0.5 1

≈120

≈8 k V₁

APPROX.

+12 V

V₂ APPROX.

-8 V 25 ms

R_B

51 D₁

- 4 V

V_CC + 30 V RC

SCOPE TUT

t_r, t_f≤ 10 ns DUTY CYCLE = 1%

FOR t_d AND t_r, D₁ IS DISCONNECTED AND V2 = 0

FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.

RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS D₁, MUST BE FAST RECOVERY TYPES, e.g.,

MUR110 USED ABOVE IB ≈ 100 mA MSD6100 USED BELOW I_B≈ 100 mA

t_f

t_r

t_d

t_r

t_s

t_d t_f

(4)

t, TIME (ms) 0.01

0.01 0.05 0.1 0.2 0.5 1 2 5 10 20 50 500 100K

1

0.2 0.1 0.05

r(t), TRANSIENT THERMAL R_q_JC(t) = r(t) R_q_JC

R_q_JC = °C/W MAX

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t₁ T_J(pk) - T_C = P_(pk)R_q_JC(t)

P_(pk)

t₁ t₂

DUTY CYCLE, D = t₁/t₂ SINGLE PULSE

RESISTANCE (NORMALIZED)

Figure 5. Thermal Response 0.5 D = 0.5

0.3

0.03 0.02

0.02 0.3 3 30 100 200300 1K 2K3K 5K 10K 20K30K50K

0.2 0.1

0.05

T_C, CASE TEMPERATURE (°C) 0

40 120 160

0.6

POWER DERATING FACTOR

SECOND BREAKDOWN DERATING 1

0.8

0.4

0.2

60 80 100 140

THERMAL DERATING

20

Figure 6. Maximum Power Derating

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I

_C

− V

_CE

limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.

The data of Figure 4 is based on T

_J(pk)

= l50 _ C; T

_C

is variable depending on conditions. Secondary breakdown pulse limits are valid for duty cycles to 10% provided T

_J(pk)

< 150 _ C. T

_J(pk)

may be calculated from the data in Figure 5.

At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by secondary breakdown.

Figure 7. Typical Small−Signal Current Gain f, FREQUENCY (kHz)

hfe, SMALL-SIGNAL CURRENT GAIN

T_C = 25°C V_CE = 4 Vdc I_C = 3 Adc 10,000

200 100 1000 500 300

10 30 2000 3000 5000

1 2 5 10 20 50 100 200 500 1000

20 50

f, FREQUENCY (kHz)

hFE, SMALL-SIGNAL CURRENT GAIN

10,000

200 100 1000 500

10 2000 5000

1 2 5 10 20 50 100 200 500 1000

20 50 NPN

MJF6388

PNP MJF6668

T_C = 25°C V_CE = 4 VOLTS I_C = 3 AMPS

3 7 30 70 300

(5)

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

70 300

30 200

100

50

V_R, REVERSE VOLTAGE (VOLTS)

C, CAPACITANCE (pF)

C_ib

C_ob

0.1 0.2 0.5 1 2 5 10 20 50 100

T_J = 25°C NPN

MJF6388

PNP MJF6668

70 300

30 200

100

50

V_R, REVERSE VOLTAGE (VOLTS)

C, CAPACITANCE (pF) C_ib C_ob

0.1 0.2 0.5 1 2 5 10 20 50 100

T_J = 25°C

I_C, COLLECTOR CURRENT (AMP) 0.1

I_C, COLLECTOR CURRENT (AMP)

200 0.2 0.5

3000

1000 10,000

hFE, DC CURRENT GAIN

V_CE = 4 V T_J = 150°C

5000

0.3 1

25°C -55°C 2000

0.7 3

20,000

300 500

5 10

hFE, DC CURRENT GAIN

I_B, BASE CURRENT (mA) 2.6

2.2

1.8

1.4

0.3 0.5 0.7 2 3 5

I_C = 2 A 4 A

1

6 A

T_J = 25°C 3

1

7 20 30

I_B, BASE CURRENT (mA) 2.6

2.2

1.8

1.4

10

3

1 200 3000

1000 10,000 5000

2000 20,000

300 500

2 7 0.1 0.2 0.3 0.5 0.7 1 2 3 5 7 10

V_CE = 4 V

T_J = 150°C

25°C

-55°C

I_C = 2 A 4 A 6 A

700 7000

Figure 8. Typical Capacitance

Figure 9. Typical DC Current Gain

Figure 10. Typical Collector Saturation Region

0.3 0.5 0.7 1 2 3 5 7 10 20 30

T_J = 25°C

(6)

NPN MJF6388

PNP MJF6668

0.1

V, TEMPERATURE COEFFICIENT (mV/C)°θ

10^-1

0

+0.4 -0.2 -0.4 -0.6

+0.6 +0.2 -0.8 -1 -1.2 -1.4

I_C, COLLECTOR CURRENT (AMP) 0

*I_C/I_B≤ h_FE/3

-5

10⁴

V_BE, BASE-EMITTER VOLTAGE (VOLTS) 10^-1

0 - 0.4

, COLLECTOR CURRENT (A)μ

I C 10³ 10² 10¹ 10⁰

+0.2 +0.4 +0.6 T_J = 150°C

100°C

REVERSE FORWARD

25°C V_CE = 30 V 10⁵

-0.6 -0.2 +0.8 +1 +1.2 +1.4

10⁴

V_BE, BASE-EMITTER VOLTAGE (VOLTS)

, COLLECTOR CURRENT (A)μ

I C 10³ 10² 10¹ 10⁰

T_J = 150°C 100°C

REVERSE FORWARD

25°C V_CE = 30 V 10⁵

-4 -3 -2 -1

qVB for V_BE

25°C to 150°C

I_C, COLLECTOR CURRENT (AMP) Figure 11. Typical “On” Voltages

Figure 12. Typical Temperature Coefficients 0.1

1.5

V, VOLTAGE (VOLTS)

3 2.5

1 0.5

0.2 0.3 0.5 0.7 1 3 5 10

1.5

V, VOLTAGE (VOLTS)

3 2.5

1 0.5

T_J = 25°C

V_BE(sat) @ I_C/I_B = 250 V_BE @ V_CE = 4 V

V_CE(sat) @ I_C/I_B = 250 T_J = 25°C

V_BE(sat) @ I_C/I_B = 250 V_BE @ V_CE = 4 V

V_CE(sat) @ I_C/I_B = 250

V, TEMPERATURE COEFFICIENT (mV/C)°θ

7

2 0.1 0.2 0.3 0.5 0.7 1 2 3 5 7 10

0.2 0.3 0.5 0.7 1 2 3 5 7 10 0.1 0.2 0.3 0.5 1 2 3 5 7 10

+1 +2 +3 +4 +5

0

-5 -4 -3 -2 -1 +1 +2 +3 +4 +5

-55°C to 25°C

*I_C/I_B≤ h_FE/3

Figure 13. Typical Collector Cut−Off Region 0.7 25°C to 150°C

-55°C to 25°C

25°C to 150°C -55°C to 25°C

*qVC for V_CE(sat) *qVC for V_CE(sat)

qVB for V_BE 25°C to 150°C

-55°C to 25°C

(7)

TEST CONDITION FOR ISOLATION TEST*

FULLY ISOLATED PACKAGE

LEADS

HEATSINK

0.110, MIN

Figure 14. Mounting Position

*Measurement made between leads and heatsink with all leads shorted together.

4-40 SCREW PLAIN WASHER

HEATSINK

COMPRESSION WASHER NUT

CLIP

HEATSINK

Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw torque of 6 to 8 in^.lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a con- stant pressure on the package over time and during large temperature excursions.

Destructive laboratory tests show that using a hex head 4−40 screw, without washers, and applying a torque in excess of 20 in^.lbs will cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.

Additional tests on slotted 4−40 screws indicate that the screw slot fails between 15 to 20 in^.lbs without adversely affecting the package. However, in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend exceeding 10 in^.lbs of mounting torque under any mounting conditions.

Figure 15. Typical Mounting Techniques*

MOUNTING INFORMATION

** For more information about mounting power semiconductors see Application Note AN1040.

(8)

TO−220 FULLPAK CASE 221D−03

ISSUE K

DATE 27 FEB 2009

STYLE 4:

PIN 1. CATHODE 2. ANODE 3. CATHODE STYLE 1:

PIN 1. GATE 2. DRAIN 3. SOURCE

STYLE 2:

PIN 1. BASE 2. COLLECTOR 3. EMITTER

STYLE 3:

PIN 1. ANODE 2. CATHODE 3. ANODE

DIM A

MIN MAX MIN MAX MILLIMETERS 0.617 0.635 15.67 16.12

INCHES

B 0.392 0.419 9.96 10.63 C 0.177 0.193 4.50 4.90 D 0.024 0.039 0.60 1.00 F 0.116 0.129 2.95 3.28

G 0.100 BSC 2.54 BSC

H 0.118 0.135 3.00 3.43 J 0.018 0.025 0.45 0.63 K 0.503 0.541 12.78 13.73 L 0.048 0.058 1.23 1.47

N 0.200 BSC 5.08 BSC

Q 0.122 0.138 3.10 3.50 R 0.099 0.117 2.51 2.96 S 0.092 0.113 2.34 2.87 U 0.239 0.271 6.06 6.88

STYLE 5:

PIN 1. CATHODE 2. ANODE 3. GATE

STYLE 6:

PIN 1. MT 1 2. MT 2 3. GATE

SEATING PLANE

−T−

U C

S

J R SCALE 1:1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH 3. 221D-01 THRU 221D-02 OBSOLETE, NEW

STANDARD 221D-03.

MARKING DIAGRAMS

xxxxxx = Specific Device Code G = Pb−Free Package A = Assembly Location Y = Year

WW = Work Week xxxxxxG

AYWW

A = Assembly Location

Y = Year

WW = Work Week xxxxxx = Device Code G = Pb−Free Package AKA = Polarity Designator

AYWW xxxxxxG

AKA

Bipolar Rectifier

−B−

−Y−

G N D

L K

H A

F Q

3 PL 1 2 3

B M

0.25 (0.010)M Y

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

98ASB42514B DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 TO−220 FULLPAK

(9)

products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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