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Reference Document

For LCD Module

Product No

B3GB02

Documenet No SPC1B3GB02V104

Version

Ver.1.04

REPRO ELECTRONICS CORPORATION

Maruwa Building 2F,2-2-19 Sotokanda,Chiyoda-ku,Tokyo 1001-0021 Japan TEL: +81-3-3255-9600 / FAX: +81-50-3488-4718

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Revision History

Version Date by Description Comments

1.00 06/Dec/2006 gyg Initial Version

1.01 11/Dec/2006 rt 1.02 26/Dec/2006 rt 1.03 28/Dec/2006 rt

1.04 19/Jun/2008 Jeffrey Add register description

Contents---Page

1. General specifications ...2

2. Outline Structure ...2

2.1. LCD Module ...2

2.2. Backlight ...2

2.3. Interface Signals...3

3. Timing Chart...4

3.1. RGB Interface ...4

3.2. Serial Interface ...5

4. Use LCD Module ...5

4.1. Data direction ...5

4.2. Initial code ...6

4.3. Lcd sleep mode code...8

4.4. Lcd Power off code ...8

4.5. Sub Function Description...9

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1. General specifications

Display format:240×(RGB)×320 Outline dimensions: 2.4’’inch

Color:262k color (R:6bit,G:6bit,B:6bit) Current LED:typical 20mA

Signals:23(Except of Power and GND)

Power Signals:Power(+3V)3,Power(+2V)2,GND 5 LED Signals:4

2. Outline Structure

2.1. LCD Module

IC2 IC1

Fig. 1 LCD outline structure

2.2. Backlight

Pin 1, 2 Pin 3, 4

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2.3. Interface Signals

Pin No. Symbol Description I/O

1 GND Ground I

2 *RESET Reset(low active) I

3 GND Ground I

4 VSYNC Vertical synchronizing signal I

5 VEE Power (+3V) I

6 VEE Power (+3V) I

7 VEE Power (+3V) I

8 SDI Serial data input I

9 SCLK Serial clock I

10 GND Ground I

11 VDEN Video data enable signal I

12 VCLK Video data sampling clock I

13 VDD Power logic (+2V) I

14 VDD Power logic (+2V) I

15 *SCS Serial interface chip select(low active) I

16 GND Ground I

17 R5 Red data signal(MSB) I

18 R4 Red data signal I

19 R3 Red data signal I

20 R2 Red data signal I

21 R1 Red data signal I

22 R0 Red data signal(LSB) I

23 G5 Green data signal(MSB) I

24 G4 Green data signal I

25 G3 Green data signal I

26 G2 Green data signal I

27 G1 Green data signal I

28 G0 Green data signal(LSB) I

29 B5 Blue data signal(MSB) I

30 B4 Blue data signal I

31 B3 Blue data signal Backlight Cathode I

32 B2 Blue data signal I

33 B1 Blue data signal I

34 B0 Blue data signal(LSB) I

35 GND Ground I

Note: I Input O Output

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3. Timing Chart

3.1. RGB Interface

Input display data by each terminal of VSYNC, VDEN, VCLK, R0~R5, G0~G5, B0~B5.

Fig. 3 RGB timing chart

Pin Description Symbol Typical Unit Note

Cycle tv 334 H (Frequency) Fv 16.64 ms Front Porch tvf 2 H Back Porch tvb 8 H Pulse Width tvp 4 H VSYNC Display Period tvd 320 H Vertical synchronizing signal Cycle td 300 CLK (Frequency) Fd 50 us Pulse Width tdp 60 CLK VDEN Display Period tdd 240 CLK Horizontal Synchronizing signal VCLK fclk 6 MHz

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3.2. Serial Interface

It is possible to set LCD driver register. Specification of register and setting of register value is done by serial interface.

This serial interface is composed by 24-bit data or by 32-bit data. Some registers are set by 24-bit data, and some registers are set by 32-bit data.

Keep chip select active during transmission of total 24-bit or 32-bit data.

SCLK

SDI

D23 D21 D22 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

SCS

Fig. 4 24-bitdata serial timing chart

SCLK

SDI

D23 D21 D22 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

SCS

D24 D25 D26 D27 D28 D29 D30 D31

Fig. 5 32-bitdata serial timing chart

4. Use LCD Module

4.1. Data direction

IC 2 IC 1

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4.2. Initial code

(1) Power on and Reset (2) Set LCD driver register:

LCD_Reg_Set1(0x0070, 0x80); Delay(115); //11.5ms=115*100us LCD_Reg_Set1(0x007A, 0x01); LCD_Reg_Set1(0x0070, 0xC8); LCD_Reg_Set1(0x00A1, 0x00); LCD_Reg_Set1(0x00A0, 0x00); LCD_Reg_Set1(0x0072, 0xA3); LCD_Reg_Set1(0x0073, 0x04); LCD_Reg_Set1(0x0075, 0x46); LCD_Reg_Set1(0x0076, 0x23); LCD_Reg_Set1(0x0077, 0x08); LCD_Reg_Set1(0x0078, 0x08); LCD_Reg_Set1(0x0079, 0x00); LCD_Reg_Set1(0x007F, 0xF0); LCD_Reg_Set1(0x0071, 0x81); Delay(3); LCD_Reg_Set1(0x000D, 0x20); LCD_Reg_Set1(0x002E, 0x00); LCD_Reg_Set1(0x0011, 0x00); Delay(340); LCD_Reg_Set1(0x0012, 0x00); LCD_Reg_Set1(0x0085, 0x74); LCD_Reg_Set1(0x0021, 0x37); LCD_Reg_Set1(0x0022, 0x02); LCD_Reg_Set1(0x0023, 0x24); LCD_Reg_Set1(0x0024, 0x13); LCD_Reg_Set1(0x0025, 0x0A); LCD_Reg_Set1(0x0026, 0x82); LCD_Reg_Set1(0x0027, 0x01); LCD_Reg_Set1(0x006F, 0x00); LCD_Reg_Set1(0x001E, 0x25); LCD_Reg_Set1(0x001F, 0x59); LCD_Reg_Set2(0x0030, 0x0777); LCD_Reg_Set2(0x0031, 0x0444); LCD_Reg_Set2(0x0032, 0x0555); LCD_Reg_Set2(0x0033, 0x0444); LCD_Reg_Set2(0x0034, 0x0333); LCD_Reg_Set2(0x0035, 0x0333); LCD_Reg_Set2(0x0036, 0x0333); LCD_Reg_Set2(0x0037, 0x0333); LCD_Reg_Set2(0x0038, 0x0444);

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LCD_Reg_Set2(0x0039, 0x0555); LCD_Reg_Set2(0x003A, 0x0666); LCD_Reg_Set2(0x003B, 0x0666); LCD_Reg_Set2(0x003C, 0x0777); LCD_Reg_Set2(0x003D, 0x0777); LCD_Reg_Set2(0x003E, 0x0777); LCD_Reg_Set2(0x003F, 0x0777); LCD_Reg_Set2(0x0040, 0x0777); LCD_Reg_Set2(0x0041, 0x0777); LCD_Reg_Set2(0x0042, 0x0777); LCD_Reg_Set2(0x0043, 0x0777); LCD_Reg_Set2(0x0044, 0x0777); LCD_Reg_Set2(0x0045, 0x0777); LCD_Reg_Set2(0x0046, 0x0777); LCD_Reg_Set2(0x0047, 0x0777); LCD_Reg_Set2(0x0048, 0x0777); LCD_Reg_Set2(0x0049, 0x0777); LCD_Reg_Set2(0x004A, 0x0777); LCD_Reg_Set2(0x004B, 0x0777); LCD_Reg_Set2(0x004C, 0x0777); LCD_Reg_Set2(0x004D, 0x0666); LCD_Reg_Set2(0x004E, 0x0666); LCD_Reg_Set2(0x004F, 0x0666); LCD_Reg_Set1(0x0014, 0x00); LCD_Reg_Set1(0x0000, 0x04); LCD_Reg_Set1(0x0001, 0x07); LCD_Reg_Set1(0x0002, 0x00); LCD_Reg_Set2(0x0003, 0x0000); LCD_Reg_Set1(0x0004, 0xEF); LCD_Reg_Set2(0x0005, 0x013F); LCD_Reg_Set1(0x0006, 0xFF); LCD_Reg_Set2(0x0007, 0x01FF); LCD_Reg_Set1(0x0008, 0xFF); LCD_Reg_Set2(0x0009, 0x01FF); LCD_Reg_Set1(0x000A, 0x00); LCD_Reg_Set1(0x000B, 0x00); LCD_Reg_Set1(0x000C, 0x00); LCD_Reg_Set1(0x0014, 0x00); LCD_Reg_Set2(0x0015, 0x0000); LCD_Reg_Set2(0x0016, 0x0000); LCD_Reg_Set2(0x0017, 0x01FF); LCD_Reg_Set2(0x0018, 0x01FF); LCD_Reg_Set1(0x0013, 0x00); LCD_Reg_Set2(0x0019, 0x01FF);

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LCD_Reg_Set2(0x001B, 0x01FF); LCD_Reg_Set2(0x001C, 0x01FF); LCD_Reg_Set2(0x001A, 0x01FF); LCD_Reg_Set1(0x001D, 0x0E); LCD_Reg_Set1(0x000D, 0x00); Delay(4);

//start output of CLK,HSY,VSY now LCD_Reg_Set1(0x0011, 0x80); Delay(400); LCD_Reg_Set1(0x002E, 0x0D);//0x0D LCD_Reg_Set1(0x001E, 0x29); LCD_Reg_Set1(0x0011, 0xC0); LCD_Reg_Set1(0x000D, 0x24); Delay(200); LCD_Reg_Set1(0x0010, 0x02); Delay(26);

// Start to send RGB display data.

4.3. Lcd sleep mode code

LCD_Reg_Set1(0x0011, 0x40); Delay(390); LCD_Reg_Set1(0x001E, 0x25); LCD_Reg_Set1(0x0011, 0x00); LCD_Reg_Set1(0x002E, 0x00); Delay(130); LCD_Reg_Set1(0x000D, 0x20); LCD_Reg_Set1(0x0010, 0x04); Delay(390); LCD_Reg_Set1(0x0071, 0x09); Delay(160); LCD_Reg_Set1(0x0071, 0x05); LCD_Reg_Set1(0x0071, 0x71); LCD_Reg_Set1(0x007A, 0x01); LCD_Reg_Set1(0x00A0, 0x55); LCD_Reg_Set1(0x00A1, 0xAA); LCD_Reg_Set1(0x0070, 0x00);

4.4. Lcd Power off code

LCD_Reg_Set1(0x0011, 0x40); Delay(390); LCD_Reg_Set1(0x001E, 0x25); LCD_Reg_Set1(0x0011, 0x00); LCD_Reg_Set1(0x002E, 0x00); Delay(100); LCD_Reg_Set1(0x000D, 0x20);

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LCD_Reg_Set1(0x0010, 0x04); Delay(398); LCD_Reg_Set1(0x0071, 0x09); Delay(160); LCD_Reg_Set1(0x0071, 0x09); LCD_Reg_Set1(0x0071, 0x71); LCD_Reg_Set1(0x007A, 0x01); LCD_Reg_Set1(0x00A0, 0xAA); LCD_Reg_Set1(0x00A1, 0xAA); LCD_Reg_Set1(0x0070, 0x00); Delay(20000); LCD_Reg_Set1(0x0070, 0x80); Delay(53); LCD_Reg_Set1(0x007A, 0x01); LCD_Reg_Set1(0x0071, 0x0A); Delay(160); LCD_Reg_Set1(0x0071, 0x71); LCD_Reg_Set1(0x00A0, 0xAA); LCD_Reg_Set1(0x00A1, 0xAA); LCD_Reg_Set1(0x0070, 0x00);

4.5. Sub Function Description

(1) LCD_Reg_Set1(unsigned int reg, unsigned int data) Function: Set the LCD driver register.

Para1: reg---- Select the register through serial interface.

Para2: data----The set value for register through serial interface, the data should 8 bits.

(2) LCD_Reg_Set2(unsigned int reg, unsigned int data) Function: Set the LCD driver register.

Para1: reg---- Select the register through serial interface.

Para2: data----The set value for register through serial interface, the data should 16 bits.

(3) Delay (unsigned int time) Function: Delay time*100us.

5. Register function description

(1) Display control (R0010h)

R/W IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0

W 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEN 0

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(2) Entry Mode (R0000h)

R/W IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0 W 0 0 0 0 0 0 1 0 0 0 GSDC 0 SSDC 0 0

SSDC: SSDC is a bit which selects the source scanning direction. If this bit is set, the

LR output pin is changed and the display is reversed (right and left). LR signal changes by frame synchronization (VSYNC synchronization). If ‘1’ is set in SSDC, the display will be reversed (right and left). Therefore, in accordance with the display reversal, the analog video output of 4chxRGB is reversed in bit order. At this time, the polarity of SCK and SCKB is reversed.

SSDC Description

0 LR output is high

1 LR output is low

GSDC: GSDC is a bit to select the direction of gate scanning. If this bit is set, the

UD output pin is changed and the display is reversed (up and down).UD signal changes by frame synchronization (VSYNC synchronization).

GSDC Description

0 UD output is low

1 UD output is high

Select the direction of the source driver channel in pixel unit by setting GSDC and SSDC.

ITEM GSDC=1 GSDC=0

SSDC=1

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FF02S25SV FF02S15SV FF02S17SV FF02S27SV FF02S29SV FF02S31SV FF02S33SV FF02S35SV FF02S45SV FF02S55SV FF02S65SV A PRODUCT .

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極性マーク表示 ロットNo.表示 D±0.1 ** A (1) 2.5±0.15 (0.5) △ ×極数 キャビNo.表示 極数表示 0.5 B A±0.15 (C:FPC挿入部寸法) (0.15) (0.15) 0.5 +0.15 0 (1.6) 0.9±0.1( 端子リード含む ) HRSマーク表示 (1.3) 2.15±0.2 0.15MAX 0.15MAX 1 1 2 2 3 S 0.15G G 5 1 2 注   端子及び金具リードの平坦度は、0.1MAXです。     端子リード位置は、ケース底面S面からの寸法を示します。     各リード長のばらつきは、0.1MAXです。     本製品は、量産時はエンボス梱包です。詳細は7頁の梱包仕様図を参照して下さい。     改良等により ひけ逃げを追加することがありますので、ご了承願います。     またモールド樹脂に黒点等が発生する場合がありますが、品質には問題ありません。 3 4

■コネクタ寸法図

[FH19Cシリーズ]

■コネクタ寸法表

製品番号 FH19C-04S-0.5SH(**) FH19C-06S-0.5SH(**) FH19C-07S-0.5SH(**) FH19C-08S-0.5SH(**) FH19C-09S-0.5SH(**) FH19C-10S-0.5SH(**) FH19C-12S-0.5SH(**) FH19C-13S-0.5SH(**) FH19C-15S-0.5SH(**) FH19C-17S-0.5SH(**) FH19C-20S-0.5SH(**) FH19C-21S-0.5SH(**) FH19C-24S-0.5SH(**) FH19C-27S-0.5SH(**) FH19C-30S-0.5SH(**) FH19C-40S-0.5SH(**) FH19C-50S-0.5SH(**) HRS No. CL580-0410-1-** CL580-0409-2-** CL580-0411-4-** CL580-0404-9-** CL580-0403-6-** CL580-0412-7-** CL580-0413-0-** CL580-0405-1-** CL580-0406-4-** CL580-0408-0-** CL580-0402-3-** CL580-0414-2-** CL580-0407-7-** CL580-0401-0-** CL580-0400-8-** CL580-0416-8-** CL580-0417-0-** 極数 4 6 7 8 9 10 12 13 15 17 20 21 24 27 30 40 50 A 04.0 05.0 05.5 06.0 06.5 07.0 08.0 08.5 09.5 10.5 12.0 12.5 14.0 15.5 17.0 22.0 27.0 B 01.5 02.5 03.0 03.5 04.0 04.5 05.5 06.0 07.0 08.0 09.5 10.0 11.5 13.0 14.5 19.5 24.5 C 02.57 03.57 04.07 04.57 05.07 05.57 06.57 07.07 08.07 09.07 10.57 11.07 12.57 14.07 15.57 20.57 25.57 D 03.35 04.35 04.85 05.35 05.85 06.35 07.35 07.85 08.85 09.85 11.35 11.85 13.35 14.85 16.35 21.35 26.35 RoHS (注2) 単位:mm (注1)梱包はエンボステープ梱包となります。(5,000個/リール) ご注文はリール数でお願い致します。 (注2)**:金めっき仕様は05(RoHS対応品)、ニッケルバリア金めっき仕様は10(RoHS対応品)となります。 詳細は「製品番号の構成」欄を参照して下さい。

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FPC・FFC、ランド、メタルマスク寸法表 単位:mm 04 05 06 07 08 09 10 12 13 14 15 16 17 18 04.0 04.5 05.0 05.5 06.0 06.5 07.0 08.0 08.5 09.0 09.5 10.0 10.5 11.0 01.5 02.0 02.5 03.0 03.5 04.0 04.5 05.5 06.0 06.5 07.0 07.5 08.0 08.5 03.1 03.6 04.1 04.6 05.1 05.6 06.1 07.1 07.6 08.1 08.6 09.1 09.6 10.1 03.9 04.4 04.9 05.4 05.9 06.4 06.9 07.9 08.4 08.9 09.4 09.9 10.4 10.9 02.5 03.0 03.5 04.0 04.5 05.0 05.5 06.5 07.0 07.5 08.0 08.5 09.0 09.5 極数 A B J K L B 0.3±0.05(ランド) 0.5 0.8±0.05 0.25±0.05(メタルマスク) 0.1 H H ×極数 (0.15) (0.15)(0.15) (0.15) (3) (2.5) (A) J±0.1 K±0.1 0.8±0.05 3.3±0.05 (0.2) (0.05) (X ) 0.2±0.03 3.5 MIN( 補強 フ ィ ル ム ) 0.3±0.03 3.5 MIN( 補強 フ ィ ル ム ) 2-R0.2 0.5±0.07 B±0.03 0.5±0.03 L±0.05 FH19C シリーズ用 シリーズ用 FH19SC 0.35±0.03(FPC) 0.3±0.03(FFC) 2.5±0.3 (カ バ ー レ イ 除去部 )

B

推奨ランド、メタルマスク寸法図

[FH19Cシリーズ/FH19SCシリーズ共通]

B

FPC・FFC推奨寸法図

[FH19Cシリーズ/FH19SCシリーズ共通] 推奨メタルマスク厚:t=0.10 注1:補強フィルム材質は、ポリイミド+熱硬化接着剤を推奨します。 注2:FPC・FFC設計上、補強フィルム長を3.5mm以上取れない場合は、(X)寸法を0.5mm以上として下さい。 20 21 22 24 26 27 28 30 32 40 45 50 12.0 12.5 13.0 14.0 15.0 15.5 16.0 17.0 18.0 22.0 24.5 27.0 09.5 10.0 10.5 11.5 12.5 13.0 13.5 14.5 15.5 19.5 22.0 24.5 11.1 11.6 12.1 13.1 14.1 14.6 15.1 16.1 17.1 21.1 23.6 26.1 11.9 12.4 12.9 13.9 14.9 15.4 15.9 16.9 17.9 21.9 24.4 26.9 10.5 11.0 11.5 12.5 13.5 14.0 14.5 15.5 16.5 20.5 23.0 25.5 極数 A B J K L

Fig. 2 Backlight structure
Fig. 4    24-bitdata serial timing chart

参照

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