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Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology

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IEICE TRANS. ELECTRON., VOL.E97–C, NO.4 APRIL 2014

FOREWORD

Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology

For the past few decades, solid-state circuits have made dominant contribution to the development of electronic equipment. The equipment using solid-state circuits from micro sensors all around the environ- ments to super computer systems in mega data centers now affect a great many aspects of our everyday lives through the wide variety of private and public services. In the same period of time, there has been an incredible growth in the knowledge of solid-state circuits, driven by the endless efforts of the innovators including not only the authors but also the readers of this special section.

It is my great honor to announce the publication of this special section on solid-state circuits design. The section is devoted to a distinctive exploration of new techniques on integrated circuits and devices. It contains 14 regular papers. The selected papers cover wide range of topics including processors, data converters, phase-locked loops, energy harvesters, memories, power integrity, and yield management. In addition to the regular papers, the section has two invited papers. The first paper by professor Ishihara presents single-grain Silicon thin film transistors for three dimensional integrated circuits. The second invited paper by Dr. Hatasako presents the past and the future technology for mixed signal LSI using three dimensional transistors.

On behalf of the editorial committee, I would like to express my sincere appreciation to all the authors for their contributions and to all the reviewers for their critical readings. Lastly, I would like to thank the editorial committee for their work on this special section.

Editorial Committee Members Guest Editor: Shinji Miyano (Toshiba)

Guest Associate Editors: Tetsuya Iizuka (The Univ. of Tokyo), Ryusuke Egawa (Tohoku Univ.), Kenichi Ohhata (Kagoshima Univ.), Kenichi Okada (Tokyo Inst. Tech), Akihiro Kitagawa (Renesas), Hiroshi Koizumi (NTT), Takayuki Shibata (DENSO), Yukio Tamai (Sharp), Sunao Torii (TOPS Sys- tems), Shigetoshi Nakatake (Univ. of Kitakyushu), Ryuichi Fujimoto (Toshiba), Shoichi Masui (Fujitsu Labs), Noriyuki Miura (Kobe Univ.), Akihiko Miyazaki (NTT), Kousuke Miyaji (Shinshu Univ.), Ryuji Yoshimura (TI Japan)

Takeshi Yamamura

(Fujitsu Laboratories),Guest Editor-in-Chief

Takeshi Yamamura(Member) is a principal researcher of Fujitsu Laboratories LTD., received B.S. and M.S. degrees from the University of Tokyo, Tokyo, Japan, in 1978 and 1981, respectively. He joined Fujitsu Ltd., Kawasaki, Japan, in 1981, where he worked on the development of mixed signal LSIs. He joined Fujitsu Laboratories Ltd., in 2004, where he has been working on the research and development of mixed signal LSIs. From 2006 to 2011, he was assigned to Fujitsu Research and Development Center Ltd., Beijing, China.

Copyright c2014 The Institute of Electronics, Information and Communication Engineers

参照

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