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九州大学学術情報リポジトリ

Kyushu University Institutional Repository

二硫化モリブデン薄膜の新規成長プロセスとキャリ ア輸送特性

許, 時耐

https://doi.org/10.15017/1806980

出版情報:Kyushu University, 2016, 博士(工学), 課程博士 バージョン:

権利関係:Fulltext available.

(2)

(様式2)

氏 名 :Heo Sinae

論 文 名 :A novel growth process and transport properties of MoS

2

thin films (二硫化モリブデン薄膜の新規成長プロセスとキャリア輸送特性) 区 分 :甲

論 文 内 容 の 要 旨

Since the modern electronics was birth from invention of transistor, efforts for miniaturizing and improving their performance have been made continuously. This lead to the micro and nanoelectronics with silicon based integrated circuits, which contributed to the emergence of personal computer. Moreover, the number of transistors on a chip has doubled roughly every 18months (Moore’s law). However, silicon based planar transistors reached size and performance limitation because of short-channel effect and surface roughness. Therefore, to overcome the current performance limitations in silicon based transistors, alternatives are strongly required.

MoS

2

, which is a kind of transition-metal dichalcogenides (TMDCs), has recently attracted considerable attention as an alternative to graphene which have limitation for application because of zero band gap. Intrinsically, MoS

2

has indirect band gap of 1.2 eV in the bulk form and direct band gap of 1.8 eV in monolayer. The MoS

2

has been prepared generally by mechanical exfoliation technique or conventional chemical vapor deposition (CVD) using MoO

3

powder and S powder. However, randomly located MoS

2

by general method is obstructing the actual applications of MoS

2

. Thus, growth and application of location controlled MoS

2

are difficult although a lot of efforts have putted.

This dissertation provides a novel process and transport properties of MoS

2

thin films. Here, I propose using a crystalline MoO

3

thin film as a precursor. The deposited MoO

3

thin films using metal shadow mask enable us to grow patterned MoS

2

. This advantage can be attributed to the fact that our process is based on a solid MoO

3

to vapor S reaction, which is superior to the vapor MoO

3

to vapor S reaction used for conventional CVD growth. Thus, my proposed method can offer a new way to form location controlled MoS

2

thin films. Moreover, location controlled MoS

2

thin films were applied to channel layers of field-effect transistor (FET). From the transport properties, the effect of physical properties of MoS

2

thin films was discussed.

This dissertation includes four chapters. Chapter 1 describes general introduction including background, problems, purposes and strategies for this work.

In chapter 2, a novel growth process including MoO

3

deposition, first-annealing, sulfurization

and post-annealing was established for location control of MoS

2

. First step of MoO

3

deposition enabled us to

control position of resultant MoS

2

thin films. The first-annealing step produced crystalline MoO

3

with

layered structure, which is necessary for obtaining crystalline MoS

2

in third step. The annealed MoO

3

thin

films were sulfurated to form MoS

2

thin films. However, X-ray photoelectron spectroscopy (XPS) results

revealed that sulfurated thin films consist of mixture of MoS

2

and MoS

3

. The fourth step of post-annealing

(3)

produced MoS

2

thin films without MoS

3

. Other important requirements are smooth surface morphology and high crystallinity for high performance transistor. To achieve smooth surface morphology and high crystallinity, first annealing temperature and substrate are carefully investigated. The smooth surface morphology of MoS

2

was obtained by decreasing first annealing temperature because MoS

2

surface morphology depended on surface morphology of MoO

3

. However, crystallinity of MoS

2

was declined with decrease of first annealing temperature. This problem was solved to change substrate from Si/SiO

2

to (0001)-orientated sapphire substrate. The use of a sapphire substrate led to significantly better quality of MoS

2

.

Chapter 3 demonstrated MoS

2

FET performance. MoS

2

FET was fabricated with MoS

2

thin films grown by a multi-step CVD method. The thin films annealed at post-annealing temperature (T

PA

) of 600 ºC indicated poor properties with low mobility and low drain current modulation by gate voltage. The careful XPS analysis with low pass energy of 30 eV revealed that amorphous MoS

3

is present in grown thin films annealed at T

PA

below 1000 °C. High post-annealing temperature of 1000 °C produced stoichiometric MoS

2

without MoS

3

. Because composition was changed by post-annealing temperature, wide range of polarities and device performances were observed depending on the post-annealing temperature. A post-annealing temperature below 1000 °C showed an ambipolar transistor property because of the excess S atoms, presenting as forms of MoS

3

, worked as acceptors, forming acceptor states above valance band. On the other hand, a T

PA

of 1000 °C produced stoichiometric MoS

2

, resulting in a unipolar transistor property with electron transport. Furthermore, crystallinity of the MoS

2

films was improved by increasing post-annealing temperature. This caused increase in mobility of MoS

2

transistor. We stress the merit of multi-step CVD, namely that MoS

2

FETs can be patterned simply by using shadow masks.

Finally, chapter 4 summarizes this dissertation.

This study achieved patterned MoS

2

transistor by establishing location controllable process and

understanding relation between physical properties of MoS

2

thin films and transistor performance. I believed

that the achievements in this study, including a novel process and understanding of carrier transport would

be helpful for the practical development of a variety of functional devices with 2D materials.

参照

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