NCP1611を使用したコンパクト
かつ高効率のPFCステージを設計
するための5つの主要ステップ
文書NCP1611駆 連続通 PFC 迅速設計要 説明 用的!160 W汎用電源"#$ %&'説明
最()*電*：160 W
RMS+,'電-範.：90 V~265 V
/01)*電-：390 V
+,'電流2450 mA未満345波数67 8 9: はじめに SO−8;$ <蔵=>NCP1611､?負荷 範.@APFC B率最適1設計 !C 過酷!DE護機構< 蔵FA､GHB果､I頼性､JK'9,電*､ FLM高B率2!要NO%P最適
電流制御周波数フォールドバック(CCFF)：Q路 瞬時+,'電流2R程度 高ST､臨界 Cr通 M(CrM)D 電流2 # HULAVJ34､5波数約20 kHz 直線的JW CCFF0格負荷3軽負 荷X方B率最(1 (注1) YZ的 ､K'9,損[2最\!A
スキップ・モード：B率=]最適1 ､Q路;^ _達B果!` ab+ ,'c近d,:8e 高*率 2必要!ST､最\電-0.75−V強f的gh> i機能抑f4
低い起動電流と広いVCCの範囲：B9 &' (NCP1611B)起時消費電流2特J､ VCCG'j'dk電用高,'l m'抵 抗n用324 A9 &' (NCP1611A)､補o電源p]Q路電*q給=> Lr!用途K sH 起t u811.25 V未満､Q路12-Vt 8p]電* v>Lr!C X9 &'3V VCCD範.広w!C (9.5 V~35 V)
高速ライン/負荷過渡補償(ダイナミック応答エン ハンサとソフトOVP)：従来PFC 8 応答2遅､負荷xy*電-突然z1 2(4!{ 9%| Hx"'m%| H引4 起32OA Q路Lr!､ /01},'Hp]逸脱徹底的f限
安全保護：NCP1611機能PFC 非常 頑強 機能r~､ブラウンアウト検 出ブロック(注2)ac+,'2J34D 止､2レベル電流センシング､,'m:K 飽 9,;m,{ x昇-m,{ 短絡LA電流2f限U150%超hST Jj| 比D 強f
容易な製造および安全性試験：PFC 素 ､製造xv扱時故､D時過!Ht ､H+8!LA､発的!短絡､田 c 良､損2生能性2OA 特､G 'H +隣接l'2短絡A､1l'2 接=>A接続2悪w!32OA Lr!開放/短絡状況LA火災､煙､(4!雑 音2生!Lr必要2OA NCP1611､3hi 適!l'接続(GND )x昇-m,{ 9,"m,{ 短絡!ST要求応4強1機能 <蔵 "#$ %&' H AND9062､/?性試験NCP1611駆 PFC D詳述 [1] 1. FCCrMコントローラと同様に､スイッチング周波数が低下した場合でも内部回路により1に近い力率が可能になります。 2. ブラウンアウト検出ブロックの入力ピン電圧(“VSENSE”)は､ライン範囲の検出と高いライン状態(2ステップのフィードフォワード)での http://onsemi.comAPPLICATION NOTE
PFC STAGE DIMENSIONING
Figure 1. Generic Schematic AC Line RX1 RX2 EMI Filter Vin IL L1 Vbulk Rfb1 Rbo1 Cin Rbo2 Rfb2 Rz Cz Cp RFF 8 1 7 2 6 3 5 4 Feedback VCC Q1 Vbulk D1 Rsence Rocp Rzcd Dzcd LOAD Cbulk + ステップ1：主要な仕様の定義
fline:+,'5波数 50 Hz/60 Hz"#$ %&' 2K sH 際､wST 47~63 Hz範.規0=>､ 8 "時間! 計算規0最JU考慮y>必要2O A
(Vline,rms)LL:+,'電-最Jtu8 > PFC 2D必要2O最\RMSy* 電- Lr!tu8､w100 V 3=>最\標準電-LAV通常10~12%Jw!A 次U3A (Vline,rms)LL= 90 V
(Vline,rms)HL:+,'電-最高tu8 > 最(y*RMS電- 通常､最(標準電-(w 240 V)LAV10%高w!A 次U 選択 (Vline,rms)HL= 264 V
(Vline,rms)boH:+'"H+,'t %&8 Q路+,'RMS電-2 (Vline,rms)boHQ ､D阻止 NCP161110% #%提q 2C､¡]p策v]!3､RMS+,' 電-2(90% (Vline,rms)boH)等(Vline,rms)boLL AJw!3+'"H状況検)D 止 "#$ %&'目標U ､¢W3FA(Vline,rms)boH+ 90% (Vline,rms)LL+ 81 V
(Vline,rms)boL+ 90% (Vline,rms)boH^ 73 V
Vout,nom:£称)*電- >PFC)*電-(¤指098:電-)/01tu8
Vout,nom(2 (Vline,rms)HL)LAV高w!>i!
A ¥¦ 390 V目標U
(dVout)pk−pk:l :−l :)*電-#8 ;+§ KwST､)*電-¨ T3指0=> 通常Dm,©ª :応答«'¬'d(DRE)H#Q避 8%¢W選択!>i!A ¥¦
tHOLD−UP： 8 "時間 ;+§ K､+,' "HR)*2有B !時間指0 通常1+,'d,:8 指0 要N､"#$ %&' 適!D必要!PFC )*最\電 -(Vout,min)認識必要3 (Vout,min= 350 V)､m'H# PG'9 K®¯!y*電-q給°高U3±0
Pout:)*電* >PFC負荷消費=> 電*
Pout,max最()*電* "#$ %&' 160 W最()*電*tu8
(Pin,avg)max:最(y*電* 通常D電源p ]²³4最(電* tu8J+, '?負荷条N得]> >]条NB 率295%3±0､次式n用 (Pin,avg)max+ 16095% ^170 W
Iline,max：J+,'?負荷条N得]>最(+ ,'電流
PFF(%):+,'電流t%&8 OA､>LA J34Q路Iline,max¨T示=>5波数 (CCFF)JW=¥ ;+§ K2100% 超h3､PFC 恒´的JW5波数 D3!A µ､PFF(%)2` 近ST､PFC ¶·?電*範.F CrM(5波数67 8 9:!)D ;+§ K通常､10~20%範.選択 ステップ2：電力素子の選択 高負荷条N､NCP1611臨界通 (CrM) D 2C､通常CrM PFC行@ >3FA､,'m:K､98:G'j'd､FL M;^ %#G'j9,設計詳述¥¸､簡¹要点 述º 1.インダクタの選択 Q路{'K,P<部f限=> PFC 2搬送4電*､L2所0{'K,P F電流昇決0,'m:K»¼ YZ的､PFC 電*能*次式 Lr!A (Pin,avg)HL+Vline,rms2 2L @ Ton,max (eq. 1) ,'m:K2\=¶､PFC 電*能* 2高w!A 2C､最(電*最J+, 'tu8提q4Lr､L®¯J U必要2OA L v (Vline,rms)LL2
2 @ (Pin,avg)max@ Ton,max
(eq. 2) 従来CrM"#$ %&'3½様､重要! ;+§ K次式3FA!A
最(l :電流： (IL,pk)max+ 2 2Ǹ @ (Pin,avg)max (Vline,rms)LL (eq. 3)
最(RMS電流： (IL,rms)max+ (IL,pk)max 6 Ǹ (eq. 4) "#$ %&'､,'m:K¢W要 N適T!>i!A ¥¦ L v 902 2 @ 170@ 20 m + 476 mH (eq. 5) (IL,pk)max+ 2 2Ǹ @ 17090 ^5.3 A (IL,rms)max+ 5.3 6 Ǹ ^2.2 A(Ton,max = 20ms)､Ton,max(標準U25 ms)最\U
2C､(Ton,max = 20ms)L計算r h最悪$ !､>式¾n用 >¿h､式5返=>ULAVÀ!w3V25% \=,'m:KU､Á?! '3選択 32推Ã=> 200-mH/6-Apk,'m:K(WURTH ELEKTRONIK ref:750370081)2選択=> >` 電流検) 用10：1補oÄ線構成=> CrMD時,Å'Æ5波数,'m:KU »¼3注意w°= fsw+
Vline(t)2@ǒVout* Vline(t)Ǔ
4 @ Pin,avg@ Vout@ L (eq. 6) 3hi､J+,'､?負荷(正弦曲線部)F ,Å'Æ5波数､次3FA fsw+( 2Ǹ @ 90) 2@ (390 * 2Ǹ @ 90) 4 @ 170 @ 390 @ 200 @ 10−6 ^ 80 kHz (eq. 7) 2.パワー・シリコン・デバイス Ç般､m,{ #3;^ MOSFET ½ H%':配置=> 経験､ H%':«È8É 消散次3F A見積V324
^, 電源"#$ %&')*約4% (95%通常､目標最\B率)
¹Ç電源"#$ %&')*約2% ^, 電源"#$ %&'約6.4 W2消散 3!A 選択 6Ê,8 H%':COLUMBIA−STAVER社製(Ë照番 Ì：TP207ST/120/12.5/NA/SP/03)OA､計測熱 抵抗6C/W範.< 発熱Íg損[源3､次V2挙Î ]>
m,{ #電損[ >次式 見積V324 Pbridge+ 2 @ Vf@ 2 2Ǹ p @Phout Vline,rms [1.8 @ VVline,rmsf@ Pout h (eq. 8) ､Vf#m,{ 順方Ï電-
MOSFET_損[ >次3FA (Pon)max+ (eq. 9) + 43 @ RDS(on)@ǒ
Pout,max h @ (Vline,rms)LLǓ
2 @ǒ
1 *8 2Ǹ @ (V3p @ Vline,rms)LL out,nomǓ
"#$ %&'､次Lr!A
PBRIDGE= 3.4 W､Vf1 V3±0
(Pon)max = 3.4 RDS(on)"#$ %&'､ JRDS(on)MOSFET (0.25W @ 25C)選択､ MOSFETL過度損[防 RDS(on)2 高温Ð!3±03､最(電損[約 1.7 W!A 2C､?電損[約5.1 W!A ,Å'Æ損[簡¹計算4 ¥¦ Ñ測行 ¥¦ Ò@A､経験､損[量 MOSFET電損[等3±0 験 H､過\見積VC!pÅÓ: 留意º4､MOSFETK '{6Figure 2 Q路Ôn用¿速4､34Q1 NPNH+ 'K(TO92)2MOSFETK '{6s H 電流Õ幅 «'¬'dÖ板 装=> ¥¦Figure 2. Q1 Speeds Up the MOSFET Turn Off DRV R2 1N4148D2 R1 Q1 M1 R10 10 kW 昇-m,{ ､次電損[源×Ø(Iout Vf) Iout負荷電流Vf m,{ 順方Ï電- 最()*電流約0.4 A､m,{ 電 損 [ 0. 4 W 範 . ( Vf = 1 V3 ± 0 ) PDIODE= 0.4 W 3.出力バルク・コンデンサ 98:G'j'd0義際通常､¢W 3!Ö準/f約2OA
l :−l :J5波#8： (dVout)pk−pk+ Pout,maxCbulk@ w @ Vout,nom (eq. 10)
､(w = 2p fline)+,'角5波数 #8)*電-(8%l :−l :)4%LA Jw維持!>i!A ¥¦ +,'5波数最\ U(47 Hz)考慮3､次Lr!A Cbulkw8% @ 2p @ 47 @ 390160 2^ 45 mF (eq. 11)
8 "時間Ù様：Cbulkw2 @ PV out,max@ tHOLD*UP
out,nom2* Vout,min2 (eq. 12) 8 "時間210 ms!､次Lr!A Cbulkw2 @ 160 @ 10 m 3902* 3502 ^ 108 mF (eq. 13)
RMSG'j'd電流： RMS電流､負荷特性LC決 A 抵抗性 負荷想03､電流(4=近Ú式 )4 (注3)： (Ic,rms)max^ (eq. 14) ^ǒ
Ǹ
32 29pǸ @ (Pin,avg)max (Vline,rms)LL@ Vout,nomǸ
Ǔ
2 *ǒ
VPout,max out,nomǓ
2Ǹ
"#$ %&'､次Lr!A IC,rms^ǒ
Ǹ
32 29pǸ @ 170 90 @ 390 ǸǓ
2 *ǒ
160390Ǔ
2Ǹ
^ (eq. 15) ^ 1.318 * 0.168Ǹ ^ 1.1 A ステップ3：フィードバック構成 Figure 1示Lr､6 9:構成¢W LA成A
抵抗¯¨Û >98:電-¯-l'8 6 9:IÌq給 ¯¨Û 部抵抗､/?性考慮通常3本 4 本抵抗構成=> (Figure 7R8､R9､FLM R10Ë照) ¤r!3､素 発的!短 絡LCG'H +高電-)*2Ü¿=> 破Ý
68K#'ÆG'j'd >(抵ST l'83Æ+' 間配置=>､,Å'Æ ,Þ6 9:IÌ2歪 !Lr wST､1ß1 nFG'j'd2 装=> Ç般､>26 9:抵抗33V 形成極+,'極3比較､非常高 5波数維持必要2OA 際3 à､ Cfbv 1 150 @ǒ
Rfb1ø Rfb2Ǔ
@ fline 概良á!結果2得]>
K,2補âÈH^ : Q路､2ßG 'j'd31本抵抗構成=>､: { 95 波数38 特性設0 0常状態､6 9:2.5 V/01#6Ê t'電-範.OA､6 9:W部抵抗 (Figure 1Rfb2 Figure 7R11)､次Lr6 9:抵抗9,"電流設0 ： IFB+VREF Rfb2 + 2.5Rfb2 (eq. 16) 損[3,Þ耐性間Ht {6LA､ 抵抗2決0=> 56 kW (IFB ^50 mA) 抵 抗､Ç般良á!結果2得]> Ö板PCB t,"H能!ST､=]高UV考慮 4 250 nA%':電流(−40C~125C温度 範.最(500 nA)2q給=>､l'2発的{ '36 9:l'接､ + ,9j 83注意w°= IFB50 mA未満設03､/01tu8250 nA %':電流LC(4!影響能性2 OAW部抵抗選択]､次Lr部抵抗選択 Rfb1+ Rfb2@
ǒ
Vout,nom VREF * 1Ǔ
(eq. 17) " # $ % & ' ､Rf b2 27 kW (IFB^ 92 mA)選択 Rfb1､2本 1,800 kW抵抗560 kW抵抗3直ã配置 >]正規1=>ULA､次正確!U2得 ]> (Rfb1 = 4.16 MW)正確!U2得]>､要 N適T£称388 V/01tu82)=> ループの補償： PFC昇-G'9 K8 s,'､6 67^ 2適用=>!ST+,'(4= 2ä比å 2C､s,'汎用 電源条N､¶·1桁¯z VSENSEl'電 -+,'電-U表 NCP1611情æ n用ßç6 67^ 機能 行 l'電-22.2 V超h3検)=>高+, '､PWMs,'J+,'状態(VSENSE225 ms 間1.7 V 未 満 S T 設 0 = > − Figure 33 Figure 5Ë照)3比º3¯¨=>Figure 3. 2-step Feed-forward Limits the Loop Gain Variation with Respect to Line 3*G0 G0 3*(Vin,rms)BOH e.g.: 234 V Vline,rms Loop Gain (−) 2.2*(Vin,rms)BOH e.g.: 172 V 1.7*(Vin,rms)BOH e.g.: 133 V (Vin,rms)BOH e.g.: 78 V [1]3[2]説明方法n用､PFC 2\IÌ_達関数(Ç方高+,'､VrÇ方 J+,')è易w324
J+,'_達関数： V^out V^control+ Vin,rms2@ Rload 640000 @ L @ Vout,nom@ 1 1 ) s @Rload@Cbulk 2 (eq. 18)
高+,'_達関数： V^out V^control+ Vin,rms2@ R load 1920000 @ L @ Vout,nom @ 1 1 ) s @Rload@Cbulk 2 (eq. 19) ：
Cbulk98:G'j'd
Rload負荷等é抵抗
LPFCG,8,'m:K'
Vout,nomPFC)*/01tu8 PFC J速!>i!A ¥¦ =] 用的､高PF比ST20 Hz¢W範.y J調整êë幅2必要 ､負荷急 激!z1過!{ 9%| H3"'m%| H 発生=¥ >]逸脱､NCP1611ダイナ ミック応答エンハンサ3正確!過電-E護LC B果的阻止=> ¤>V､次Ô示Lr!K,2補â2推à =>Figure 4. Regulation Trans-conductance Error Amplifier, Feed-back and Compensation Network − + VCONTROL FB OTA ICONTROL To PWM Comparator VREF + C2 C1 R1 VOUT Rfb1 Rfb2 K,2補âÛ2V]_達関数f御 )*次3FA V^control V^out + 1 ) sR1C1 sRo(C1) C2)
ǒ
1 ) sR1 C1@C2 C1)C2Ǔ
(eq. 20) ､ Ro+ Vout,nom Vref@ GEA, GEA200-mS«+ "'相ìG'm:K 's,'､Vout,nom98:£称電-､¤VREF OTA2.5V電-#6Êt' [2]3[3]説明補â方法適用3､次設 計式2得]> G0+(Vline,rms)LL2@ Rload,min 640000 @ L @ Vout,nom (eq. 21) C2+ G0@ tanǒ
p 2 * fmǓ
2 @ p2@ fc2@ R load,min@ Cbulk@ R0 C1+ G0 2 @ p @ fc@ R0* C2 R1+Rload,min@ Cbulk 2 @ C1 ：
(Vin,rms)LL 最Jtu8(ST90 V)+,'RMS電-
G0+,'最Jtu8((Vline,rms)LL)静的í 得
mî相 '(¹î+"')
fc 目標: { 95波数
Rload,min?負荷負荷等é抵抗 Rload,min+VPout,nom2 out,max + 390 2 160 ^ 950 : { 95波数4°Jw選択 2､?負荷PFC H 極3½p ¤>¢ǒ
fp+ 1 p @ Rload,min@ Cbulk ^ 2.4 HzǓ
î相Â '通常45~70度間設0 "#$ %&'､15 Hz: { 9 5波数360度î相Â '(p/3+"')目標 3､¢W2得]> C2+ 154 @ tanǒ
p 2 *p3Ǔ
2 @ p2@ 142@ 950 @ 136 @ 10−6@ 780 @ 103^ (eq. 22) G0+ 90 2@ 950 640000 @ 200 @ 10−6@ 390^ 154 C1+2p @ 15 @ 780 @ 10154 3* C2^ R1+ 950 @ 136 @ 10−6 2 @ 2.2 @ 10−6 ^ 29 kW ^ 1.9 mF å letȀs choose 2.2 mF ^ 200 nF å letȀs choose 220 nFステップ4：入力電圧のセンシング NCP1611+,'電-監視 通常､抵抗 2+,'配線間配置X2G'j'd放 電 (/?要N) Figure 13Figure 5抵抗 RX1FLM抵抗RX2､y*電-J減G'H +検)xw >]抵抗2½抵抗URX3±03､l'2 Ü¿=>電-次Lr!A Vpin2+ Rbo2 Rbo1) Rbo2@ (Rbo1) Rbo2) ø RX
RX) (Rbo1) Rbo2) ø RX@ Vline
(t) (eq. 23)
式次Lr簡約4
Vpin2+ Rbo2
RX) 2Rbo1) 2Rbo2@ Vline(t) (eq. 24)
+'"HG';t K､VSENSEl'電 -250 ms¢間(VboL = 0.9 V)WQ3+' "H状況検) ST､Q路e ｢staticOVP｣tu8達 f御IÌ徐ï 放電後､D止 VSENSEl'電-2(VboH = 1.0 V)超h3ð ､Dñ開 (Vline,rms)boH2+,'D開ò最\RMS電- (Vline,rms)boL2+'"H67 8H!2 最(電-ST､次式2得]> (Vline,rms)boH+ RX) 2Rbo1) 2Rbo2 2 Ǹ @ Rbo2 @ VboH (eq. 25)
(Vline,rms)boL+RX) 2Rbo1) 2Rbo2
2 Ǹ @ Rbo2 @ VboL (eq. 26) ：
VboH1.0 V+'"H<部限t%& 8
VboL0.9 V+'"H<部W限t%& 8 + − + −Figure 5. Brown-Out and Line Range Detection Block EMI Filter BoostPFC Converter AC Line RX2 Rbo1 Rbo2 RX1 VSENCE Pin
FFcontrol Pin InformationCurrent
Generation DRV
Iramp 2*Iramp
LLine BONOK 50-ms Blanking Time 25-ms Blanking Time + + 1.0 V If BONOK High 0.9 V If BONOK Low 2.2 V If LLine High 1.7 V If LLine Low
RX13RX2/?性考慮 装=> 通常､(RX1 + RX2 = 2RX)直ã組óT@¥2X2 EMIG'j'd3ô¥1s未満時0数形成 Lr､>]抵抗選択必要2OA ST､2本1 MW抵抗(RX1 = RX2 = RX = 1 MW) ､選択X2G'j'd3ô¥1.8 s放電時0 数V] 放電時0数､( 際X2G 'j'd放電,'l m'@¸pJW=¥ 抵抗Rbo13抵抗Rbo2考慮V)("#$ %&'長32OA この場合､ RX1とRX2を適宜小さくします。 Rbo13Rbo2設計34､K'9,損[J 減3,Þ耐性考慮 。第ÇÖ準､軽負 荷損[(4!影響gh能性2O､+ ,'p]vA)9,"電流f限高,'l m'抵抗関V 方､非常(4 !U,Þõ題引4起F¤>2OA 際､(Rbo2 = 120 kW概良á!結果V] RX1､RX2､ F L MRbo2 選 択 3 ､ ö 望 (Vline,rms)boHtu8Ö÷4式25p]Rbo12次3F A)=> Rbo1+ Rbo2@
ǒ
(Vline,rms)boH 2 Ǹ @ VboH * 1Ǔ
*RX 2 (eq. 27) " # $ % & ' (Vline,rms)boH281 V ､ (RX1= Rx2= RX= 1 MW)､FLM(Rbo2= 120 kW)3 4､次式2得]> Rbo1+120 k @ 81 2 Ǹ @ 1.0 V* 1000 k 2 * 120 k + 6253 kW (eq. 28) 際､3 1,800 kW抵抗3560 kW抵抗直ã 3､?Z5,960 kW Rbo1U3!A､>LA ((Vline,rms)boH^ 77.5 V)3((Vline,rms)boL^ 69.8 V)2 p> 備考：5辺,Þp]l'E護､l'2 3Æ+' 間68K#'ÆG'j'dCbo 配置32推Ã=> °､l'2検 )=>電-2歪 !､G'j'd \è量!>i!A ¥¦ 際､G' j'd3 '%'Æ抵抗形成=>時0数､+ ,'5期150¯¨ULAVJw維持必要 2OAǒ
Tline 150 +150 @ f1 lineǓ
!@~､50 Hz+,'条N150 ms未満 ¤ r!ST､l'2Ü¿=>電-y*電- 比å ¥¦2､68K=>î相%6H部¯ 比å､+'"HQ路35波数67 8 9:D設計時>考慮º4 øQå､l'2抵抗性,'l m' Rbo2近Ú4 2C､ Rbo2@ Cbot100 @ f1 lineå Cbot100 @ R1 bo2@ fline+ 1 100 @ 120 k @ 60 [1.4 nF ステップ5：電流センス回路網 電流 'Q路¢W構成=>
電流 '抵抗RCS
5波数67 8 9:特性調整抵抗RFF =>RCSの計算 Q路､電流 '抵抗電-20.5 V超h ST過電流状態検) 2C､ RCS+ 0.5 (IL,pk)max (eq. 29) 式式33T成3､次Lr!A RCS+ (Vline,rms)LL4 2Ǹ @ (Pin,avg)max (eq. 30)
øQ å､¢W3FA RCS+ 90 4 2Ǹ @ 170^ 0.094 W (eq. 31) @¸p! '持¥､80 mW抵抗 選択 RCS損MOSFET電損[得式n用 計算4､RCS2RDS(on)3置4換@A (PRCS)max+ 43 @ RCS@ (eq. 32) @
ǒ
(V(Pin,avg)max line,rms)LLǓ
2 @ǒ
1 *8 2Ǹ @ (V3p @ Vline,rms)LL out,nomǓ
2C､80 mW電流 '抵抗?負荷､J +,'約275 mW消散 RSENSE抵抗(Figure 1ROCP)通､CS/ZCDl '適用!>i!A ¥¦ この抵抗は､3.9 kWよりも大きくなければなりません が､ノイズ耐性の必要から高すぎてはなりません。 通常､5 kWの範囲の抵抗が良好な結果をもたらしま す。 CS/ZCDl'` 電流検)用補oÄ線p]I ÌILrV設計=> Figure 1 示3FA､電-{'K,PRIÌ 電流 '情æ2歪 !Lr､m, { =]抵抗RZCD通Ü¿=> 抵抗CS/ZCDl'5 mA¢注y=>Lr® ¯高w!>i!A ¥¦ 補oÄ線電-+, '` abc近最(!A､次3等w!Aǒ
ǒ
naux npǓ
@ Vout,nomǓ
､naux3np¤>ù>磁性部ú補oÄ線3Ç 次Ä線Ä数比OA､f約LC¢W2 )=>RZCDu
ǒ
naux np @ Vout,nomǓ
* VCL(pos) 5 mA )VRCL(pos) OCP (eq. 33) ､VCL(pos)CS/ZCDl'正:+'最\ tu89 V CS/ZCDl'Ü¿=>電-､次3FA VZCD+ ROCP RZCD) ROCP@ nauxnP @ (Vout,nom* Vline) (eq. 34)
電-消磁検)NCP1611750 mV< 部t%&8 3比較 適検) ､$ 8m'û数次Lr!A
ǒ
ROCP RZCD) ROCP@ naux nPǓ
20範.<Ç般良á!結果2得]> 1方法3､(ROCP = RZCD)､(naux/np)0.1範 .選択式üü整理､次3FA計算 RZCD+ ROCPuǒ
naux nP @ Vout,nomǓ
*ǒ
2 @ VCL(pos)Ǔ
5 mA . "#$ %&'､(ROCP = RZCD > 4.2 kW)2 p> 次U選択 ：(ROCP= RZCD = 4.7 kW) 選択､(ROCP > 3.9 kW)3r要N(ý ;+Æ+6Ë照)V適T NCP1611CS/ZCDl'立~2A«+ 'e'Æ統T､68K#'ÆG 'j'd必要OA ¥¦ 68K#'ÆG' j'd追¿3能2､ZCDIÌ2歪 !Lr非常\=w必要2OA ¤r !3､Q路9t {'!]!能性2 OA､=]悪ST 適9t e r32OA 要､ZCDIÌ2 正3､68K!3確認 "#$ %&'､G'j'd2 22 pF超h!A ¥¦ =>RFFの計算 RFF電流tu8調節､電流tu8WQ 35波数2JWò FFcontroll'¢W比å電流源!A ： IFF+ 140 @ 10−6@ Vpin2@ Vcontrol* Vcontrol,min Vcontrol,max* Vcontrol,min (eq. 35)(Vline = 2 (Vline,rms)BOH)34(Vpin2 = 1 V)! ､次Lr記述4
ǒ
Vpin2+ 1 V 2 Ǹ @ (Vline,rms)BOH @ VlineǓ
. =]､ǒ
Vcontrol* Vcontrol,min Vcontrol,max* Vcontrol,min+ ton ton,maxǓ
､ton,max25−ms<部最({'K,POA､ 次式2成立ǒ
Iline+Vline@ ton 2 @ LǓ
, 式35､次Lr!A IFF+ 56 @ L @ Iline5 2Ǹ @ (Vline,rms)BOH (eq. 36)
FFcontroll'電-次3FA
VFF+56 @ RFF@ L @ Iline
5 2Ǹ @ (Vline,rms)BOH (eq. 37)
VFF22.5 V超h34､!@~瞬時+,'電流 2次式LAV高間､PFC 臨界通
(5波数JW!)D
(Iline)th+25 2Ǹ @ (Vline,rms)BOH 112 @ RFF@ L
(eq. 38)
+,'電流2450 mALAJw!C34､規0 =>3FA5波数JW開òST､抵抗RFF 次U!必要2OA
RFF^ 25 2112 @Ǹ 450 @ 10(Vline,rms)−3BOH@ L+ (eq. 39)
+ 25 2112 @Ǹ 77.5
450 @ 10−3@ 200 @ 10−6^ 272 kW
t%&8 最(+,'電流¨T3 表現方2都T2STVOA､¢WLr !A
Iline,max+ 2Ǹ @(P(Vin,avg)max
in,rms)LL ^ 2.67 A (eq. 40) +,'電流2最(U約17%34､Q路270 kW 抵抗5波数J減開ò FFcontroll' 電-2約0.75 V(£称)34､最\20 kHzD ¤時点þ電流最(U(17% 0.75/2.5) 5% >LAVJtu8､Q路 e yA 備考：5辺,Þp]l'E護､l'3 3Æ+' 間68K#'ÆG'j'dCFF 配置32推Ã=> 通常"#$ %&'､l'2検)=>電-2歪 ! ､G'j'd\è量!>i!A ¥ ¦ 際､G'j'd3 '%'Æ抵抗形 成=>時0数､+,'5期150¯¨ULA VJw維持必要2OA
ǒ
Tline 150 +150 @ f1 lineǓ
!@~､50 Hz+,'条N150 ms未満ST､l'3抵抗性,'l m'RFF RFF@ CFFt150 @ f1 lineå (eq. 41) CFFt150 @ R1 FF@ fline+ 1 150 @ 270 k @ 60 [411 pF レイアウトとノイズ耐性の考察 NCP1611,Þ特敏感3r@ OA ¥¦ p､電源用通常t,"H 8 82適用=> 次¤r~wp 示
;^ Ht,'8 領ë最\限! >i!A ¥¦
電流#K ';提q;^ Æ+' 用K 構造
Q路Æ+' 用K 構造
Q路Æ+' 3電源Æ+' 1%'Æ8 ;接続V3
;4>i､電流 '抵抗(Rsense)接 端 非常近S所､Q路Æ+' 電源 Æ+' 接続V3
100 nF 220 nF +ª:G'j'd Q路VCCl'3GNDl'間最短接続長配 置V3
Q路D Æ+P部ú(抵抗 G'j 'd)､4°駆l'近w配置 !>i!A ¥¦ ý述3FA､68K#'ÆG'j'dQ路 3比較的高,'l m'l'：6 9:､y*電- '%'Æ(VSENSE)､FLM FFcontrol配置､考h]>5辺,Þp]l' E護32推Ã=> >]l'検) =>電-2歪 !Lr､G'j'd\ è量!>i!A ¥¦ 詳細､該当 :%&'Ë照w°=Table 1. SUMMARY OF THE MAIN EQUATIONS
Steps Components Formulae Comments
Step1
−
Key
Specifications
fline: Line frequency. It is often specified in a range of 47−63 Hz for 50 Hz/60 Hz applications.
(Vline,rms)LL: Lowest Level of the line voltage, e.g., 90 V.
(Vline,rms)HL: Highest Level for the line voltage (e.g., 264 V in many countries).
(Vline,rms)boH: Brown-Output Line Upper Threshold. The circuit prevents operation until the line rms voltage exceeds this
level.
Vout,nom: Nominal Output Voltage.
(dVout)pk−pk: Peak-to-Peak output voltage low-frequency ripple.
tHOLD−UP: Hold-up Time that is the amount of time the output will remain valid during line drop-out.
(Vout,min): Minimum output voltage allowing for operation of the downstream converter.
Pout,max: Maximum output power consumed by the PFC load, that is, 160 W in our application.
(Pin,avg)max: Maximum power absorbed from the mains in normal operation. Generally obtained at full load, low line, it
Table 1. SUMMARY OF THE MAIN EQUATIONS (continued)
Steps Components Formulae Comments
Step2 − Power Components Input Diodes Bridge Losses P bridge+ 2 @ Vf@ 2 2Ǹ p @Phout Vline,rms [ 1.8 @ Vf Vline,rms@ Pout h
Vf is the forward voltage of any
diode of the bridge. It is generally in the range of 1 V or less.
Inductor
L v (Vline,rms)LL 2
2 @ (Pin,avg)max@ Ton,max (IL,pk)max+ 2 2Ǹ @(Pin,avg)max
(Vline,rms)LL (IL,rms)max+(IL,pk)max 6 Ǹ In our application: L v 902 2 @ 170@ 20 m + 476 mH (IL,pk)max+ 2 2Ǹ @ 170 90 ^5.3 A (IL,rms)max+ 5.3 6 Ǹ ^2.2 A MOSFET Conduction Losses (Pon)max+ 43 @ RDS(on)@
ǒ
Pout,max h @ (Vline,rms)LLǓ
2 @ǒ
1 *8 2Ǹ @ (V3p @ Vline,rms)LL out,nomǓ
RDS(on) is the drain-source
on-state resistance of the MOSFET Bulk Capacitor Constraints Cbulkv(dV Pout,max out)pk−pk@ w @ Vout,nom
Cbulkw2 @ PV out,max@ tHOLD*UP
out,nom2* Vout,min2 (Ic,rms)max^
ǒ
32 2Ǹ 9pǸ
@ (Pin,avg)max (Vline,rms)LL@ Vout,nomǸ
Ǔ
2 *ǒ
VPout,max out,nomǓ
2Ǹ
These 3 equations quantify the constraints resulting from the low-frequency ripple
((Vout)pk−pk that must be kept
below 8%), the hold-up time requirement and the rms current to be sustained. Step3 − Feedback Arrangement Resistor Divider Rfb1+ Rfb2@
ǒ
Vout,nom VREF * 1Ǔ
Cfbv 1 150 @ǒRfb1ø Rfb2Ǔ@ fline Rfb2+ 2.5I FBIFB is the bias current that is
targeted within the resistor divider. Values in the range of 50 mA to 100 mA generally give a good trade-off between losses and noise immunity.
CFB is the filtering capacitor that
can be placed between the FB pin and ground to increase the noise immunity of this pin.
Compensation G0+(Vline,rms)LL2@ Rload,min 640000 @ L @ Vout,nom C2+ G0@ tan
ǒ
p 2 * fmǓ
2 @ p2@ f c2@ Rload,min@ Cbulk@ R0 C1+2 @ p @ fG0 c@ R0* C2 R1+Rload,min@ Cbulk 2 @ C1 Step4 − Input Voltage Sensing Input Voltage Sensing Resistors Rbo1+ Rbo2@ǒ
(Vline,rms)boH 2 Ǹ @ VboH * 1Ǔ
* RX 2 Cbot 1 150 @ Rbo2@ flineRX is the resistance of the X2
capacitors discharge resistors RX1 andRX2 according to
Figure 5. (Vline,rms)boH line rms
level above which the circuit starts operating. VboH is an
Table 1. SUMMARY OF THE MAIN EQUATIONS (continued)
Steps Components Formulae Comments
Step5 − Current Sense Network Current Sense Resistor (PRCS)max+ 43 @ RCS@
ǒ
(Pin,avg)max (Vline,rms)LLǓ
2 @ǒ
1 *8 2Ǹ @ (V3p @ Vline,rms)LL out,nomǓ
RCS+ (Vline,rms)LL4 2Ǹ @ (Pin,avg)max (Vvoltage lowest level in normalline,rms)LL is the line rms condition (e.g., 90 V). Vout,nom is
the output nominal level (e.g., 390 V). (Pin,avg)max is the
maximum input power of your application. Zero Current Detection RZCDu
ǒ
naux np @ Vout,nomǓ
* VCL(pos) 5 mA )VRCL(pos) OCPPlaced between RCS and the
CS/ZCD pin, resistor ROCP must
be greater than 3.9 kW but not too high for noise immunity. Generally, resistors in the range of 5 kW give good results. Current Controlled Frequency Fold-back CFFv 1 150 @ fline@ RFF RFF+25 2112 @ L @ (IǸ @ (Vline,rms)BOH line)th
(Iline)th is the line current level
below which the NCP1611 starts to reduce the frequency.
Detailed Schematic for our 160-W, Universal Mains Application
Figure 6. Application Schematic – Power Section
Vin Vaux Vline DRV Vbulk Isense GND VCC D1 MUR550 Rth1 B57153S150M Q1 IPA50R250 C6b 68 mF/450 V C6a 68 mF/450 V DZ2 33 V C7 22 mF/50 V + + + 1N5406 D2 D3 R5 2.2 W R6 22 W 1N4148 R4 10 kW R3 80 mW, 3W D4 1N4148 + −
Socket for External VCC Power Source L2, 200 mH (np/ns = 10) C5 470 nF/400 V U1 GBU606 + − C4, 220 nF Type = X2 R2, 1000 kW R1, 1000 kW CM1 L1 F1 C3 680 nF Type = X2 C2 1 nF Type = Y2 C1 1 nF Type = Y2 L N Earth 90−265 Vrms IN
Figure 7. Application Schematic – Control Section
R19 NC R7 0 W Vbulk Vline Vin VCC Vaux Isense GND DRV R21 4.7 kW C14 NC D5 1N4148 R18 27 W C13 10 nF D6 1N4148 ZD1 22 V R20, 4.7 kW C12 NC C15 220 nF R15 120 kW R16 120 kW R17 120 kW R8 560 kW R9 1,800 kW R10 1,800 kW R11 27 kW R22 560 kW R23 1,800 kW R24 1,800 kW R25 1,800 kW R26 120 kW C16 100 pF R12 22 kW C9 2.2 mF C10 220 nF C8 1 nF R14 270 kW R130 W C11 470 pF 1 8 2 7 3 6 4 5
結論 文書NCP1611駆PFC 設計 際要 3V 提案 " ÅZ系立]>FA､応用 Vè易適用4 =]､Excel SpreadsheetV í用4､記載方法[5]従C"#$ %& '要構成部ú計算>i､=]設計x w!A 160 W^, 電源評éÿ å示 ÿ 性能関詳 細FLM情æ､NCP1611評éÿ Âニ|"8 [4]記載=> 装詳細(BOM､GERBER 6Ê,8)､当社Ód,Hご覧 w°=[6] Q路D詳細j K% H記載=> [7] 参考資料
[1] Joel Turchi, “Safety tests on a NCP1611-driven PFC stage”, Application note AND9064/D, http://www.onsemi.com/pub_link/Collateral/AND9064−D.PDF.
[2] Joel Turchi, “Compensation of a PFC stage driven by the NCP1654”, Application note AND8321/D, http://www.onsemi.com/pub_link/Collateral/AND8321−D.PDF.
[3] Joel Turchi, “Compensating a PFC stage”, Tutorial TND382−D available at: http://www.onsemi.com/pub_link/Collateral/TND382−D.PDF.
[4] EVBUM2149/D, NCP1611 Evaluation Board User’s Manual, http://www.onsemi.com/pub_link/Collateral/EVBUM2049−D.PDF [5] NCP1611 design worksheet,
http://www.onsemi.com/pub/Collateral/NCP1611%20DWS.XLS [6] NCP1611 evaluation board documents,
http://www.onsemi.com/PowerSolutions/supportDoc.do?type=boards&rpn=NCP1611 [7] NCP1611 data sheet,
http://www.onsemi.com/pub_link/Collateral/NCP1611−D.PDF.
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![Figure 3. 2-step Feed-forward Limits the Loop Gain Variation with Respect to Line3*G0G03*(Vin,rms)BOHe.g.: 234 VV line,rmsLoopGain(−)2.2*(Vin,rms)BOHe.g.: 172 V1.7*(Vin,rms)BOHe.g.: 133 V(Vin,rms)BOHe.g.: 78 V [1] 3[2]説明方法n用､PFC 2\IÌ_達関数(Ç方高+](https://thumb-ap.123doks.com/thumbv2/123deta/7045646.789315/5.918.185.744.305.587/FigureVinrmsBOHegVVVinrmsBOHegVVinrmsBOHegVVinrmsBOHegV説明方法n用PFC IÌ達関数Ç方.webp)
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