IGBT - SMPS II Series N-Channel with Anti-Parallel Stealth Diode 600 V FGH50N6S2D

N-Channel with

Anti-Parallel Stealth Diode 600 V

FGH50N6S2D

Description

The FGH50N6S2D is a Low Gate Charge, Low Plateau Voltage SMPS II IGBT combining the fast switching speed of the SMPS IGBTs along with lower gate charge, plateau voltage and avalanche capability (UIS). These LGC devices shorten delay times, and reduce the power requirement of the gate drive. These devices are ideally suited for high voltage switched mode power supply applications where low conduction loss, fast switching times and UIS capability are essential. SMPS II LGC devices have been specially designed for:

• Power Factor Correction (PFC) Circuits

• Full Bridge Topologies

• Half Bridge Topologies

• Push−Pull Circuits

• Uninterruptible Power Supplies

• Zero Voltage and Zero Current Switching Circuits

• 100 kHz Operation at 390 V, 40 A

• 200 kHz Operation at 390 V, 25 A

• 600 V Switching SOA Capability

• Typical Fall Time 90 ns at T

= 125 ° C

• Low Gate Charge 70 nC at V

= 15 V

• Low Plateau Voltage 6.5 V Typical

• ^{UIS Rated 480 mJ}

• Low Conduction Loss

• This is a Pb−Free Device

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MARKING DIAGRAM C G E

G

TO−247−3LD CASE 340CK

$Y = ON Semiconductor Logo

&Z = Assembly Plant Code

&3 = Numeric Date Code

&K = Lot Code

50N6S2D = Specific Device Code

$Y&Z&3&K 50N6S2D

ORDERING INFORMATION

See detailed ordering and shipping information on page 2 of this data sheet.

C

E G

MAXIMUM RATINGS (T_C = 25°C unless otherwise noted)

Parameter Symbol Ratings Unit

Collector to Emitter Breakdown Voltage BVCES 600 V

Collector Current Continuous TC = 25°C IC 75 A

TC = 110°C 60 A

Collector CurrentPulsed (Note 1) I_CM 240 A

Gate to Emitter Voltage Continuous V_GES ±20 V

Gate to Emitter Voltage Pulsed V_GEM ±30 V

Switching Safe Operating Area at T_J = 150°C, Figure 2 SSOA 150 A at 600 V

Pulsed Avalanche Energy, I_CE = 30 A, L = 1 mH, V_DD = 50 V E_AS 480 mJ

Power Dissipation Total TC = 25°C PD 463 W

Power Dissipation Derating TC > 25°C 3.7 W/°C

Operating Junction Temperature Range T_J −55 to +150 °C

Storage Junction Temperature Range T_STG −55 to +150 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Pulse width limited by maximum junction temperature.

PACKAGE MARKING AND ORDERING INFORMATION

Device Marking Device Package Tape Width Quantity

50N6S2D FGH50N6S2D TO−247 N/A 30

THERMAL CHARACTERISTICS

Characteristic Symbol Value Unit

Thermal Resistance Junction−Case, IGBT R_JC 0.27 °C/W

Thermal Resistance Junction−Case, Diode R_JC 1.1

ELECTRICAL CHARACTERISTICS (T_C = 25°C unless otherwise noted)

Parameter Symbol Test Conditions Min Typ Max Unit

OFF STATE CHARACTERISTICS

Collector to Emitter Breakdown Voltage BV_CES I_C = 250 A, V_GE = 0 V, 600 − − V

Collector to Emitter Leakage Current I_CES V_CE = 600 V T_J = 25°C − − 250 A

T_J = 125°C − − 2.8 mA

Gate to Emitter Leakage Current I_GES V_GE = ±20 V − − ±250 nA

ON STATE CHARACTERISTICs

Collector to Emitter Saturation Voltage V_CE(SAT) I_C = 30 A, V_GE = 15 V T_J = 25°C − 1.9 2.7 V

TJ = 125°C − 1.7 2.2 V

Diode Forward Voltage VEC IEC = 30 A − 2.2 2.6 V

DYNAMIC CHARACTERISTICS

Gate Charge QG(ON) IC = 30 A, VCE = 300 V V_GE = 15 V − 70 85 nC

V_GE = 20 V − 90 110 nC

Gate to Emitter Threshold Voltage V_GE(TH) I_C = 250 A, VCE= V_GE 3.5 4.3 5.0 V

Gate to Emitter Plateau Voltage V_GEP I_C = 30 A, V_CE = 300 V − 6.5 8.0 V

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) (continued)

Parameter Symbol Test Conditions Min Typ Max Unit

SWITCHING CHARACTERISTICS

Switching SOA SSOA T_J = 150°C, RG = 3 V_GE = 15 V,

L = 100 H, VCE = 600 V 150 − − A

Current Turn−On Delay Time t_d(ON)I IGBT and Diode at T_J = 25°C, ICE = 30 A,

V_CE = 390 V, V_GE = 15 V, RG = 3 , L = 200 H,

Test Circuit − Figure 26

− 13 − ns

Current Rise Time trI − 15 − ns

Current Turn−Off Delay Time td(OFF)I − 55 − ns

Current Fall Time tfI − 50 − ns

Turn−On Energy (Note 2) EON1 − 260 − J

Turn−On Energy (Note 2) EON2 − 330 − J

Turn−Off Energy Loss (Note 3) EOFF − 250 350 J

Current Turn−On Delay Time td(ON)I IGBT and Diode at TJ = 125°C, I_CE = 30 A,

V_CE = 390 V, V_GE = 15 V, R_G = 3 , L = 200 H,

Test Circuit − Figure 26

− 13 − ns

Current Rise Time trI − 15 − ns

Current Turn−Off Delay Time t_d(OFF)I − 92 150 ns

Current Fall Time t_fI − 88 100 ns

Turn−On Energy (Note 2) E_ON1 − 260 − J

Turn−On Energy (Note 2) E_ON2 − 490 600 J

Turn−Off Energy (Note 3) E_OFF − 575 850 J

Diode Reverse Recovery Time t_rr I_EC = 30 A, dI_EC/dt = 200 A/s − 50 55 ns

I_EC = 1 A, dI_EC/dt = 200 A/s − 30 42 ns

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

2. Values for two Turn−On loss conditions are shown for the convenience of the circuit designer. E_ON1 is the turn−on loss

of the IGBT only. E_ON2 is the turn−on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in Figure 26.

3. Turn−Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (I_CE = 0A). All devices were tested per JEDEC Standard No. 24−1 Method for Measurement of Power Device Turn−Off Switching Loss. This test method produces the true total Turn−Off Energy Loss.

TYPICAL PERFORMANCE CURVES

Figure 1. DC Collector Current vs. Case Temperature

Figure 2. Minimum Switching Safe Operating Area

Figure 3. Operating Frequency vs. Collector to Emitter Current

Figure 4. Short Circuit Withstand Time

Figure 5. Collector to Emitter On−State Voltage

Figure 6. Collector to Emitter On−State Voltage

40

0 80 140

100 120

20

25 50 75 100 125 150

T_C, Case Temperature (°C) ICE, DC Collector Current (A)

0 50 200

150

100

0 100 200 300 400 500 600 700

V_CE, Collector to Emitter Voltage (V) ICE, Collector to Emitter Current (A)

10 100 300 700

1 10 30 60

I_CE, Collector to Emitter Current (A) fMAX, Operating Frequency (kHz)

9 12

10

4

300 500 12

8

200 400 600 800

10 16

2

0 15

700 14

11 13 14

V_GE, Gate to Emitter Voltage (V)

Isc, Peak Short Circuit Current (A)

tsc, Short Circuit Withstand Time (s)

0 10 20 40 30 60 50

0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 VCE, Collector to Emitter Voltage (V) ICE, Collector to Emitter Current (A)

0 10 20 40 30 60 50

V_CE, Collector to Emitter Voltage (V) ICE, Collector to Emitter Current (A)

tsc

Package Limited

T_J = 150°C, RG = 3 , VGE = 15 V, L = 100 H

f_MAX1 = 0.05 / (t_d(OFF)I + t_d(ON)I) f_MAX2 = (P_D − P_C) / (E_ON2 + E_OFF) P_C = Conduction Dissipation

(Duty Factor = 50%)

R_JC = 0.27°C/W, See Notes V_GE = 10 V V_GE = 15 V

T_C = 75°C V_CE = 390 V, R_G = 3 , T_J = 125°C

I_sc 6

900

T_J = 125°C T_J = 25°C Duty Cycle < 0.5%, VGE = 15 V

Pulse Duration = 250 s

TJ = 150°C

Duty Cycle < 0.5%, VGE = 10 V Pulse Duration = 250 s

TJ = 125°C T_J = 150°C T_J = 25°C

0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 60

TJ = 125°C, RG = 3 , L = 200 H, VCE = 390 V

TYPICAL PERFORMANCE CURVES

Figure 7. Turn−On Energy Loss vs. Collector to Emitter Current

Figure 8. Turn−Off Energy Loss vs. Collector to Emitter Current

Figure 9. Turn−On Delay Time vs. Collector to Emitter Current

Figure 10. Turn−On Rise Time vs. Collector to Emitter Current

Figure 11. Turn−Off Delay Time vs. Collector to Emitter Current

Figure 12. Fall Time vs. Collector to Emitter Current

0 250

0 10 20 30 40 50 60

ICE, Collector to Emitter Current (A) EON2, Turn−On Energy Loss (J)

0 200 400 1000 1200 1400

0 10 20 30 40 50 60

I_CE, Collector to Emitter Current (A) EOFF, Turn−Off Energy Loss (J)

0 5 10 15 25

0 10 20 30 40 50 60

I_CE, Collector to Emitter Current (A) td(ON)I,Turn−On Delay Time (ns)

0 10 20 50 60 70

0 10 20 30 40 50 60

I_CE, Collector to Emitter Current (A)

40 50 60 70 80 90 100

0 10 20 30 40 50 60

ICE, Collector to Emitter Current (A) td(OFF), Turn−Off Delay Time (ns)

0 10 20 30 40 50 60

I_CE, Collector to Emitter Current (A) tfI, Fall Time (ns)trI, Rise Time (ns)

T_J = 25°C T_J = 125°C, V_GE = 15 V RG = 3 , L = 200 H, VCE = 390 V

TJ = 25°C, TJ = 125°C, VGE = 10 V

500 750 1000 1250 1500 1750 2000 2250

2500 R_G = 3 , L = 200 H, VCE = 390 V

TJ = 125°C, VGE = 10 V, VGE = 15 V

T_J = 25°C, VGE = 10 V, VGE = 15 V

600 800

R_G = 3 , L = 200 H, VCE = 390 V

T_J = 25°C, TJ = 125°C, V_GE = 10 V

T_J = 25°C, TJ = 125°C, V_GE = 15 V

20

RG = 3 , L = 200 H, VCE = 390 V T_J = 25°C, TJ = 125°C, VGE = 10 V

TJ = 25°C, TJ = 125°C, VGE = 15 V 30

40

RG = 3 , L = 200 H, VCE = 390 V

V_GE = 10 V, V_GE = 15 V, T_J = 125°C

VGE = 10 V, VGE = 15 V, TJ = 25°C

R_G = 3 , L = 200 H, VCE = 390 V

T_J = 125°C, VGE = 10 V, V_GE = 15 V

T_J = 25°C, VGE = 10 V, V_GE = 15 V 25

50 75 100 125

TYPICAL PERFORMANCE CURVES

Figure 13. Transfer Characteristics Figure 14. Gate Charge

Figure 15. Total Switching Loss vs. Case Temperature

Figure 16. Total Switching Loss vs. Gate Resistance

Figure 17. Capacitance vs. Collector to Emitter Voltage

Figure 18. Collector to Emitter On−State Voltage vs. Gate to Emitter Voltage 0

50 125 150 200 250

4 5 6 7 8 9 10

V_GE, Gate to Emitter Voltage (V) ICE, Collector to Emitter Current (A)

0 2 4 6 8 10 12 14 16

0 10 20 30 40 50 60 70 80

Q_G, Gate Charge (nC) VGE, Gate to Emitter Voltage (V)

0 0.5 1.0 2.0 1.5 3.0 2.5

25 50 75 100 125 150

T_C, Case Temperature (°C) ETOTAL, Total Switching Energy Loss (mJ)

1

0.1 100

10

1 10 100 1000

R_G, Gate Resistance () ETOTAL, Total Switching Energy Loss (mJ)

0.0 4.0

1.5

0.5

0 10 20 30 40 50 60 70 80 90 100 V_CE, Collector to Emitter Voltage (V)

C, Capacitance (nF)

1.7 1.9 2.0 2.2 2.3 2.5

6 7 8 9 10 11 12 13 14 15 16

VGE, Gate to Emitter Voltage (V) VCE, Collector to Emitter Voltage (V)

Duty Cycle < 0.5%, V_CE = 10 V Pulse Duration = 250 s

T_J = 25°C

T_J = 125°C

T_J = −55°C 225

175

100 75

25

I_G(REF) = 1 mA, R_L = 10

V_CE = 600 V

V_CE = 200 V V_CE = 400 V

V_GE = 15 V

ETOTAL = EON2 + EOFF

R_G = 3 , L = 200 H, VCE = 390 V I_CE = 60 A

I_CE = 30 A ICE = 15 A

T_J = 125°C, L = 200 H, VCE = 390 V, V_GE = 15 V

ETOTAL = EON2 + EOFF

I_CE = 30 A I_CE = 60 A

I_CE = 15 A

Frequency = 1 MHz

CIES

C_OES C_RES 1.0 2.0 2.5 3.0

3.5 Duty Cycle < 0.5%

Pulse Duration = 250 s I_CE = 45 A

ICE = 30 A

I_CE = 15 A 2.4

2.1

1.8

Figure 19. Diode Forward Current vs. Forward Voltage Drop

0 60

0 0.5 1.0 1.5 2.0 3.0 3.5

V_EC, Forward Voltage (V) ICE, Forward Current (A)

75

15

Duty Cycle < 0.5%

Pulse Duration = 250 s

125^°C

25^°C

2.5 45

30

02 25 75 50

dI_EC/dt = 200 A/s, VCE = 390 V 125°C trr

125°C t_b

125°C ta

25°C trr

25°C ta, t_b 100

125 150 175 200

6 10 14 18 22 26 30

Figure 20. Recovery Times vs. Forward Current I_EC, Forward Current (A)

trr, Reverse Recovery Times (ns)

dI_EC/dt = 200 A/s, VCE = 390 V 125^°C trr

125^°C t_b

25^°C t_rr

6 10 14 18 22 26

Figure 21. Recovery Times vs. Rate of Change of Current

I_EC, Forward Current (A)

0 100

200 400 600 800 1000 1200

dIEC/dt, Rate of Changes of Current (A/s) ta,tb, Reverse Recovery Times (ns)

150

25 75 50

IEC = 30 A, VCE = 390 V

125^°C tb

125^°C ta

25^°C t_a 25^°C tb

125

0 800

200 400 600 800 1000 1200

dI_EC/dt, Rate of Changes of Current (A/s) Qrr, Reverse Recovery Charge (nC)

1200

200 600 400 1000

V_CE = 390 V 125^°C, I_EC = 30 A

125^°C, I_EC = 30 A

25^°C, I_EC = 30 A

25^°C, I_EC = 15 A

Figure 22. Stored Charge vs. Rate of Change of Current

0 2.0

200 400 600 800 1000 1200

dIEC/dt, Current Rate of Change (A/s)

S, Reverse Recovery Softness Factor

3.0

0.5 1.5 1.0 2.5

Figure 23. Reverse Recovery Softness Factor vs. Rate of Change of Current

V_CE = 390 V, T_J = 125^°C

I_EC = 15 A I_EC = 30 A

200 400 600 800 1000 1200

5 20 30

10 15 25

V_CE = 390 V, T_J = 125^°C

I_EC = 15 A I_EC = 30 A

dI_EC/dt, Current Rate of Change (A/s) IRRM, Max Reverse Recovery Current (A)

Figure 24. Maximum Reverse Recovery Current vs. Rate of Change of Current

TYPICAL PERFORMANCE CURVES

Figure 25. IGBT Normalized Transient Thermal Impedance, Junction to Case

R_G = 3

FGH50N6S2D

L = 200 H Diode TA49392FGH50N6S2D

+

− VDD = 390 V

V_GE

V_CE

I_CE

90%

10%

EON2

E_OFF

90%

10%

t_d(OFF)I

t_fI trI

t_d(ON)I t1, Rectangular Pulse Duration (s)

Figure 26. Inductive Switching Test Circuit Figure 27. Switching Test Waveforms Single Pulse

0.50 0.20 0.10 0.05 0.02 0.01

Duty Factor, D = t₁/t₂

Peak T_J = (P_D x Z_JC x R_JC) + T_C P_D

t1

t2

10⁻² 10⁻¹ 10⁰

10⁻⁵ 10⁻⁴ 10⁻³ 10⁻² 10⁻¹ 10⁰ 10¹

ZJC, Normalized Thermal Response

TYPICAL PERFORMANCE CURVES

TEST CIRCUIT AND WAVEFORMS

Handling Precautions for IGBTs

Insulated Gate Bipolar Transistors are susceptible to gate−insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge.

IGBTs can be handled safely if the following basic precautions are taken:

1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBDt LD26” or equivalent.

2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means − for example, with a metallic wristband.

3. Tips of soldering irons should be grounded.

4. Devices should never be inserted into or removed from circuits with power on.

5. Gate Voltage Rating − Never exceed the gate−voltage rating of V

. Exceeding the rated V

can result in permanent damage to the oxide layer in the gate region.

6. Gate Termination − The gates of these devices are essentially capacitors. Circuits that leave the gate open−circuited or floating should be avoided.

These conditions can result in turn−on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup.

7. Gate Protection − These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended.

Operating Frequency Information

Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (I

) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows f

or f

; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature.

f

is defined by f

= 0.05/

I+ td

. Deadtime (the denominator) has been arbitrarily held to 10% of the on−state time for a 50% duty factor. Other definitions are possible. t

and t

are defined in Figure 27. Device turn−off delay can establish an additional frequency limiting condition for an application other than T

. t

is important when controlling output ripple under a lightly loaded condition.

f

is defined by f

= (P

− P

)/(E

+ E

).

The allowable dissipation (P

) is defined by P

= (T

− T

)/R

. The sum of device switching and conduction losses must not exceed P

. A 50% duty factor was used (Figure 3) and the conduction losses (P

) are approximated by P

= (V

x I

)/2.

E

and E

are defined in the switching waveforms

shown in Figure 27. E

is the integral of the instantaneous

power loss (I

x V

) during turn−on and E

is the

integral of the instantaneous power loss (I

x V

) during

turn−off. All tail losses are included in the calculation for

E

; i.e., the collector current equals zero (I

= 0)

TO−247−3LD SHORT LEAD CASE 340CK

ISSUE A

DATE 31 JAN 2019

XXXX = Specific Device Code A = Assembly Location Y = Year

WW = Work Week ZZ = Assembly Lot Code

*This information is generic. Please refer to device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking.

GENERIC MARKING DIAGRAM*

AYWWZZ XXXXXXX XXXXXXX

E

D

L1 E2

(3X) b (2X) b2

b4

(2X) e

Q

L

0.25 ^M B A ^M A

A1 A2 A

c

B

D1 P1

S P

E1

D2

1 2 3 2

DIM MILLIMETERS MIN NOM MAX A 4.58 4.70 4.82 A1 2.20 2.40 2.60 A2 1.40 1.50 1.60 b 1.17 1.26 1.35 b2 1.53 1.65 1.77 b4 2.42 2.54 2.66 c 0.51 0.61 0.71 D 20.32 20.57 20.82

D1 13.08 ~ ~

D2 0.51 0.93 1.35 E 15.37 15.62 15.87

E1 12.81 ~ ~

E2 4.96 5.08 5.20

e ~ 5.56 ~

L 15.75 16.00 16.25 L1 3.69 3.81 3.93

P 3.51 3.58 3.65 P1 6.60 6.80 7.00 Q 5.34 5.46 5.58 S 5.34 5.46 5.58

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DESCRIPTION:

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Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1 TO−247−3LD SHORT LEAD

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